1 928 498 056

Vendor:0Package Cooled:07＋D/C:2809

1 OHM 0402 5 T-XPB

Package Cooled:YAGEO

1 OHM 0603 1 T-XPB

Package Cooled:YAGEO

1 OHM 0603 5 T-XPB

Package Cooled:YAGEO

1 OHM 0805 5 T-XPB

Package Cooled:YAGEO

1 SS302

D/C:06+

1.0 HIGH

1.000M

RF input pin. This pin is NOT internally DC blocked. A DC blocking capacitor, suitable for the frequency of operation, should be used in most applications. DC coupling of the input is not allowed, because this will override the internal feedback loop and cause temperature instabil- ity. Same as pin 1.

1.000MHZ

Vendor:KSYD/C:9606

♦ 72dB ACLR at fOUT = 61.44MHz (Single-Carrier WCDMA) ♦ Meets 3G UMTS, cdma2000®, GSM Spectral Masks (fOUT = 122MHz) ♦ Noise Spectral Density = -151dBFS/Hz at fOUT = 16MHz ♦ 90dBc SFDR at Low-IF Frequency (10MHz) ♦ 86dBc SFDR at High-IF Frequency (50MHz)

1.00175E008

Vendor:STPackage Cooled:TSSOP-20D/C:02

1.00199E008

Vendor:STPackage Cooled:TSSOP-20D/C:02

1.00E92

1.016.320

Vendor:大SPackage Cooled:PLCC68

1.02851E006

Vendor:MAXTORPackage Cooled:SOP20WD/C:2007+

1.02851E006

Vendor:MAXTORPackage Cooled:SOP20WD/C:2007+

1.03M

Package Cooled:4(1206)D/C:08+

The ZZ input pin is an asynchronous input. Asserting ZZ places the SRAM in a power conservation sleep mode. Two clock cycles are required to enter into or exit from this sleep mode. While in this mode, data integrity is guaranteed. Accesses pending when entering the sleep mode are not considered valid nor is the completion of the operation guaranteed. The device must be deselected prior to entering the sleep...

1.05K OHM 0603 1 T-XPB

Package Cooled:YAGEO

1.08E14

Stop Condition All communications must be terminated by a stop con- dition. The stop condition is a LOW to HIGH transition of SDA when SCL is HIGH. The stop condition is also used to reset the device during a command or data input sequence and will leave the device in the standby power mode. As with starts, stops are inhibited when outputting data and while a write is in progress.

1.08E14

Stop Condition All communications must be terminated by a stop con- dition. The stop condition is a LOW to HIGH transition of SDA when SCL is HIGH. The stop condition is also used to reset the device during a command or data input sequence and will leave the device in the standby power mode. As with starts, stops are inhibited when outputting data and while a write is in progress.

1.0GAMAPLUS

Vendor:TELEFONICAPackage Cooled:PQFP-240D/C:06+

Drop-in replacement for IBM AT computer clock/calendar Pin compatible with the MC146818B and DS1287A Totally nonvolatile with over 10 years of operation in the absence of power Self-contained subsystem includes lithium, quartz, and support circuitry Counts seconds, minutes, hours, days, day of the week, date, month, and year with leap- year compensation valid up to 2100 Binary or BCD representation of ti...

1.1012

(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet. (2) All typical values are at 25C and with a 3.3-V supply voltage. (3) HP4194A impedance analyzer (or equivalent)

1.10913E15

1.1103E006

Vendor:NSPackage Cooled:SOP24WD/C:2007+

1.11E007

Vendor:NSPackage Cooled:PLCC28D/C:2007+

1.12943E009

Package Cooled:QFP100D/C:2007+

1.15E07

This family of four, eight, and sixteen differential line drivers implements the electrical characteris- tics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the sixteen current-mode ...

1.15K OHM 0603 1 T-XPB

Package Cooled:YAGEO

1.18K OHM 0402 1 T-XPB

Package Cooled:YAGEO

1.1K OHM 0402 1 T-XPB

Package Cooled:YAGEO

1.1K OHM 1/16W 0402 1 GP YAGEO

1.1K OHM 1/16W 0402 1 GP YAGEO LF

1.1M OHM 0603 5 T-XPB

Package Cooled:YAGEO

1.2 OHM 0603 1 T-XPB

Package Cooled:YAGEO

1.2 OHM 0805 5 T

Package Cooled:YAGEO

1.2 OHM 1206 5 T-XPB

Package Cooled:YAGEO

1.2003E006

Vendor:FPackage Cooled:PQFP84D/C:2007+

1.21K OHM 0603 1 T-XPB

Package Cooled:YAGEO

1.22003E12

1.24K OHM 0603 1 T-XPB

Package Cooled:YAGEO

1.2504

1.25A

D/C:06+

A homogeneous film of metal alloy is deposited on a high grade ceramic body. After a helical groove has been cut in the resistive layer, tinned connecting wires of electrolytic copper are welded to the end-caps. The resistors are coated with a grey, flame retardant lacquer which provides

1.2704E12

1.27K OHM 0402 1 T-XPB

Package Cooled:YAGEO

1.2K OHM 0805 1 T-XPB

Package Cooled:YAGEO

1.2K OHM 0805 5 T

Package Cooled:YAGEO

1.2K OHM 1206 5 T-XPB

Package Cooled:YAGEO

1.2M OHM 0603 5 T

Package Cooled:MEC

1.2M OHM 0603 5 T-XPB

Package Cooled:YAGEO

1.2M OHM 1206 5 T-XPB

Package Cooled:YAGEO

1.2PF 16V /-0.1PF 0402 EVK TAIYO L

1.2PF/50V/0.25PF/0805/T

Package Cooled:YAGEO

1.30KOHM10.6W

1.31MM20

1.33K OHM 0603 1 T-XPB

Package Cooled:YAGEO

1.351E009

Vendor:MXPackage Cooled:SOP44WD/C:2007+

1.3K OHM 0402 1 T

Package Cooled:YAGEO

1.3K OHM 1206 1 T

Package Cooled:YAGEO

1.3M/1206/1

D/C:06+

1.43K OHM 0402 1 T-XPB

Package Cooled:YAGEO

1.449.021.21

D/C:08+

*Note: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of this specification is not implied and exposure to absolute maximum rating conditions for extened periods may affect device reliability.

1.45E14

Output modules accept 0 to +10V (or +10V) single-ended signals and provide an isolated 4-20 mA (or 0-20 mA) process signal. All modules feature a universal pin-out and may be readily hot-swapped under full power and interchanged without disrupting field wiring.

1.46E14

A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock p...

1.47K OHM 0603 1 T-XPB

Package Cooled:YAGEO

1.47KOHM10.6W

1.4A-125V

Vendor:LITTELFU

1.4K OHM 0603 1 T-XPB

Package Cooled:YAGEO

1.5 OHM 0603 5 T

Package Cooled:MEC

1.50E08

Vendor:FUJITSUPackage Cooled:07+D/C:50

NOTES: 1. Dimensions are in inches. Metric equivalents are given for general information only. 2. Beyond radius (r) maximum, TW shall be held for a minimum length of 0.011 (0.028 mm). 3. Dimension TL measured from maximum HD. 4. Outline in this zone is not controlled. 5. Dimension CD shall not vary more than 0.010 (0.25 mm) in zone P. This zone is controlled for automatic handling. 6. Leads at gauge plan...

1.50E272

1.51375E007

Vendor:TIPackage Cooled:SOP14SD/C:2007+

1.5440MHZ

1.544LK

D/C:04+

Transmitter Underrun: TxU is asserted during a transmit sequence when the service of TxBE has been delayed for one character time. This indicates the processor is not keeping up with the transmitter. Line fill depends on PCSAR11. TxU is reset by RESET or setting of TSOM (TDSR8), synchronized by the falling edge of TxC.

1.544LK

D/C:04+

Transmitter Underrun: TxU is asserted during a transmit sequence when the service of TxBE has been delayed for one character time. This indicates the processor is not keeping up with the transmitter. Line fill depends on PCSAR11. TxU is reset by RESET or setting of TSOM (TDSR8), synchronized by the falling edge of TxC.

1.544MHZ

READ ENABLE (R) A read cycle is initiated on the falling edge of the Read Enable (R) provided the Empty Flag (EF) is not set. The data is accessed on a First-In/First-Out basis, independent of any ongoing write operations. After Read Enable (R) goes HIGH, the Data Outputs (Q0 C Q8) will return to a high impedance condition until the next Read operation. When all data has been read from the FIFO, the Empty ...

1.54K OHM 0603 1 T-XPB

Package Cooled:YAGEO

1.55MC6.8AT3

1.58K 1 1/16W 0805 RES

1.5A/1KV

1.5K OHM 0402 1 T-XPB

Package Cooled:YAGEO

1.5K OHM 0402 5 T-XPB

Package Cooled:YAGEO

1.5K OHM 0603 1 T-XPB

Package Cooled:YAGEO

1.5K OHM 1210 5 T 1/4W

Package Cooled:YAGEO

1.5K/ 1206/ 5

D/C:06+

1.5K400

1.5KA20A-E3/54

1.5KD-5

1.5KE100A

Vendor:VISHAYPackage Cooled:DO201ADD/C:08+

The 1.5KE100A and 1.5KE100A are general-purpose dual channel PCM CODECs with pin-selectable µ- Law or A-Law companding. The device is compliant with the ITU G.712 specification. It operates from a single power supply (+5V for the 1.5KE100A, +3V for the 1.5KE100A) and is available in 20-pin PDIP (1.5KE100A only), SSOP, and 24-pin SOP package options. Functions performed include digitization and reconst...

1.5KE100CA-BP 1500W 100V

Package Cooled:DC

1.5KE100CA-T

Magnitude of Common Emitter Small-Signal Short-Circuit Forward Current Transfer Ratio IC = 1.0 Adc, VCE = 10 Vdc, f = 1.0 MHz Small-Signal Short-Circuit Forward Current Transfer Ratio IC = 1.0 Adc, VCE = 10 Vdc, f = 1.0 MHz Output Capacitance VCB = 10 Vdc, IE = 0, 100 kHz f 1.0 MHz

1.5KE10A

Vendor:VISHAYPackage Cooled:DO201ADD/C:08+

To obtain the highest transfection efficiency and low non-specific effects, optimize transfection conditions by varying DNA and Lipofectamine™ 2000 concentrations, and cell density. Make sure that cells are greater than 90% confluent and vary DNA (µg):Lipofectamine™ 2000 (µl) ratios from 1:0.5 to 1:5.

1.5KE10CA-BP 1500W 10V

Package Cooled:DC

1.5KE11

Vendor:ＶＩＳＨＡＹ

This block controls the transfer of data between the PCI memory and the internal memory. The Serial block signals when a cache fill/transfer is required in the three memory buffers. The CCB calculates the PCI address from the frame data and issues a command to the PCI interface. When the PCI interface signals that the data is available the CCB channels the data to the proper place in memory. This block i...

1.5KE110

With their 144 pin package, low power consumption, various 32-bit timers, 8-channel 10-bit ADC, PWM channels and up to 9 external interrupt pins these microcontrollers are particularly suitable for industrial control, medical systems, access control and point-of-sale. Number of available GPIOs ranges from 76 (with external memory) through 112 pins (single-chip). With a wide range of serial communications ...

1.5KE110A

Vendor:VISHAYPackage Cooled:DO201ADD/C:08+

1. If lead-bearing terminal plating is required, please contact your Diodes Inc. sales representative for availability and minimum order details. 2. Part mounted on FR-4 board with recommended pad layout, which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf. 3. Short duration pulse test used so as to minimize self-heating effect. 4. For Packaging Details, go to our website at h...

1.5KE110C

TAOperating free-air temperature−4085C NOTES: 4. VCCI is the VCC associated with the data input port. 5. VCCO is the VCC associated with the output port. 6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 7. For VCCI values not specifie...

1.5KE110CA

Vendor:VISHAYPackage Cooled:DO201ADD/C:08+

1.5KE12CA

Vendor:VISHAYPackage Cooled:DO201ADD/C:08+

NOTE: *Maximum IF(ON) is the maximum current required to trigger the output. For example, a 1.6mA maximum trigger current would require the LED to be driven at a current greater than 1.6mA to guarantee the device will turn on. A 10% guard band is recom- mended to account for degradation of the LED over its lifetime. The maximum allowable LED drive current is 60mA.

1.5KE130C

1.5KE130CA

Vendor:VISHAYPackage Cooled:DO201ADD/C:08+

The 1.5KE130CA powers-up in a low-power idle state; to initiate a temperature measurement and A-to-D conversion, the master must issue a Convert T [44h] command. Following the conversion, the resulting thermal data is stored in the 2-byte temperature register in the scratchpad memory and the 1.5KE130CA returns to its idle state. The 1.5KE130CA output data is calibrated in degrees centigrade; for Fahrenheit ...

1.5KE130CARL4

Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested.