100353QC

Vendor:FAIRCHILPackage Cooled:08+D/C:800

VDETDetection Voltage Compliance RDETMINMinimum Valid Signature Resistance RDETMAX Maximum Valid Signature Resistance Classification VCLASSClassification Voltage ICLASSClassification Current Compliance ITCLASSClassification Threshold Current

100353QC

Vendor:FAIRCHILPackage Cooled:08+D/C:800

VDETDetection Voltage Compliance RDETMINMinimum Valid Signature Resistance RDETMAX Maximum Valid Signature Resistance Classification VCLASSClassification Voltage ICLASSClassification Current Compliance ITCLASSClassification Threshold Current

100353QI

Vendor:NSCD/C:2004

Any offset and/or gain calibration procedures should not be implemented until devices are fully warmed up. To avoid interaction, offset must be adjusted before gain. The ranges of adjustment for the circuits in Figure 3 and 4 are guaranteed to compensate for the ADS-119's initial accuracy errors and may not be able to compensate for additional system errors.

100354033

100354033

100354035

Vendor:LGSPackage Cooled:BGAD/C:04+/05+

If the auto-increment flag is set, the three low order bits of the Control Register are automatically incremented after a read or write. This allows the user to program the registers sequentially. The contents of these bits will rollover to 000 after the last register is accessed.

100354658

Vendor:STPackage Cooled:PQFP

Rch Analog Input Pin Lch Analog Input Pin Mode Select 1 Pin Common Voltage Output Pin, VA/2 Bias voltage of ADC input. Analog Ground Pin Analog Power Supply Pin, 2.7 ∼ 5.5V Digital Power Supply Pin, 2.7 ∼ 5.5V Digital Ground Pin Audio Serial Data Output Pin L Output at Power-down mode. Output Channel Clock Pin L Output in Master Mode at Power-down mode. Master Clock Input Pin...

100354DM

D/C:08+

100354DM-MLS

D/C:08+

100354DMQB

D/C:08+

100354FC

Vendor:NSCD/C:94

100354PC

Vendor:nscPackage Cooled:dc97D/C:15

The HIP6017 provides the power control and protection for three output voltages in high-performance microprocessor and computer applications. The IC integrates a PWM controller, a linear regulator and a linear controller as well as the monitoring and protection functions into a single 28 lead SOIC package. The PWM controller regulates the microprocessor core voltage with a synchronous-rectified ...

100354QC

The DS3150 performs all the functions necessary for interfacing at the physical layer to DS3, E3, and STS-1 lines. The device has independent receive and transmit paths and a built-in jitter attenuator (Figure 1-1). The receiver performs clock and data recovery from a B3ZS- or HDB3-coded alternate mark inversion (AMI) signal and monitors for loss-of-signal. The receiver optionally performs B3ZS/HDB3 decodin...

100355

Vendor:HARRISPackage Cooled:PLCC28D/C:91

The power MOSFET outputs of these devices are similar to the International Rectifier type IRFP448. These devices feature an excellent combination of fast switching, ruggedized device design, low on-resistance, and cost effectiveness.

100355 MW8

Vendor:NSCD/C:2002

100355DC

Vendor:NSCPackage Cooled:DIPLD/C:0812+NEW

RSEN: This pin is used to sense the voltage across the synchronous rectifier for commutation. In boost configurations, connect this pin through a 1-kΩ resistor to the junction of the two MOSFETs and the inductor. In flyback and SEPIC configurations, connect this pin through a 1-kΩ resistor to the junction of the drain of the synchronous rectifier and the secondary side winding of the coupled in...

100355DM

D/C:08+

100355DM-MLS

D/C:08+

100355DM-MLS

D/C:08+

100355DMQB

D/C:08+

All parameters specified at TA = -40C to +85C unless otherwise noted. These parameters guaranteed by design and characterization. Human Body Model per MIL-STD-883, Method 3015, CDischarge = 100pF, RDischarge = 1.5KΩ, VN grounded. Standard IEC 61000-4-2 with CDischarge = 150pF, RDischarge = 330Ω, VN grounded. These measurements performed with no external capacitor on CHX.

100355QC

The FDC37M81x supports the ISA Plug-and- Play Standard (Version 1.0a) and provides the recommended functionality to support Windows '95/98. The I/O Address, DMA Channel and hardware IRQ of each logical device in the FDC37M81x may be reprogrammed through the internal configuration registers. There are 480 I/O address location options, a Serialized IRQ interface, and three DMA channels.

100356066

Vendor:STPackage Cooled:PQFP

Parameter Positive Supply Voltage (VCC to GND) Negative Supply Voltage (VEE to GND) Ground Voltage Differential Input Common-Mode Voltage Differential Input Voltage Input Voltage, Latch Controls Output Current Operating Temperature, Ambient Operating Temperature, Junction Storage Temperature Range

100356066

Vendor:STPackage Cooled:PQFP

Parameter Positive Supply Voltage (VCC to GND) Negative Supply Voltage (VEE to GND) Ground Voltage Differential Input Common-Mode Voltage Differential Input Voltage Input Voltage, Latch Controls Output Current Operating Temperature, Ambient Operating Temperature, Junction Storage Temperature Range

100356068

Vendor:STPackage Cooled:PQFP

During a reprogram cycle, the address locations and 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a program cycle, the device will automatically erase the page and then program the latched data using an internal control timer. The end of a program cycle can be detected by DATA polling of I/O7. Once the end of a program cycle has ...

100356070

Vendor:AGEREPackage Cooled:TQFPD/C:06+

This MOSFET is an enhancement-mode silicon-gate power field effect transistor of the vertical DMOS (VDMOS) structure. It is specifically designed and processed to be radiation tolerant. The MOSFET is well suited for applications exposed to radiation environments such as switching regulation, switching converters, power distribution, motor drives and relay drivers as well as other power con...

100356219

100356219

100356223

Vendor:AGEREPackage Cooled:TQFPD/C:06+

or bidirectional data flow in bursts. An automatic power down feature, controlled by CE0 and CE1, permits the on-chip circuitry of each port to enter a very low standby power mode. The 70V3319/99 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controllable by the OPT pins. The power supply for the core of the device (VDD) remains at 3.3V.

100356236

Vendor:SEAGATEPackage Cooled:QFPD/C:05+

In voltage regulator applications where very large load cur- rents are present, the load connection is very important. The path connecting the output of the regulator to the load must be extremely low impedance to avoid affecting the load regulation specifications. Any impedance in this path will form a voltage divider with the load. The MSK 5115 series requires a mini- mum of 10mA of load current to st...

100356236

Vendor:SEAGATEPackage Cooled:QFPD/C:05+

In voltage regulator applications where very large load cur- rents are present, the load connection is very important. The path connecting the output of the regulator to the load must be extremely low impedance to avoid affecting the load regulation specifications. Any impedance in this path will form a voltage divider with the load. The MSK 5115 series requires a mini- mum of 10mA of load current to st...

10036

Vendor:ERICSSOND/C:08+

The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column. Guaranteed, not production tested. Leakage parameters are 100% tested at maximum rated hot operating temperature, and guaranteed by correlation at +25C. SOT packaged parts are 100% tested at +25C. Limits at maximum and minimum rated temperature are guaranteed by design and correlation limits at +25C.

100360

Vendor:NSPackage Cooled:DIP

High DC spark-over voltage in spite of compact size (2types; 2700, 3000V) . DSS-272M and DSS-302M each correspond to 1200volts rms 3seconds or 1000volts rms 1minute and 1500volts rms 1minute AC withstanding voltage tests respectively. Quick response for surge voltage and low limiting voltage. Small capacitance and excellent insulation resistance (100MΩmin) Stable for repeated electrostatic test co...

100360DC

There are recommended techniques such as grooves and ribs which may be used on a printed circuit board to achieve desired creepage and clearances. Creepage and clearance distances will also change depending on factors such as pollution degree and insulation level.

100360DM

100360DM-MLS

D/C:08+

100360DMQB

100360FC

Vendor:NSCD/C:95

100360PC

Vendor:NSPackage Cooled:DIP/24

This FIFO configuration will not latch up due to any of the above radiation exposure conditions when applied under recommended operating conditions. Fabrication with the SIMOX substrate with its oxide isolation ensure latchup immunity.

100360QC

Vendor:NSPackage Cooled:PLCC28D/C:03+

100360QCX

Vendor:NSPackage Cooled:PLCCD/C:06+

Split power supply: The receiver circuit only is connected to a regulated power supply. The high IRED current can be supplied by a less controlled power line or directly from the battery. That feature saves power supply costs. TELEFUNKEN introdused this feature as the world first with the 4000 series

100361

Vendor:118Package Cooled:HARRIS

100361

Vendor:118Package Cooled:HARRIS

100361/RAD RJ-008

Vendor:HARRISPackage Cooled:DIP40D/C:2007+

100361705

Vendor:AGEREPackage Cooled:TQFPD/C:06+

(VDD = +2.7V to +3.6V; unipolar input mode; COM = GND, fSCLK = 500kHz, external clock mode (50% duty cycle); 10 clocks/conver- sion cycle (50ksps); 1µF capacitor at REF, external +2.048V reference at REF; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25C.)

100361705

Vendor:AGEREPackage Cooled:TQFPD/C:06+

(VDD = +2.7V to +3.6V; unipolar input mode; COM = GND, fSCLK = 500kHz, external clock mode (50% duty cycle); 10 clocks/conver- sion cycle (50ksps); 1µF capacitor at REF, external +2.048V reference at REF; TA = TMIN to TMAX; unless otherwise noted. Typical values are at TA = +25C.)

100361764

100361767

100362028

Vendor:STPackage Cooled:PQFP

5V TOLERANT INPUTS HIGH SPEED: tPD = 7.5ns (MAX.) at VCC = 3V LOW POWER DISSIPATION: ICC = 1µA (MAX.) at TA = 25C TYPICAL HYSTERESIS: Vh=1V at VCC=4.5V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 5.5V (1.2V Data Retention) IMPR...

100363DM

D/C:08+

100363DM-MLS

D/C:08+

True clock of differential pair CPU outputs. These are current mode outputs. External resistors are required for voltage bias. Frequency select pin, see Frequency table for functionality This pin establishes the reference current for the differential current- mode output pairs. This pin requires a fixed precision resistor tied to ground in order to establish the appropriate current. 475 ohms is the stan...

100363DMQB

D/C:08+

100363DMQB

D/C:08+

100363PC

Vendor:Fairchild

element. Because the PMOS pass element behaves as a low-value resistor, the dropout voltage is very low, typically 105 mV at 10 mA of load current, and is directly proportional to the load current. The quiescent current is ultralow (1.2 µA typically) and is stable over the entire range of output load current (0 mA to 10 mA). When properly configured with a pullup resistor, the PG output can be ...

100364DM

D/C:08+

100364DM-MLS

D/C:08+

100364DMQB

D/C:08+

100364DMQB

D/C:08+

100364DMQB/Q 5962-9459201MXA

Vendor:NSPackage Cooled:CDIP24(中体)D/C:9743

100364FC

Vendor:QFPPackage Cooled:NsD/C:93+

3. The maximum allowable power dissipation of any TA (ambient temperature) is PD(max) = TJ(max) C TA / JA. Exceeding the maximum allowable power dissipation will result in excessive die temperature, and the regulator will go into thermal shutdown.

100364FMQB

Vendor:NSCD/C:2005

100364PC

Vendor:NSPackage Cooled:DIP/24

The product information and the selection guides facilitate selection of the CDIL's Discrete Semiconductor Device(s) best suited for application in your product(s) as per your requirement. It is recommended that you completely review our Data Sheet(s) so as to confirm that the Device(s) meet functionality parameters for your application. The information furnished on the CDIL Web Site/CD is believed to be ...

100366185

100367024

Vendor:STPackage Cooled:PQFP

Tantalum Molded Axial/Radial Capacitors T322/T323 (CX01 & CX05) MIL-C-49137/1 & 5 Series Axial Performance Characteristics42 Outline Drawing43 Dimensions43 Ordering Information43 Ratings and Part Number Reference44-48

100367025

Vendor:STPackage Cooled:PQFP

The PCS-CDMA transmit chain provides excellent Adjacent Channel Power Rejection and a low noise floor for compliance with TIA98-C requirements. The CDMA driver has a high output power for direct interfacing with CDMA Power Amplifiers and incorporates a switch on the output to support split-band

100367026

Vendor:STPackage Cooled:PQFP

• THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FPGAS Enhanced Pin Locking Capability Three Dedicated Clock Input Pins Synchronous and Asynchronous Clocks Programmable Output Slew Rate Control Flexible Pin Placement Optimized Global Routing Pool Provides Global Interconnectivity

100367048

Vendor:STPackage Cooled:PQFP

Information present at any register is transferred to the respective latch when the STROBE is high (serial-to-parallel conversion). The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed (STROBE tied high) will require that the BLANKING input be high during serial data entry.

100367049

Vendor:AGEREPackage Cooled:TQFPD/C:06+

Configurable Logic Blocks (CLBs) provide functional elements for combinatorial and synchronous logic, including basic storage elements. BUFTs (3-state buffers) associated with each CLB element drive dedicated segmentable horizontal routing resources. Block SelectRAM memory modules provide large 18-Kbit storage elements of True Dual-Port RAM. Multiplier blocks are 18-bit x 18-bit dedicated multiplier...

100367050

Vendor:STPackage Cooled:TQFPD/C:06+

Microstrip Shunt Connections for HSMP-482x Series In Figure 15, the center conductor of the microstrip line is inter- rupted and leads 1 and 2 of the HSMP-482x diode are placed across the resulting gap. This forces the 0.5 nH lead inductance of leads 1 and 2 to appear as part of a low pass filter, reducing the shunt parasitic inductance and increasing the maximum available attenuation. The 0.3 nH of...

100367050

Vendor:STPackage Cooled:TQFPD/C:06+

Microstrip Shunt Connections for HSMP-482x Series In Figure 15, the center conductor of the microstrip line is inter- rupted and leads 1 and 2 of the HSMP-482x diode are placed across the resulting gap. This forces the 0.5 nH lead inductance of leads 1 and 2 to appear as part of a low pass filter, reducing the shunt parasitic inductance and increasing the maximum available attenuation. The 0.3 nH of...

100369972

Vendor:N/APackage Cooled:N/AD/C:08+09+

Note 4: The HALT mode will stop CKI from oscillating in the RC and crystal configurations by bringing CKI high. HALT test conditions: L, and G0..G5 ports configured as outputs and set high. The D port set to zero. All inputs tied to VCC. The comparator is disabled.

100370514

100370DC

Vendor:NSCD/C:03+04+

100370DMQB

Vendor:NSCD/C:2003

100370DMQB

Vendor:NSCD/C:2003

100370PC

Vendor:NSPackage Cooled:DIPD/C:2005+

The XC7336 can be used in systems with two different supply voltages: 3.3 V and 5 V. Each XC7336 device has separate VCC connections to the internal logic (VCCINT) and to the I/O pads (VCCIO). VCCINT must always be con- nected to a 5 V supply. VCCIO may be connected to either 3.3 V or 5 V, depending on the output interface require- ment.

100370QI

Vendor:Fairchild

The CM2010 connects between a video graphics con- troller, embedded in a PC or in a graphics adapter card, and the VGA port connector. The CM2010 inte- grates ESD protection for 3 VGA output signals imple- mented with low-capacitance current steering diodes such that an ESD pulse is diverted into either the posi- tive supply rail or ground, where it may be safely dissi- pated.

100371

Vendor:NSPackage Cooled:DIP

The minimum bending radius is 45 mm. The mounting surface of the filters faces the bottom side of the embossed carrier tape. The marking of the filters is able to read if the view is directed on the upper side of the carrier tape with the sprocket holes on the right side of the tape.

100371DM

D/C:08+

100371DM-MLS

D/C:08+

Temperature Sensor can be connected, on the board, to any of the ADC inputs to monitor the on-chip temperature Two four-input Quadrature Decoders or two additional Quad Timers Four dedicated general-purpose Quad Timers totaling three dedicated pins: Timer C with one pin and Timer D with two pins Optional on-chip regulator FlexCAN (CAN Version 2.0 B-compliant ) module with 2-pin port for transmit and r...

100371DM-MLS

D/C:08+

Temperature Sensor can be connected, on the board, to any of the ADC inputs to monitor the on-chip temperature Two four-input Quadrature Decoders or two additional Quad Timers Four dedicated general-purpose Quad Timers totaling three dedicated pins: Timer C with one pin and Timer D with two pins Optional on-chip regulator FlexCAN (CAN Version 2.0 B-compliant ) module with 2-pin port for transmit and r...

100371DMQB

D/C:08+

100371DMQB

D/C:08+

100371FC

Vendor:nscPackage Cooled:dc92D/C:220

to that code position, and there is no need to replicate this information in the sub-repertoire definition. At present, a request to ISO/IEC JTC 1/SC 2 (which will be assigned to ISO/IEC SC 2/WG 2) to issue a collection identifier and enter that into the Annex A of the standard is all that is needed to identify such a sub-repertoire.

100371PC

Vendor:NSPackage Cooled:DIP/24

Extreme care was taken to develop proven reference designs that both reduce cost and provide a platform that increases the speed of product development. Minimal in-house RF expertise is required to quickly develop and produce low-cost cable modems.

100371QIX

The sensor provides a self-test feature allowing the verification of the mechanical and electrical integrity of the accelerometer at any time before or after installation. A fourth plate is used in the g-cell as a self-test plate. When a logic high input to the self-test pin is applied, a calibrated potential is applied across the self-test plate and the moveable plate. The resulting electrostatic force (...

100371QS

Vendor:PLCC28Package Cooled:75D/C:NS

Hynix HYMD264646B(L)8-M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.

10037A

Vendor:ELMOSPackage Cooled:SOP28WD/C:2007+

Double superhet architecture for high degree of image rejection FSK for digital data and FM reception for analog signal transmission FM/FSK demodulation with phase-coincidence demodulator Low current consumption in active mode and very low standby current Switchable LNA gain for improved dynamic range RSSI allows signal strength indication and ASK detection Surface mount package LQFP32

10037FMQB

Vendor:FD/C:00

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and the functional operation of the device under these or any other conditions above those indicated in the operation of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect reliability.

100382693

Vendor:SEAGATEPackage Cooled:QFPD/C:05+

5V Trip Point 5V Trip Point 3.3V Trip Point 3.3V Trip Point Output Capacitance PBRST Manual Reset Minimum Low Time PBRST Stable LOW to Reset Active Reset Active Time VCC Detect Noise Immunity VCC Slew Rate VCC Slew Rate VCC Detect to RESET or RESET

100382693

Vendor:SEAGATEPackage Cooled:QFPD/C:05+

5V Trip Point 5V Trip Point 3.3V Trip Point 3.3V Trip Point Output Capacitance PBRST Manual Reset Minimum Low Time PBRST Stable LOW to Reset Active Reset Active Time VCC Detect Noise Immunity VCC Slew Rate VCC Slew Rate VCC Detect to RESET or RESET

100383005

Vendor:SEAGATEPackage Cooled:QFPD/C:05+

The PIC12CE67X device is supported by a full-fea- tured macro assembler, a software simulator, an in-cir- cuit emulator, a low-cost development programmer and a full-featured programmer. A C compiler and fuzzy logic support tools are also available.

100387508

10038774-22ALF

Vendor:FCID/C:07+

All parameters, unless otherwise specified, are measured at ambient temperature 23ºC. Maximum make current refers to inrush current of motor load. Electrical life obtained at motor load of locked rotor at 20A, 14VDC with operating frequency of 6 ops/min. Custom-made services available with operational quantity. Please let us know your special requirements. Specifications subject to change without prior ...

10038A

Vendor:QFP-44Package Cooled:ELMOSD/C:2004+

MPL Physical Layer (MPL-0) Pin selectable Master / Slave mode Frequency Reference Transport Complete LVCMOS / MPL Translation Interface Modes: 16-bit CPU, i80 or m68 style RGB565 with glue logic −30˚C to 85˚C Operating Range Link power down mode reduces IDDZ < 10 µA Dual Display Support (CS1* & CS2*) Via-less MPL interconnect feature 3.0V Supply Voltage (VDD and...

100390AB

Vendor:FAIRCHILPackage Cooled:08+D/C:800

Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing Write Enable (WE) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

100390DC

Vendor:NSPackage Cooled:DIPD/C:08+

Note: ww represents the date code and pls refer to Date Code Rule before Package Dimension. * A line on top of the first letter represents lead free plating such as BCL. Please consult AME sales office or authorized Rep./Distributor for the availability of package type.

100390DM

D/C:08+

100390DM-MLS

D/C:08+

100390DMQB

D/C:08+

100390QC

Vendor:NSPackage Cooled:PLCC28

3.1 The END USER shall have the right to transfer the AMBE-2000™ Vocoder Chip and all rights under this Agreement to a third party by either (i) providing the third party with a copy of this Agreement or (ii) providing the third party with an agreement written by the END USER ( hereinafter END USER Agreement) so long as the END USER Agreement is approved in writing by DVSI prior to transfer of the AM...