Index "1"Vendor:ONSD/C:08+
ICCL106 ICCZVCC = 5.5 V98 † All typical values are at VCC = 5 V, TA = 25C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.
Vendor:STPackage Cooled:DO201ADD/C:08+
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
Vendor:VISHAYPackage Cooled:DO201D/C:07
Vendor:VISHAYD/C:08+
The TPS6202x is a high efficiency synchronous step-down dc-dc converter optimized for battery pow- ered portable applications. This device is ideal for portable applications powered by a single Li-Ion battery cell or by 3-cell NiMH/NiCd batteries. With an output voltage range from 6.0 V down to 0.7 V, the device supports low voltage DSPs and processors in PDAs, pocket PCs, as well as notebooks and s...
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
When presented with a composite video input signal, the GS4882 outputs composite sync, vertical sync, back porch and odd/even field information. The GS4982 substitutes the composite sync output with a horizontal sync output, for those applications requiring horizontal sync extraction.
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
Notes: 1. Dominant Wavelength, ëd, is derived from the CIE Chromaticity Diagram and represents the color of the lamp. 2. 1/2 is the off-axis angle where the luminous intensity is one half the on-axis intensity. 3. The luminous intensity is measured on the mechanical axis of the lamp package. 4. The optical axis is closely aligned with the package mechanical axis.
Hynix HYMP112S64MP8 series is unbuffered 200-pin double data rate 2 Synchronous DRAM Small Outline Dual In-Line Memory Mod- ules (DIMMs) which are organized as 128Mx64 high-speed memory arrays. Hynix HYMP112S64MP8 series consists of eight 128Mx8 DDR2 SDRAMs in 63 ball FBGA Dual Die Pacakge(DDP)s. Hynix HYMP112S64MP8 series provide a high performance 8-byte interface in 67.60mm X 30.00mm form factor of industr...
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
Continuous Drain Current, VGS @ 10V Continuous Collector Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw.
Package Cooled:DC
Vendor:N/APackage Cooled:96+D/C:10
The 74HC/HCT153 have two identical 4-input multiplexers which select two bits of data from up to four sources selected by common data select inputs (S0, S1). The two 4-input multiplexer circuits have individual active LOW output enable inputs (1E, 2E) which can be used to strobe the outputs independently. The outputs (1Y, 2Y) are forced LOW when the corresponding output enable inputs are HIGH.
The CY22393, CY22394, and CY22395 are a family of parts designed as upgrades to the existing CY22392 device. These parts have similar performance to the CY22392, but provide advanced features to meet the needs of more demanding applications.
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
Specifications in standard type face are for TJ = 25˚C and those with boldface type apply over the full Operating Tempera- ture Range (TJ = −40˚C to +125˚C) Unless otherwise specified. VIN = 12V and IL = 0A, unless otherwise specified.
Vendor:STPackage Cooled:DO201ADD/C:08+
The 1.5KE170CA is designed to be a single chip termination subsystem for use in PnP SCSI systems, Figure 1. When embedded on a host bus adapter or mother- board, the 1.5KE170CA can automatically sense the ter- mination status of the SCSI bus and attach or isolate its resistors as needed to maintain proper bus termination. External and internal active termination can be provided by the DS21S07A.
Vendor:DO201Package Cooled:VIS
Vendor:STPackage Cooled:DO201ADD/C:08+
Parameter Voltage input low Voltage input high Voltage output low Voltage output high Input/output Leakage current Input/output Leakage current Supply current Output current low All pins except ACCRQ ACCRQ Input current low Supply voltage
Package Cooled:DC
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
Offered in 128Mx8bit the K9F1G08X0A is 1G bit with spare 32M bit capacity. Its NAND cell provides the most cost-effective solution for the solid state mass storage market. A program operation can be performed in typical 200µs on the 2112-byte page and an erase operation can be performed in typical 2ms on a 128K-byte block. Data in the data page can be read out at 30ns(50ns with 1.8V device) cycle time p...
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
7) Optional: Another method of determining gain is by using a network analyzer. This has the advantage of displaying gain vs. a swept frequency band, in addi- tion to displaying input and output return loss. Refer to the user manual of the network analyzer for setup details.
s JEDEC-standard 144 pin, Small-Outline, Dual in line Memory Module (SODIMM) s Serial Presence Detect with E2PROM s Nonbuffered s Fully Synchronous, All Signals Registered on Positive Edge of System Clock s Single +3.3V ( 0.3V) Power Supply s All Device Pins are LVTTL Compatible s 4096 Refresh Cycles every 64 ms s Self-Refresh Mode s Internal Pipelined Operation; Column Address can be changed ev...
Vendor:STPackage Cooled:DO-201ADD/C:05+
Operating from a wide-input voltage range of 7 V to 36 V, the PTN78000 provides high-efficiency, step-down voltage conversion for loads of up to 1.5 A. The output voltage is set using a single external resistor, and may be set to any value within the range, 2.5 V to 12.6 V. The output voltage can be as little as 2 V lower than the input, allowing operation down to 7 V, with an output voltage of 5 V.
Vendor:STPackage Cooled:DOD/C:1
The FCT138T is a 1-of-8 decoder. The FCT138T accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight mutually exclusive active LOW outputs (O0CO7). The FCT138T features three enable inputs, two active LOW (E1, E2) and one active HIGH (E3).
Vendor:STPackage Cooled:DO201ADD/C:08+
The 1.5KE22CA has as an on-chip peripheral an 8-channel 8-bit Analog-to-Digital Converter This A D converter can operate in a single-ended mode where the analog input volt- age is applied across one of the eight input channels (D0C D7) and AGND The A D converter can also operate in a differential mode where the analog input voltage is applied across two adjacent input channels The A D converter will c...
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
Notes: 1. Please do not use the soldering iron due to avoid high stress to the EFP package. 2. The material of lead is exposed for cutting plane. Therefore, soldering nature of lead tip part is considered as unquestioned. Please kindly consider soldering nature.
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
inputs generated internally to allow synchronous or asynchronous data transfer from master to slave. Isolation from external noise and the effects of load- ing is provided by output buffering. PARALLEL OPERATION C A high P/S input signal allows data transfer into the register via the parallel data lines synchronously with the positive transition of the clock provided the A/S input is low. If the A/S ...
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
inputs generated internally to allow synchronous or asynchronous data transfer from master to slave. Isolation from external noise and the effects of load- ing is provided by output buffering. PARALLEL OPERATION C A high P/S input signal allows data transfer into the register via the parallel data lines synchronously with the positive transition of the clock provided the A/S input is low. If the A/S ...
Vendor:STPackage Cooled:DO201ADD/C:08+
The oscillator uses an external, low-cost 32.768kHz crystal. All compensation and trim components are integrated on the chip. This eliminates several external discrete components and a trim capacitor, saving board area and component cost.
Vendor:GSPackage Cooled:06+D/C:17299
The IDT5T907 2.5V single data rate (SDR) clock buffer is a user-selectable single-ended or differential input to ten single-ended outputs buffer built on advanced metal CMOS technology. The SDR clock buffer fanout from a single or differential input to ten single-ended outputs reduces the loading on the preceding driver and provides an efficient clock distribution network. The IDT5T907 can act as a trans...
Vendor:VISHAYD/C:08+
• Plastic package has Underwriters Laboratory Flammability Classification 94V-0 • Dual rectifier construction, positive center tap • Metal silicon junction, majority carrier conduction • Low leakage current, Low power loss, High efficiency • Guardring for overvoltage protection • For use in high frequency inverters, free wheeling, and polarity protection applications
D/C:0807+
The second mechanism controls the replacement algorithm, when a TLB miss occurs. The RC4700 provides a random replacement algo- rithm to select a TLB entry to be written with a new mapping; however, the processor provides a mechanism whereby a system specific number
Package Cooled:DC
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
The MM74HC574 high speed octal D-type flip-flops utilize advanced silicon-gate P-well CMOS technology. They pos- sess the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads. Due to the large output drive capability and the 3-STATE feature, these devices are ide- ally suited for interfacing with bus lines in a bus organized...
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
The input clock frequency, Fin, and the internal divider count, Cdiv, determine the Modulation Rate. In some SSCG clock generators, the selected range determines the internal divider count. In other SSCG clocks, the internal divider count is fixed over the operating range of the part. The SM560 and SM561 have a fixed divider count, as listed below.
Vendor:DIPPackage Cooled:GSD/C:07+
The OPA703 and OPA704 series are fully specified and guaranteed over the supply range of 2V to 6V. Input swing extends 300mV beyond the rail and the output swings to within 40mV of the rail. The single versions (OPA703 and OPA704) are available in the MicroSIZE SOT23-5 and in the standard SO-8 surface- mount, as well as the DIP-8 packages. Dual versions (OPA2703 and OPA2704) are available in the MSOP-8...
Vendor:DIPPackage Cooled:GSD/C:07+
The OPA703 and OPA704 series are fully specified and guaranteed over the supply range of 2V to 6V. Input swing extends 300mV beyond the rail and the output swings to within 40mV of the rail. The single versions (OPA703 and OPA704) are available in the MicroSIZE SOT23-5 and in the standard SO-8 surface- mount, as well as the DIP-8 packages. Dual versions (OPA2703 and OPA2704) are available in the MSOP-8...
Vendor:STPackage Cooled:DOD/C:02
Notes ; 1O Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature 2 L=10.0mH, I =-2.8A, V =-25V, R =27Ω*, Starting T =25oCOASDDGJ 3___O ISD < -3.6A, di/dt < 300A/µs, VDD< BVDSS , Starting TJ =25oC 4_O Pulse Test : Pulse Width = 250µs, Duty Cycle< 2% 5O Essentially Independent of Operating Temperature
Vendor:STPackage Cooled:DO201ADD/C:08+
2. q: Both read and write access allowed. W: Write access allowed (Cannot be read.) : No access is allowed. Chip operation is not guaranteed if registers for which access is only allowed in the slave state are accessed in either the run or hold states.
Vendor:GIPackage Cooled:N/AD/C:96+
The HS-0548RH and HS-0549RH are radiation hardened analog multiplexers with Active Overvoltage Protection and guaranteed rON matching. Analog input levels may greatly exceed either power supply without damaging the device or disturbing the signal path of other channels. Active protection circuitry assures that signal fidelity is maintained even under fault conditions that would destroy other multiplex...
Vendor:DIODESD/C:06+
A/D Conversion Sequence If a Start command is written (or generated automati- cally in the free-running auto-convert mode), both channels are converted, and the results of both meas- urements are available after the end of conversion. A BUSY status bit in the status byte shows that the de- vice is actually performing a new conversion; however, even if the ADC is busy, the results of the previous conversion ...
Vendor:COMONPackage Cooled:DO201AED/C:07+
Designed for use in solid state relays, MPU interface, TTL logic and any other light industrial or consumer application. Supplied in an inexpensive TOC92 package which is readily adaptable for use in automatic insertion equipment. OneCPiece, InjectionCMolded Package Blocking Voltage to 600 Volts Sensitive Gate Triggering in Four Trigger Modes (Quadrants) for all possible Combinatio...
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to
Package Cooled:DC
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
(*) CPD is defined as the value of the ICs internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD VCC fIN + ICC
Vendor:STPackage Cooled:DO201ADD/C:08+
Eight Independent Channel 12-Bit DACs with Output Amplifiers Low Power 320 mW (typ.) Parallel Digital Data and Address Port Double Buffered Data Interface Readback of DAC Latches Zero Volt Output Preset (Data = 10 .. 00) 12-Bit Resolution, 11-Bit Accuracy Extremely Well Matched DACs Extremely Low Analog Ground Current (<60µA/Ch...
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
DMT Signal A DMT signal is basically the sum of N inde- pendently QAM modulated signals, each carried over a distinct carrier. The frequency separation of each carrier is 4.3125kHz with a total number of 256 carriers (ANSI). For N large, the signal can be modelled by a gaussian process with a certain amplitude probability density function. Since the maximum amplitude is expected to arise very rarel...
Vendor:STPackage Cooled:DO201ADD/C:08+
The device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q, as shown in Table 3. and Figure 2.. The device is selected when Chip Select (S) is tak- en Low. Communications with the device can be interrupted using Hold (HOLD). The devices are available in three different ver- sions identified by a specific marking (see Table 2.).
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
The TPS72xx is offered in 2.5-V, 3-V, 3.3-V, 4.85-V, and 5-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.2 V to 9.75 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges (3% for adjustable version).
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
The A128 devices have a 10-bit-resolution sample-and-hold MibADC. The MibADC channels can be converted individually or can be grouped by software for sequential conversion sequences. There are three separate groupings, two of which are triggerable by an external event. Each sequence can be converted once when triggered or configured for continuous conversion mode. For more detailed functional information ...
Vendor:STPackage Cooled:DOD/C:99
The AHC240 devices are organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state.
Vendor:GIPackage Cooled:N/AD/C:96+
The input thresholds can be globally configured for either TTL ( 1.2 V threshold) or CMOS ( 2.5 V threshold ), just like XC2000 and XC3000 inputs. Note that the two global adjustments of input threshold and output level are inde- pendent of each other.
Vendor:GIPackage Cooled:N/AD/C:96+
P2ROM stands for Production Programmed ROM. This exclusive Oki technology utilizes factory test equipment for programming the customers code into the P2ROM prior to final production testing. Advancements in this technology allows production costs to be equivalent to MASKROM and has many advantages and added benefits over the other non-volatile technologies, which include the following;
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
1.5KE6.8A/HL/ML/NL PIN DESCRIPTIONS VDD C This is the supply input for the circuits and the sensor heater in the accelerometer. The DC voltage should be between 2.7 and 5.25 volts. Refer to the section on PCB layout and fabrication suggestions for guidance on external parts and connections recommended.
The EP16VC is a differential receiver/driver. The device is functionally equivalent to the EP16 and LVEP16 devices but with high gain and enable output. The EP16VC provides an EN input which is synchronized with the data input (D) signal in a way that provides glitchless gating of the QHG and QHG outputs. When the EN signal is LOW, the input is passed to the outputs and the data output equals the dat...
Vendor:STPackage Cooled:DO-201ADD/C:05+
PARAMETER VCC Under-Voltage Lockout Start Threshold Stop Threshold Hysteresis General VCC Supply Current VIDPWR Supply Current VOSNS- Current VRHOT Comparator HOTSET Bias Current Output Voltage VRHOT Leakage Current Threshold Hysteresis
Package Cooled:DC
controller/timers, a message unit with an Intelligent Input/Output (I2O) message control- ler, and an Inter-integrated Circuit (two-wire interface) controller. The integration reduces the overall packaging requirements and the number of discrete devices required for an embedded system.
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
The Hynix HYM76V4M635HGT6 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 32Mbytes memory. The Hyundai HYM76V4M635HGT6 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
The 1.5KE68CA belongs to a family of products suit- able for a variety of applications: C Motion activated functions in mobile terminals C Gaming and Virtual Reality input devices C Free-fall detection and Data protection C Antitheft systems and Inertial Navigation C Appliance Control and Robotics
Vendor:STPackage Cooled:DO-201ADD/C:06+PBF
− Communication Receivers − Base Station Infrastructure Test and Measurement Instrumentation Single and Multichannel Digital Receivers Communication Instrumentation − Radar, Infrared Video and Imaging Medical Equipment Military Equipment
Vendor:STPackage Cooled:DO-201ADD/C:06+PBF
− Communication Receivers − Base Station Infrastructure Test and Measurement Instrumentation Single and Multichannel Digital Receivers Communication Instrumentation − Radar, Infrared Video and Imaging Medical Equipment Military Equipment
The LM5000EP is a monolithic integrated circuit specifically designed and optimized for flyback, boost or forward power converter applications. The internal power switch is rated for a maximum of 80V, with a current limit set to 2A. Protecting the power switch are current limit and thermal shutdown circuits. The current mode control scheme provides excellent rejection of line transients and cycle-by-cy...
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
system under rapidly changing current load conditions, designers generally use several output capacitors connected in parallel. Such an arrangement serves to minimize the effects of the parasitic resistance (ESR) and inductance (ESL) that are present in all capacitors. Cost-effective solutions that sufficiently limit ESR and ESL effects generally result in total capacitance values in the range of hundre...
Vendor:GSPackage Cooled:DO201AAD/C:07+
The DS1543 is in the write mode whenever WE and CE are in their active state. The start of a write is referenced to the latter occurring transition of WE or CE . The addresses must be held valid throughout the cycle. CE and WE must return inactive for a minimum of tWR prior to the initiation of a subsequent read or write cycle. Data in must be valid tDS prior to the end of the write and remain va...
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
4.4.3 Group C inspection. Group C inspection shall be conducted in accordance with the conditions specified for subgroup testing in appendix E, table VII of MIL-PRF-19500. Electrical measurements (end points) and delta requirements shall be in accordance with the applicable steps of table II herein.
Vendor:COMONPackage Cooled:DO201ADD/C:05+
Preliminary product information describes products that are in production, but for which full characterization data is not yet available. Cirrus Logic, Inc. and its subsidiaries (Cirrus) believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided AS IS without warranty of any kind (express or implied). Customer...
Vendor:VISHAYPackage Cooled:DO201ADD/C:08+
Ultra−Low RDS(on), Single Base, Advanced Technology SPICE Parameters Available Diode is Characterized for Use in Bridge Circuits IDSS and VDS(on) Specified at Elevated Temperatures High Avalanche Energy Capability ESD JEDAC Rated HBM Class 1, MM Class B, CDM Class 0
The HA-460 Series of quartz crystal oscillators are resistance welded in an all metal package, offering RFI shielding, and are designed to survive standard wave soldering operations without damage. Insulated standoffs to enhance board cleaning are standard.
Vendor:COMONPackage Cooled:DO201ADD/C:05+
When Vcc is between 0 to 1.5V during power up or power down, the outputs of the device are in the high-impedance state. To ensure the high-impedance state above 1.5V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver.
D/C:06+
Package Cooled:MEC
Vendor:56780Package Cooled:OND/C:2008
If the A5, A1, A0 address line inputs are LOW then the IDT72V8985 Internal Control Register is addressed (see Table 2). If A5 input line is high, then the remaining address input lines are used to select the 32 possible channels per input or output stream. As explained in the Control Register description, the address input lines and the Stream Address bits (STA) of the Control register give the user the c...
Vendor:ONPackage Cooled:DO-214AB(SMC)D/C:06+
The ISL6227 can control two independent output voltages adjustable from 0.9V to 5.5V, or by activating the DDR pin, transform into a complete DDR memory power supply solution. In DDR mode, CH2 output voltage VTT tracks CH1 output voltage VDDQ. CH2 output can both source and sink current, an essential power supply feature for DDR memory. The reference voltage VREF required by DDR memory is generated as well.
Vendor:ONPackage Cooled:DO-214AB(SMC)D/C:06+
The ISL6227 can control two independent output voltages adjustable from 0.9V to 5.5V, or by activating the DDR pin, transform into a complete DDR memory power supply solution. In DDR mode, CH2 output voltage VTT tracks CH1 output voltage VDDQ. CH2 output can both source and sink current, an essential power supply feature for DDR memory. The reference voltage VREF required by DDR memory is generated as well.
Vendor:VISHAYPackage Cooled:DO214ABD/C:08+
The ACT16861 can be used as two 10-bit transceivers or one 20-bit transceiver. They allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the output-enable (OEAB or OEBA) inputs. The output-enable inputs can be used to disable the device so that the buses are effectively isolated.