134179-000-99

Vendor:MOTOROLAPackage Cooled:(LX)high-frequency

The FCT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs The common buffered Clock (CP) and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously The register is fully edge-triggered The state of each D in- put one setup time before the LOW-to-HIGH clock tran- sition is transferred to the corresponding flip-flops Q out- put All outputs will be...

13421

Vendor:HITPackage Cooled:06+D/C:500

ACK Polling Once a stop condition is issued to indicate the end of the hosts write sequence, the X76F102 initiates the internal nonvolatile write cycle. In order to take advantage of the typical 5ms write cycle, ACK polling can begin immedi- ately. This involves issuing the start condition followed by

134216800GLE

D/C:07+

Description ground for substrate charge-pump (phase detector) output Colpitts oscillator and substrate ground Colpitts oscillator input (resonator connection) power for Colpitts oscillator power for LNA and PA external capacitor to stabilise LNA LNA first stage ground low noise RF amplifier (LNA) input LNA, PA and substrate ground power amplifier output external bias resistor for power amplifier mi...

134289-0003

134289-0005

134289-0006

134289-0008

1342L5

Vendor:SOP-14Package Cooled:MOTD/C:04+

The WCFS0808V1E is a high-performance 3.3V CMOS Static RAM organized as 32K words by 8 bits. Easy memory expan- sion is provided by an active LOW Chip Enable (CE) and ac- tive LOW Output Enable (OE) and three-state drivers. The de- vice has an automatic power-down feature, reducing the power consumption by more than 95% when deselected.

1344102A

Package Cooled:SOPD/C:06+

13443226-00

Note 1: MAX974/MAX984 comparators work below 2.5V; see Low-Voltage Operation section for more details. Note 2: Low-to-high response time is the result of the 1MΩ pull-up and the 100pF capacitive load, based on three time constants. A faster response time is achieved with a smaller RC.

134438

Package Cooled:SOP-8D/C:98+

1. A transient suppressor is normally selected according to the working peak reverse voltage (VRWM), which should be equal to or greater than the DC or continuous peak operating voltage level. 2. VBR measured at pulse test current IT at an ambient temperature of 25C. 3. Surge current waveform per Figure 2 and derate per Figure 3 of the General Data − 600 Watt at the beginning of this group. * The G...

134464

Package Cooled:CDIP16D/C:2007+

134501-0047

1345083-1

1345317-1

1345392

1345447 REV. A

13458136-012

13458136-1

134-58163

Sense(C): Provides the regulator with the ability to sense the set-point voltage directly across the load. For optimum output voltage accuracy this pin should always be con- nected to GND, even for applications that demand a relatively light load.

1346004/3C

The family of 16-bit CompactRISC™ microcontroller is based on a Reduced Instruction Set Computer (RISC) ar- chitecture. The device operates as a complete microcom- puter with all system timing, interrupt logic, flash program memory or ROM memory, RAM, EEPROM data memory, and I/O ports included on-chip. It is ideally suited to a wide range of embedded controller applications because of its high performa...

1346004/3C

The family of 16-bit CompactRISC™ microcontroller is based on a Reduced Instruction Set Computer (RISC) ar- chitecture. The device operates as a complete microcom- puter with all system timing, interrupt logic, flash program memory or ROM memory, RAM, EEPROM data memory, and I/O ports included on-chip. It is ideally suited to a wide range of embedded controller applications because of its high performa...

134687

Package Cooled:CDIP18D/C:2007+

1347-31-60RY

13475MP

Vendor:HITPackage Cooled:TQFP20D/C:2007+

1347822

Vendor:ampPackage Cooled:dc04D/C:39

13486-6-0-1616

13490

Vendor:HITPackage Cooled:06+D/C:500

Low inductance RF/DC ground connection required below part as bottom ground pad is used for all device grounding. Additionally, this connection prodvides a direct connection to the die for enhanced thermal dissipation. Package shown not to scale.

134936

Package Cooled:CDIP14D/C:2007+

1349558-1

13499

The HC4040 and HCT4040 are 14-stage ripple-carry binary counters. All counter stages are master-slave flip- flops. The state of the stage advances one count on the negative clock transition of each input pulse; a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered.

13499

The HC4040 and HCT4040 are 14-stage ripple-carry binary counters. All counter stages are master-slave flip- flops. The state of the stage advances one count on the negative clock transition of each input pulse; a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered.

134PC05G2

Vendor:SENSYM

regard to the supply voltage. This device can be used to interface 5V to 3V. Pin configuration and function are the same as those of the 74VHC04 but the 74VHC14 has hysteresis. This together with its schmitt trigger function allows it to be used on line receivers with slow rise/fall input signals. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2...

134PC15G2

Vendor:SENSYM

256 Independent, Bidirectional HDLC Channels Up to 132Mbps Full-Duplex Throughput Supports Up to 60 T1 or 64 E1 Data Streams 16 Physical Ports (16 Tx and 16 Rx) That Can Be Independently Configured for Channelized or Unchannelized Operation Three Fast (52Mbps) Ports; Other Ports Capable of Speeds Up to 10Mbps (Unchannelized) Channelized Ports Can Each Handle One, Two, or Four T1 or E1 Lines Per-Channel ...

134PC15G2

Vendor:SENSYM

256 Independent, Bidirectional HDLC Channels Up to 132Mbps Full-Duplex Throughput Supports Up to 60 T1 or 64 E1 Data Streams 16 Physical Ports (16 Tx and 16 Rx) That Can Be Independently Configured for Channelized or Unchannelized Operation Three Fast (52Mbps) Ports; Other Ports Capable of Speeds Up to 10Mbps (Unchannelized) Channelized Ports Can Each Handle One, Two, or Four T1 or E1 Lines Per-Channel ...

135.00MHZ

1-350242-9

1-350244-9

1-350376-0

Vendor:AMPD/C:07+

13-5043-5

Vendor:HARPackage Cooled:DIP-16PD/C:6+

Tantalum Capacitors Tantalums are acceptable on the output bus but only the AVX TPS series, Sprague 593D/594/595 series or Kemet T495/T510 series. These capacitors are recommended over many other types due to their higher rated surge, power dissipation, and ripple current capability. As a caution, the TAJ series by AVX is not recommended. This series exhibits considerably higher ESR and lower ripple ...

13505-512

• Fully Compliant to IrDA 1.1 Physical Layer Specifications - 9.6 kb/s to 4 Mb/s operation • Typical Link Distance > 1.5 m • Compatible with ASK, HP- SIR, and TV Remote • IEC825-Class 1 Eye Safe • Low Power Operation - 2.7 V to 3.6 V • Small Module Size - 4.0 x 12.2 x 5.1 mm (HxWxD) • Complete Shutdown - TXD, RXD, PIN diode • Low Shutdown Current ...

13505-517

Package Cooled:TQFP144D/C:03+

135057-01

135-064

D/C:03+

The Am29DS323D family consists of 32 megabit, 1.8 volt-onl y flas h mem or y devices, o r g a n i ze d a s 2,097,152 words of 16 bits each or 4,194,304 bytes of 8 bits each. Word mode data appears on DQ0CDQ15; byte mode data appears on DQ0CDQ7. The device is designed to be programmed in-system with the stan- dard 1.8 volt VCC supply, and can also be programmed in standard EPROM programmers.

13506400726

Vendor:RLKPackage Cooled:SOP8D/C:01+

Power supply voltage +13V, 0V or +5V, -8V Built-in polarity ID circuit Built-in ã correction circuit Common inversion circuit built-in 2 input switch built-in Built-in contrast adjustment circuit Built-in sync separation circuit

135085

13509440

Vendor:ampPackage Cooled:dc98D/C:129

1-350944-0

Vendor:AMP/TYCOD/C:07+

Electrical characteristics are measured or characterized using a 223 - 1PRBS at 2.7Gbps with input edge speeds 200ps, unless otherwise noted. Dice are tested at TA = +25C only. All AC specifications are guaranteed by design and charac- terization, unless otherwise noted. Supply current measurement is taken with AC-coupled inputs and excludes output currents into 50Ω loads. Minimum gain is defined as VIN ...

1-350945-0

Vendor:AMP/TYCOD/C:07+

Ideal for space critical applications, the LM4041 precision voltage reference is available in the sub-miniature SC70 and SOT-23 surface-mount packages. The LM4041s advanced design eliminates the need for an external stabilizing capaci- tor while ensuring stability with any capacitive load, thus making the LM4041 easy to use. Further reducing design effort is the availability of a fixed (1.225V) and adj...

1-350948-0

Vendor:AMP/TYCOD/C:07+

The IRPT1053A PowIRtrain (Figure 3) provides the complete power conversion function for a 1hp (0.75kW) variable voltage, variable frequency AC motor controller. The PowIRtrain com- bines the Power Module (IRPT1053A) with a Driver-Plus Board (IRPT1053D). The PowIRtrain Design Kit, IRPT1053E in- cludes the following:

135110-00

D/C:99

These devices have internal electrostatic-discharge (ESD) protection circuits that prevent catastrophic failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015. However, care should be exercised in handling these devices, as exposure to ESD may result in degradation of the device parametric performance.

135110-00

D/C:99

These devices have internal electrostatic-discharge (ESD) protection circuits that prevent catastrophic failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015. However, care should be exercised in handling these devices, as exposure to ESD may result in degradation of the device parametric performance.

135113-01

135-119-006

Package Cooled:05+D/C:DIP

The relays can switch currents in the range of nano- amps to hundreds of milliamps. The MOSFET switches are ideal for small signal switching and are primarily suited for dc or audio frequency applica- tions. The LH1518 relays feature a monolithic output die that minimizes wire bonds and permits easy integra- tion of high-performance circuits such as current lim- iting in normally-open switches. The ...

13513

Vendor:HITACHIPackage Cooled:QFPD/C:08+

The external oscillator mode can also be used with the internal divider function enabled (pin RC and pin DD = SGND). Due to the presence of the divider the bridge frequency is half the external oscillator frequency. The commutation of the bridge is triggered by the falling edge of the EXTDR signal with respect to V−LVS.

135172-00 UMAX PQFP 9903

13520-502

Vendor:MOTOROLAPackage Cooled:02+D/C:BGA-560P

The DDX-2000 Controller is a 3.3V digital integrated circuit that converts serial PCM digital audio signals into Apogee's patented damped ternary outputs.The device supports two modes of digital volume control, muting and anti- clipping functions. A block diagram of the device is shown in Figure 1.

13-5211-01MA

135-213-000

Package Cooled:05+D/C:DIP

Frame Pulse ST-BUS/GCI 8.192 Mb/s (CMOS tristate output). This is an 8 kHz, 122 ns, active high framing pulse, which marks the beginning of a ST-BUS/GCI frame. This is typically used for ST-BUS/GCI operation at 8.192 Mb/s. See Figure 15 for details.

13-524-5

PSoC Designer helps the customer to select an operating con- figuration for the PSoC, write application code that uses the PSoC, and debug the application. This system provides design database management by project, an integrated debugger with In-Circuit Emulator, in-system programming support, and the CYASM macro assembler for the CPUs.

135306-007-99

Vendor:MXPackage Cooled:DIP-40

135311-000

Vendor:MITPackage Cooled:PQFP48D/C:2007+

1-353715-5

Vendor:Tyco/AMPPackage Cooled:N/AD/C:29

Sending the WREN op-code causes the internal Write Enable Latch to be set. A flag bit in the status register, called WEL, indicates the state of the latch. WEL=1 indicates that writes are permitted. Attempting to write the WEL bit in the status register has no effect. Completing any write operation will automatically clear the write-enable latch and prevent further writes without another WREN comman...

1-353715-5

Vendor:Tyco/AMPPackage Cooled:N/AD/C:29

Sending the WREN op-code causes the internal Write Enable Latch to be set. A flag bit in the status register, called WEL, indicates the state of the latch. WEL=1 indicates that writes are permitted. Attempting to write the WEL bit in the status register has no effect. Completing any write operation will automatically clear the write-enable latch and prevent further writes without another WREN comman...

135500-01-5C258

Vendor:NSPackage Cooled:PLCC-52PD/C:1994

TEMPERATURE COMPENSATION Figure 2 shows the typical output characteristics of the MPX10 series over temperature. The XCducer piezoresistive pressure sensor element is a semiconductor device which gives an electrical output signal proportional to the pressure applied to the device. This de- vice uses a unique transverse voltage diffused semiconduc- tor strain gauge which is sensitive to stresses prod...

13559VWV8.0

Vendor:infineonD/C:5000

These multiplexers are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-chan- nel enhancement transistors They consist of four 2-input multiplexers with common select and enable inputs When the enable input is at logical 0 the four outputs assume the values as selected from the inputs When the enable input is at logical 1 the outputs assume logical 0 Se- lect decoding ...

135620-01-16

Vendor:ADPackage Cooled:PLCCD/C:93+

135620-01-1B

Vendor:UCPackage Cooled:PLCC20D/C:93

RESET The 135620-01-1B has a Reset input that must be asserted upon power-up or after a power interruption. This initializes the SAR, the output buffer register and Data Ready flag. Since microprocessor systems already use a power-on reset circuit, the same system reset signal can be used to initialize the 135620-01-1B.

135620-01-1B

Vendor:UCPackage Cooled:PLCC20D/C:93

RESET The 135620-01-1B has a Reset input that must be asserted upon power-up or after a power interruption. This initializes the SAR, the output buffer register and Data Ready flag. Since microprocessor systems already use a power-on reset circuit, the same system reset signal can be used to initialize the 135620-01-1B.

135638REVA

Vendor:LSIPackage Cooled:PQFP-160D/C:98

Notes a. Room = 25_C, Full = −40 to 85_C. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at TA = 25_C. d. The dropout voltage is defined as VIN − VOUT when VOUT is 100 mV below the value of VOUT for VIN = VOUT + 2 V. This is a...

135700-01-1

Vendor:MICROPOLISD/C:08+

If the wiper position of the DS1809 is incremented to an end-position, it will stay at that position until the device receives an opposite direction input pulse command over the UC or DC inputs. For example, if the wiper position is incremented to the RH terminal using the UC input control, it will stay at that position until UC is first deactivated, and then the DC input is activated to move the wiper positi...

135700-01-1

Vendor:MICROPOLISD/C:08+

If the wiper position of the DS1809 is incremented to an end-position, it will stay at that position until the device receives an opposite direction input pulse command over the UC or DC inputs. For example, if the wiper position is incremented to the RH terminal using the UC input control, it will stay at that position until UC is first deactivated, and then the DC input is activated to move the wiper positi...

1-35787-000

Vendor:TYCOPackage Cooled:626D/C:2500

The HEXFET technology is the key to International Rectifiers advanced line of power MOSFET transistors. The efficient geometry and unique processing of this latest State of the Art design achieves: very low on-state resis- tance combined with high transconductance. The HEXFET transistors also feature all of the well established advantages of MOSFETs such as volt- age control, very fast switching, eas...

1358722

Vendor:SMD14Package Cooled:PHILIPSD/C:04+

operational when the bus is attached to an off-board service node. This node shall provide temporary bus electrical loads which facilitate higher speed operation. Such temporary loads shall be removed when not performing download operations.

1358CN8

Vendor:PANPackage Cooled:828D/C:DIP8

135926-00800880

Vendor:FUJPackage Cooled:04+D/C:QFP

(0) After power on, the first integration scan is not guaranteed correct. This scan is needed for initializing digital levels on chip. After a SI and 133 proper CLK signals, the system is fully initialized and all further scans are valid. The next SI will provide a valid scan.

135926-00800880

Vendor:FUJPackage Cooled:04+D/C:QFP

(0) After power on, the first integration scan is not guaranteed correct. This scan is needed for initializing digital levels on chip. After a SI and 133 proper CLK signals, the system is fully initialized and all further scans are valid. The next SI will provide a valid scan.

135D1200UFX910VDC

Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any pu...

135D175X9125C2

135D227X9075K2

135D227X9075K6

135D336X9075F2

135D337X9050K2

135D337X9050K6

13-600024

Package Cooled:91D/C:1000

the 1Hz band to the power in the fundamental. When the re- quired offset is specified, the phase noise is called a dBc value, which simply means dBm at a specified offset from the funda- mental. By investigating jitter in the frequency domain, we get a better understanding of its effects on the desired application over the entire time record of the signal. It is mathematically possible to calculate an ...

13-600024

Package Cooled:91D/C:1000

the 1Hz band to the power in the fundamental. When the re- quired offset is specified, the phase noise is called a dBc value, which simply means dBm at a specified offset from the funda- mental. By investigating jitter in the frequency domain, we get a better understanding of its effects on the desired application over the entire time record of the signal. It is mathematically possible to calculate an ...

13600CP

Vendor:EXARPackage Cooled:50

Stresses greater than those listed under Absolute Maxi- mum Ratings may cause permanent damage to the device. This rating is a stress rating only; operation of the device at any condition above those indicated in the operational sections of these specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

136-013-043

Vendor:SOP-20Package Cooled:SEMEFABD/C:2004+

Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, TA = 25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Measured by the voltage drop between AB and CD pin at indicated current through t...

136048.00

Vendor:INTEYSILPackage Cooled:DIPD/C:99+

13605

Vendor:TFKPackage Cooled:SOP14SD/C:2007+

The CS42416 integrated PLL provides a low-jitter system clock. The internal stereo ADC is capable of independent chan- nel gain control for single-ended or differential analog inputs. All six channels of DAC provide digital volume control and dif- ferential analog outputs. The general purpose outputs may be driven high or low, or mapped to a variety of DAC mute controls or ADC overflow indicators.

136068-REV.A

1360-T

1360TV2.0

These three terminal positive regulators are supplied in a hermetically sealed metal package whose outline is similar to the industry standard TO-220 plastic package. All protective features are designed into the circuit, including thermal shutdown, current limiting and safe-area control. With heat sinking, they can deliver over 3.0 amps of output current. These units feature 2% initial voltage tolerance, ...

1361386-1

1361T

Vendor:PHIPackage Cooled:SSOP16D/C:06+

VFB to the output of the error amplifier. Note 4: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. Note 5: TJ is calculated from the ambient TA and power dissipation PD according to the following formula: TJ = TA + (PD • JA). Note 6: The DFN switch on-resistance is guaranteed by correlation to wafer level measurements.

136-2030001

Vendor:LSIPackage Cooled:PQFP-240D/C:99

Octal bidirectional bus interface Non-inverting 3-state outputs Multiple package options Complies with JEDEC standard no. 7A ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V s Specified from −40 C to +85 C and from −40 C to +125 C

1362BN

Package Cooled:无铅07+D/C:2700

1362FS

Package Cooled:08+D/C:800

136344-007

Vendor:HARRIS

† All typical values are at VCC = 3.3 V, TA = 25C. ‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. Unused terminals at VCC or GND ¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.

136-3701-516