Index "3"Vendor:N/APackage Cooled:00+D/C:SOP-8
This device employs the Schottky Barrier principle in a large area metal−to−silicon power diode. State−of−the−art geometry features epitaxial construction with oxide passivation and metal overlay contact. Ideally suited for low voltage, high frequency rectification, or as free wheeling and polarity protection diodes in surface mount applications where compact size and weigh...
REFIN Input Capacitance REFIN Input Current PHASE DETECTOR Phase Detector Frequency2 CHARGE PUMP ICP Sink/Source3 High Value Low Value RSET Range ICP Three-State Leakage Current Sink and Source Current Matching ICP vs. VCP ICP vs. Temperature LOGIC INPUTS VINH, Input High Voltage VINL, Input Low Voltage IINH/IINL, Input Current CIN, Input Capacitance LOGIC OUTPUTS VOH, Output High...
The TPS721xx family of LDO regulators is available in fixed voltage options that are commonly used to power the latest DSPs and microcontrollers with an adjustable option ranging from 1.22 V to 2.5 V. These regulators can be used in a wide variety of applications ranging from portable, battery-powered equipment to PC peripherals. The family features operation over a wide range of input voltages (1.8 ...
The device also supports low-power active operation by monitoring both system chip select (DCS and CSR) inputs and will gate the Qn outputs from changing states when both DCS and CSR inputs are high. If either DCS or CSR input is low, the Qn outputs function normally. The RESET input has priority over the DCS and CSR control and forces the output low. If the DCS control functionality is not desired, the C...
Package Cooled:sop8
The SN74AVCH8T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated.
Vendor:STPackage Cooled:SOP
Gain Bandwidth Product (G +20) Gain Peaking 0.1dB Gain Flatness Bandwidth Large Signal Bandwidth Step Response Slew Rate Rise/Fall Time Settling Time: 0.05% Spurious Free Dynamic Range Input Noise Voltage Noise Density Current Noise Density
Vendor:STPackage Cooled:SOP
Gain Bandwidth Product (G +20) Gain Peaking 0.1dB Gain Flatness Bandwidth Large Signal Bandwidth Step Response Slew Rate Rise/Fall Time Settling Time: 0.05% Spurious Free Dynamic Range Input Noise Voltage Noise Density Current Noise Density
Vendor:STPackage Cooled:SOP
address range of the boot block is 1C000 to 1FFFF for the AT49BV/LV001(N)T. Once the feature is enabled, the data in the boot block can no longer be erased or programmed with input voltage level of 5.5V or less. Data in the main memory block can still be changed through the regular programming method. To acti- vate the lockout feature, a series of six program commands to specific addresses with specif...
Vendor:STPackage Cooled:SOP
Programmable versions of the PT6700 and PT6720 series of Excalibur ISRs incorporate a pin-coded output voltage control. These regulators include up to five control pins, identified VID0CVID4 (pins 3C7) respectively. By selectively grounding VID0-VID4, the output voltage of these regu- lators can be programmed in incremental steps over a specified output voltage range. The program code and voltage rang...
Vendor:STPackage Cooled:SOP
Programmable versions of the PT6700 and PT6720 series of Excalibur ISRs incorporate a pin-coded output voltage control. These regulators include up to five control pins, identified VID0CVID4 (pins 3C7) respectively. By selectively grounding VID0-VID4, the output voltage of these regu- lators can be programmed in incremental steps over a specified output voltage range. The program code and voltage rang...
Package Cooled:SMD
Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).
Note 4: All characteristics are measured with a 0.22 µF capacitor from input to ground and a 0.1 µF capacitor from output to ground. All characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw 10 ms, duty cycle 5%). Output voltage changes due to changes in internal temperature must be taken into account separately.
The MAX3030ECMAX3033E family of quad RS-422 transmitters send digital data transmission signals over twisted-pair balanced lines in accordance with TIA/EIA- 422-B and ITU-T V.11 standards. All transmitter outputs are protected to 15kV using the Human Body Model. The MAX3030ECMAX3033E are available with either a 2Mbps or 20Mbps guaranteed baud rate. The 2Mbps baud rate transmitters feature slew-rate-limiting ...
• Low Cost Infrared Data Link • Guaranteed to Meet IrDA Physical Layer Specifications 1 cm to 1 Meter Operating Distance 30 Viewing Angle 2.4 KBd to 115.2 KBd Data Rate • Daylight Cancellation • Easily Implemented Direct Connection to Various I/O Chips • Small Form Factor • Several Lead and Shipping Configurations Available • Excellent EMI Imm...
Vendor:SIPackage Cooled:SOP8D/C:08+
The MIC5031 is powered by the +4.5V to +30V load voltage. An external bootstrap capacitor and internal charge pump drive the gate output higher than the supply voltage. The bootstrap capacitor provides speed, while the charge pump can sustain the high gate output voltage continuously.
GAPPED MODELS: Capable of handling large amounts of DC current, tighter inductance tolerance with better temperature stability than ungapped models. Beneficial in DC to DC converters or other circuits carrying DC currents or requiring inductance stability over a temperature range.
!Features 1) Built-in overvoltage protection circuit, overcurrent protection circuit and thermal shutdown circuit 2) TO220FP-5, TO252-5 standard packages can be accomodated in wide application. 3) 0µA (design value) circuit current when switch is off 4) Richly diverse lineup. 5) Low minimum I/O voltage differential.
Vendor:SIPackage Cooled:SOP8D/C:08+
(MAX2338 EV kit, VCC = +2.7V to +3.3V, fPLNAIN = fPMIXIN = 1930MHz to 1990MHz, fCLNAIN = fCMIXIN = 869MHz to 894MHz, fIF = 183MHz, high side LO, LO/2 = LOW. All ports matched to 50Ω, RRLNA = RRBIAS = 24kΩ, TA = -40C to +85C. Typical values are at TA = +25C, VCC = +3.0V, unless otherwise noted.)
Function Standby Read Write: Word (Early Write) Read-Write EDO Page-Mode Read1st Cycle: 2nd Cycle: EDO Page-Mode Write1st Cycle: 2nd Cycle: EDO Page-Mode1st Cycle: Read-Write2nd Cycle: Hidden RefreshRead Write(1) RAS-Only Refresh CBR Refresh
• P1 C Serial (RS-232) • J1 C USB • J2 C 12V DC power supply (used with serial connection only) • TB1 C Pluggable terminal block for device under test. Looking into the connector on the board, the pins from left to right are: - V+ (VP): Battery pack positive - C: SMBus clock - D: SMBus data - T: T-pin - V- (VN): Battery pack negative • TB2 C External charger or...
Vendor:STPackage Cooled:SOPD/C:06+
8.5 V Supply Voltage Voltage Regulator for Stable Operating Conditions Microprocessor-controlled Via a Simple Two-wire Bus Two Addresses Selectable Gain-controlled RF Amplifier with Two Inputs, Selectable Via a Simple Two-wire Bus Control Balanced RF Amplifier Inputs Gain-controlled RF Mixer Four-pin Voltage-controlled Oscillator SAW Filter Driver with Differential Low-impedance Output AGC Voltage Genera...
Vendor:STPackage Cooled:SOPD/C:06+
8.5 V Supply Voltage Voltage Regulator for Stable Operating Conditions Microprocessor-controlled Via a Simple Two-wire Bus Two Addresses Selectable Gain-controlled RF Amplifier with Two Inputs, Selectable Via a Simple Two-wire Bus Control Balanced RF Amplifier Inputs Gain-controlled RF Mixer Four-pin Voltage-controlled Oscillator SAW Filter Driver with Differential Low-impedance Output AGC Voltage Genera...
the performance for a wide range of applications and locations world wide. The KESRX05, with its anti-jamming detector circuit, is an ideal ASK/ OOK receiver for difficult reception areas caused by interference such as amateur radio repeater stations and wireless stereo headphones. Operation is possible with interfering signals which are more than 20dB stronger than the wanted signal (IF bandwidth = ...
The MWS W-CDMA is a high- efficiency linear amplifier targeting 3V mobile handheld systems. The device is manufacturedinanadvanced InGaP/GaAs Heterojunction Bipolar Transistor (HBT) RF IC fab process. It is designed for use as a final RF amplifier in 3V W-CDMA and CDMA2000, spread spectrum systems,
Vendor:ST8Package Cooled:SOPD/C:06+
Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode, SmartSensor, SmartTel and Total Endurance are trademarks of Microchip Technology Incor...
Vendor:ST8Package Cooled:SOPD/C:06+
Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode, SmartSensor, SmartTel and Total Endurance are trademarks of Microchip Technology Incor...
Vendor:ST8Package Cooled:SOPD/C:06+
Small and thin 4 mm 4 mm 1.45 mm LFCSP package 3 mg resolution at 50 Hz Wide supply voltage range: 2.4 V to 6 V Low power: 350 µA at VS = 2.4 V (typ) Good zero g bias stability Good sensitivity accuracy X-axis and Y-axis aligned to within 0.1 (typ) BW adjustment with a single capacitor Single-supply operation 10,000 g shock survival Compatible with Sn/Pb and Pb-free solder processes
These Intersil RS-485/RS-422 devices are ESD protected, fractional unit load (UL), BiCMOS, 5V powered, single transceivers that meet both the RS-485 and RS-422 standards for balanced communication. Each driver output/ receiver input is protected against 15kV ESD strikes, without latch-up. Unlike competitive devices, this Intersil family is specified for 10% tolerance supplies (4.5V to 5.5V).
Package Cooled:SMD
One case that requires additional detail is the auxiliary SVHS mode. In the SVHS mode, the Aux_YC video input will only provide luma information. Composite video for the modulator output must be generated by summing this luma information with chroma information from the auxiliary port. The input pin labeled Aux_Cin is used for this purpose. The Aux_Cin input pin is AC coupled to the same source that provid...
Package Cooled:SSOPD/C:05+
Power Management The HOST_WAKEUP and EXT_WAKE signals are used for power management control of the SiW3500. HOST_WAKEUP is an output signal used to indicate Bluetooth activity to the host. EXT_WAKE is an input signal used by the host to wake up the SiW3500 from sleep mode.
Package Cooled:SSOPD/C:05+
Power Management The HOST_WAKEUP and EXT_WAKE signals are used for power management control of the SiW3500. HOST_WAKEUP is an output signal used to indicate Bluetooth activity to the host. EXT_WAKE is an input signal used by the host to wake up the SiW3500 from sleep mode.
Vendor:ADIPackage Cooled:30D/C:N/A
Operation of the SX1405 is straightforward. Parallel data is input to the device. SerialCtoCparallel conversion is performed. Then the serial data is output at the selected line rate clock. The 78 MByte/s or 19 MByte/s parallel data is converted into a bitCserial 622 Mbit/s or 155 Mbit/s data stream.
Vendor:.Package Cooled:LTD/C:2005+
On-chip communications peripherals include: USB control- ler, ACCESS.bus, Microwire/Plus, SPI, UART, and Ad- vanced Audio Interface (AAI). Additional on-chip peripherals include DMA controller, PCM/CSVD conversion module, Timing and Watchdog Unit, Versatile Timer Unit, Multi- Function Timer, and Multi-Input Wakeup.
Vendor:.Package Cooled:LTD/C:2005+
3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturers list (QML) before contract award (see 4.2 and 6.3).
Vendor:BOSCHPackage Cooled:04+D/C:SOP-20
Secured Silicon Sector: Extra 256 Byte sector Factory locked and identifiable: 16 bytes available for secure, random factory Electronic Serial Number; verifiable as factory locked through autoselect function. ExpressFlash option allows entire sector to be available for factory-secured data Customer lockable: One-time programmable only. Once locked, data cannot be changed
Vendor:BOSCHPackage Cooled:20D/C:07+
NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one abs...
The UCC1800/1/2/3/4/5 family offers a variety of package options, tem- perature range options, choice of maximum duty cycle, and choice of critical voltage levels. Lower reference parts such as the UCC1803 and UCC1805 fit best into battery operated systems, while the higher refer- ence and the higher UVLO hysteresis of the UCC1802 and UCC1804 make these ideal choices for use in off-line power supplies.
Vendor:BOSCHPackage Cooled:00+D/C:SOP-20
The 74HC/HCT574 are octal D-type flip-flops featuring separate D-type inputs for each flip-flop and non-inverting 3-state outputs for bus oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops.
Vendor:BOSCHPackage Cooled:00+D/C:SOP-20
The 74HC/HCT574 are octal D-type flip-flops featuring separate D-type inputs for each flip-flop and non-inverting 3-state outputs for bus oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops.
D/C:08+/09+
Registers • I2C bus Various register settings: <SCL, SDA, REGRES> Slave address: [A6:A0] = 0011111 (b) Related pins: <SCL, SDA, REGRES> • External EEPROM An EEPROM which supports the I2C bus can be connected. Register values can be automatically read out during power-on.
D/C:08+/09+
Registers • I2C bus Various register settings: <SCL, SDA, REGRES> Slave address: [A6:A0] = 0011111 (b) Related pins: <SCL, SDA, REGRES> • External EEPROM An EEPROM which supports the I2C bus can be connected. Register values can be automatically read out during power-on.
Vendor:(H)Package Cooled:WSOP16D/C:0740+
• Single power supply: 5 V 10% • Full TTL compatibility • Multiport organization RAM: 256K word ¥ 4 bits SAM: 512 word ¥ 4 bits • Fast page mode • Write per bit • Masked flash write • Masked block write • RAS only refresh • CAS before RAS refresh • Hidden refresh • Serial read/write • 512 tap location • Bidirecti...
Vendor:IOMEGAPackage Cooled:QFP-100D/C:98
An internal power-on reset (POR) and an enable input (EN) control the operation of the SN65LVDS151. When VCC is below 1.5 V, or when EN is low, the device is in a low-power disabled state, and the DO and LCO differential outputs are in a high-impedance state. When VCC is above 3 V and EN is high, the device and the two differential outputs are enabled and operating to specifications. The link clock output...
Package Cooled:3.9MMD/C:99+
Vendor:ERICSSONPackage Cooled:BGAD/C:04+
Vendor:BOSCHPackage Cooled:500D/C:07+
Oscillator The oscillator consists of two comparators, a charging and discharging current source, a current source set ter- minal, lSET and a flip-flop. The upper and lower threshold of the oscillator waveform is set externally by applying a voltage at pins +VTH and -VTH respectively. The +VTH ter-
Vendor:NULLPackage Cooled:SOP8D/C:08+
The UC1708 family of power drivers is made with a high-speed, high-voltage, Schottky process to interface control functions and high-power switching devices C particularly power MOSFETs. Operating over a 5 to 35 volt supply range, these devices contain two independent channels. The A and B inputs are compatible with TTL and CMOS logic families, but can withstand input voltages as high as VIN. Each output...
Vendor:EPTPackage Cooled:N/AD/C:100
Single Supply for Read and Write: 2.7V to 3.6 (BV), 3.0 to 3.6V (LV) Fast Read Access Time - 70 ns Internal Program Control and Timer Sector Architecture C One 16K Byte Boot Block with Programming Lockout C Two 8K Byte Parameter Blocks C Two Main Memory Blocks (32K, 64K) Bytes Fast Erase Cycle Time - 10 seconds Byte By Byte Programming - 30 µs/Byte Typical Hardware Data Protection DATA Polling ...
Package Cooled:SMD
Traditional Approach to CDS There are a number of techniques for dealing with the varying- offset idiosyncrasy of CCD's. The most prevalent has been what can be called the "sample-sample-subtract" technique. This approach requires the use of two high-speed sample-hold (S/H) amplifiers and a difference amplifier. The first S/H is used to acquire and hold a given pixel's offset. Immediately aft...
Package Cooled:SOP
Description The HYS 64V64220GU and HYS 72V64220GU are industry standard 168-pin 8-byte Dual in-line Memory Modules (DIMMs) which are organized as 64M 64 and 64M 72 in two banks high speed memory arrays designed with 256M Synchronous DRAMs (SDRAMs) for non-parity and ECC applications. The DIMMs use -7 speed sorted 256 Mbit Synchronous DRAMs (SDRAMs) to meet the PC133-222 requirements, -7.5 for PC133-333 ...
Package Cooled:SOP
Description The HYS 64V64220GU and HYS 72V64220GU are industry standard 168-pin 8-byte Dual in-line Memory Modules (DIMMs) which are organized as 64M 64 and 64M 72 in two banks high speed memory arrays designed with 256M Synchronous DRAMs (SDRAMs) for non-parity and ECC applications. The DIMMs use -7 speed sorted 256 Mbit Synchronous DRAMs (SDRAMs) to meet the PC133-222 requirements, -7.5 for PC133-333 ...
Vendor:(H)Package Cooled:N/AD/C:800
Figure 3 shows the ELM312 used in a circuit to control a four phase stepper motor. The motor shown here is typical of the type often found in computer disk drives, and are readily available on the surplus market. This particular motor requires +12V at 160mA per phase to operate, and has a resolution of 3.6 per step.
Vendor:STPackage Cooled:04+D/C:QFP
Vendor:STPackage Cooled:04+D/C:QFP
Interrupts : 18 sources, 10 vectors 1. Three priority (low, high and highest) multiple interrupts are supported. During interrupt handling, an equal or lower priority interrupt request is postponed. 2. If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes precedence. In the case of equal priority levels, the vector with the lowest address takes precede...
The M5M51016BTP, RT are a 1048576-bit CMOS static RAM organized as 65536 word by 16-bit which are fabricated using high-performance triple polysilicon CMOS technology. The use of resistive load NMOS cells and CMOS periphery result in a high density and low power static RAM. They are low stand-by current and low operation current and ideal for the battery back-up application. The M5M51016BTP,RT are p...
First 14-bit ADC in a SOT-23 package. High throughput with low power consumption. Flexible power/serial clock speed management. The con- version rate is determined by the serial clock, allowing the conversion time to be reduced through the serial clock speed increase. This allows the average power consumption to be reduced when a power-down mode is used while not converting. The part also features a ...
Vendor:STPackage Cooled:04+D/C:QFP
† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage ...
Vendor:PHILIPSPackage Cooled:QFND/C:00+
This document is preliminary. As such, it contains data derived from functional simulations and performance estimates. LSI Logic has not verified either the functional descriptions, or the electrical and mechanical specifications using production parts.
Package Cooled:SMD-8D/C:05+
Maximum Average Forward Rectified Current @TA =45+ Peak Forward Surge Current, 8.3 ms Single Half Sine-wave Superimposed on Rated Load (JEDEC method ) Maximum Instantaneous Forward Voltage @ 10.0A Maximum DC Reverse Current @ TA=25+ at Rated DC Blocking Voltage @ TA=125+
Vendor:HPackage Cooled:01+D/C:PLCC-52
software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 micro- controllers feature true bit manipulation, 8x8 un- signed multiplication and indirect addressing modes. For easy reference, all parametric data are located in section 13 on page 91. The devices feature an on-chip Debug Module (DM) to support in-ci...
Vendor:(H)Package Cooled:N/AD/C:800
†Notice: Stresses above those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Vendor:(H)Package Cooled:N/AD/C:800
†Notice: Stresses above those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Vendor:HPackage Cooled:01+D/C:PLCC-52
1M Home Phoneline Network physical-layer, single- chip transceiver Supports the MII including the MDIO/MDC serial management interface Supports the GPSI including a SPI serial management interface Supports Link Integrity function Smart equalizer circuit for 1M receiver Supports Patent Pending 4-wire operation Supports hardware or software speed select
Package Cooled:SOP8
The IS24CXX contains an internal address counter which maintains the address of the last byte accessed, incremented by one. For example, if the previous operation is either a read or write operation addressed to the address location n, the internal address counter would increment to address location n+1. When the IS24CXX receives the Device Addressing Byte with a READ operation (read/write bit set to...
Vendor:NSCPackage Cooled:SOP-8D/C:N/A
Package Cooled:SMD-8
The amplifiers can operate on any supply voltage from 4V (2V) to 33V (16.5V), yet consume only 7.5mA per amplifier at any supply voltage. Using industry standard pinouts, the EL2260 is available in 8-pin PDIP and 8-pin SO packages, while the EL2460 is available in 14-pin PDIP and 14-pin SO packages.
Vendor:MOLEX
Vendor:BOSCHPackage Cooled:SOP-24D/C:N/A
RF PLL Enable (enable when high, power down when low). Controls the RF PLL to power down directly, not depending on a program control. Also sets the charge pump output to be in TRI-STATE when LOW. Powers up when HIGH depends on the state of RF_CTL_WORD.
In dual power supply applications the ISL6227 monitors the output voltage of both CH1 and CH2. An independent PGOOD (power good) signal is asserted for each channel after the soft- start sequence has completed, and the output voltage is within PGOOD window. In DDR mode CH1 generates the only PGOOD signal.
Vendor:LTPackage Cooled:SOPD/C:0439+
Erase/write enable (EWEN) Before any device programming (WRITE, WRAL, ERASE, and ERAL) can be done, the EWEN instruction must be executed first. When Vcc is applied, this device powers up in the EWDS state. The device then remains in a erase/write disable (EWDS) state until a EWEN instruction is executed. Thereafter the device remains enabled until a EWDS instruction is executed or until Vcc is removed. (s...
Vendor:LTPackage Cooled:SOPD/C:0439+
Erase/write enable (EWEN) Before any device programming (WRITE, WRAL, ERASE, and ERAL) can be done, the EWEN instruction must be executed first. When Vcc is applied, this device powers up in the EWDS state. The device then remains in a erase/write disable (EWDS) state until a EWEN instruction is executed. Thereafter the device remains enabled until a EWDS instruction is executed or until Vcc is removed. (s...
Vendor:OKI
Vendor:OKI
Vendor:OKI
Vendor:OKI
Vendor:TPackage Cooled:SOP32WD/C:2007+
Vendor:AMKORPackage Cooled:BGA
Table 1 indicates the tolerance available on specific temperature characteristics. It may be noted that limits are established on the basis of measurements at +25C and +85C and that T.C. becomes more negative at low temperature. Wider tolerances are required on low capacitance values because of the effects of stray capacitance.
Vendor:BBPackage Cooled:03D/C:44
7.1 The parties agree that the AMBE® Voice Compression Software shall be considered Proprietary Information. 7.2 Except as otherwise provided in this Agreement, END USER shall not use, disclose, make, or have made any copies of the Proprietary Information, in whole or in part, without the prior written consent of DVSI.
Vendor:BBPackage Cooled:03D/C:44
If this pin is connected to a LLC driver pin for setting Bus Manager/IRM contender status, then a 10-kΩ series resistor should be placed on this line between the PHY and the LLC to prevent possible contention. In this case. the pull-high or pull-low resistors mentioned in the previous paragraph should not be used. Refer to Figure 9.
Logic 0 Input Voltage (OUT = LO) Logic 1 Input Voltage (OUT = HI) ITRIP Input Positive Going Threshold High Level Output Voltage, VBIAS - VO Low Level Output Voltage, VO Offset Supply Leakage Current Quiescent VBS Supply Current Quiescent VCC Supply Current Logic 1 Input Bias Current (OUT = HI) Logic 0 Input Bias Current (OUT = LO) High ITRIP Bias Current Low ITRIP Bias Current VBS Supply Un...
Vendor:WSIPackage Cooled:02+D/C:4
Vendor:HYUPJIN
The cores consist of a serializer, a de-serializer with clock and data recov- ery, and a low-jitter PLL. These cores, shown in Figure 1 as TX, RX and PLL, respectively, are combined into sub-systems per customer specifications. Figure 1 shows a generic full duplex subsystem, with 32 independent receive channels and 32 independent transmit channels, all serviced by a single PLL.
Vendor:BOSCHD/C:07+
The 30505 is an internally matched, COMMON EMITTER transistor capable of providing 500 Watts of pulsed RF output power at sixty microseconds pulse width, two percent duty factor across the band 400-450 MHz. This hermetically solder sealed transistor is specifically designed for long pulse radar applications. It utilizes gold metalization and diffused emitter ballasting to provide high reliability and sup...
Vendor:120