Index "3"TTL/CMOS input enable pin. Used to control the LOUT0-LOUT2 outputs and acts as a frequency select pin. LEN, DSEL, and LSEL are used together to decode the selection and post divide of the LVDS output bank, see the LVDS Output Post- Divider and Frequency Select Table for proper decoding. Internal 25kΩ pull-up. When disabled, LOUT0-LOUT2 outputs are LOW, and the complimentary outputs are HIGH. The thresh...
Vendor:TOSHIBAPackage Cooled:TO-92D/C:04+
Vendor:TOSHIBAPackage Cooled:TO-92D/C:95+
read current to the range of 1mA/MHz of Read cycle time. If a concurrent Read while Write is being performed, the IDD is reduced to typically 40mA. The device exits the Auto Low Power mode with any address transition or control signal transition used to initiate another Read cycle, with no access time penalty.
Vendor:东芝D/C:排带
Vendor:东芝D/C:TO-92
Vendor:东芝D/C:排带
Vendor:东芝D/C:排带
D/C:N/A
1.1 Scope. This specification covers the performance requirements for NPN, silicon, low-power, high voltage transistors. Four levels of product assurance are provided for each encapsulated device type as specified in MIL-PRF-19500 and two levels of product assurance are provided for each unencapsulated device type.
D/C:N/A
1.1 Scope. This specification covers the performance requirements for NPN, silicon, low-power, high voltage transistors. Four levels of product assurance are provided for each encapsulated device type as specified in MIL-PRF-19500 and two levels of product assurance are provided for each unencapsulated device type.
Package Cooled:55D/C:MODULE
D/C:1979
On Board 24Mhz Crystal Driver Circuit Can be clocked by an external 24MHz source On-Chip 1.8V Regulator for Low Power Core Operation Internal PLL for 480Mhz USB2.0 Sampling, Configurable MCU clock 11 GPIOs for special function use: LED indicators, button inputs, power control to memory devices, etc.
D/C:1979
On Board 24Mhz Crystal Driver Circuit Can be clocked by an external 24MHz source On-Chip 1.8V Regulator for Low Power Core Operation Internal PLL for 480Mhz USB2.0 Sampling, Configurable MCU clock 11 GPIOs for special function use: LED indicators, button inputs, power control to memory devices, etc.
Vendor:CORNINGPackage Cooled:01+D/C:2
Integration of the TT allows connection to full-speed and low-speed devices, without the need of integrating Open Host Controller Interface (OHCI) or Universal Host Controller Interface (UHCI). Instead of dealing with two sets of software driversEHCI and OHCI or UHCIyou need to deal with only one setEHCIthat dramatically reduces software complexity and IC cost.
Vendor:CORNINGPackage Cooled:01+D/C:2
Integration of the TT allows connection to full-speed and low-speed devices, without the need of integrating Open Host Controller Interface (OHCI) or Universal Host Controller Interface (UHCI). Instead of dealing with two sets of software driversEHCI and OHCI or UHCIyou need to deal with only one setEHCIthat dramatically reduces software complexity and IC cost.
Package Cooled:SOP
Vendor:CORNINGPackage Cooled:01+D/C:3
When RST is driven high, the value on ROMA07 C ROMA00 is latched into the board configuration register in the TI380PCIA configuration space. The value on ROMA07 C ROMA00 can be provided by pullup and pulldown resistors that do not affect operation after reset. This feature allows designers to support jumpers or board stuffing options that can be sensed by software that reads the board configuration regi...
Vendor:VIAD/C:04+
Vendor:RFMDPackage Cooled:QFND/C:06+
Vendor:NECPackage Cooled:50D/C:07+
TFT Interface Programmable panel size up to 1024 by 1024 pixels. Support for VGA and SVGA active matrix TFT flat panels with 9, 12, 18-bit interface (1 pixel per clock). Support for XGA and SXGA active matrix TFT flat panels with 2 x 9-bit interface (2 pixels per clock). Programmable image positionning. Programmable blank space insertion in text mode. Programmable horizontal and vertical image...
TFT Interface Programmable panel size up to 1024 by 1024 pixels. Support for VGA and SVGA active matrix TFT flat panels with 9, 12, 18-bit interface (1 pixel per clock). Support for XGA and SXGA active matrix TFT flat panels with 2 x 9-bit interface (2 pixels per clock). Programmable image positionning. Programmable blank space insertion in text mode. Programmable horizontal and vertical image...
Vendor:泰科电子Package Cooled:2008D/C:40,000