Index "5"Vendor:INTERSILPackage Cooled:DIP
Vendor:INTERSILPackage Cooled:DIP
Vendor:N/APackage Cooled:30D/C:N/A
• Controller Overhead Command to DRQ C Less than 0.5 ms • Zero Power Data Retention C Batteries not required for data storage • Start Up Time C Sleep to read: 200 ns (typical) C Sleep to write: 200 ns (typical) C Power-on to Ready:200 ms (typical) • Support for Commercial Temperature Range C 0C to +70C for Operating Commercial C -50C to +100C for non-Operating (storage) ...
Vendor:N/APackage Cooled:30D/C:N/A
• Controller Overhead Command to DRQ C Less than 0.5 ms • Zero Power Data Retention C Batteries not required for data storage • Start Up Time C Sleep to read: 200 ns (typical) C Sleep to write: 200 ns (typical) C Power-on to Ready:200 ms (typical) • Support for Commercial Temperature Range C 0C to +70C for Operating Commercial C -50C to +100C for non-Operating (storage) ...
Vendor:TIPackage Cooled:CLCCD/C:9115
Vendor:TEXASPackage Cooled:CDIP14D/C:94/95/97
Vendor:TI
Vendor:TEXASPackage Cooled:CDIP16
Housed in SOIC−8 or PDIP−8 package, the NCP1200 represents a major leap toward ultra−compact Switchmode Power Supplies. Due to a novel concept, the circuit allows the implementation of a complete offline battery charger or a standby SMPS with few external components. Furthermore, an integrated output short−circuit protection lets the designer build an extremely low−cost AC&...
Vendor:N/APackage Cooled:218D/C:N/A
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:INTELPackage Cooled:DIPD/C:N/A
ParameterTest Conditions EMITTER(IF = 10 mA) Input Forward VoltageTA =25C Input Reverse Breakdown Voltage(IR = 10 µA) Input Capacitance(VF = 0, f = 1 MHz) Input Diode Temperature Coefficient(IF = 10 mA) DETECTOR High Level Supply Current Single Channel(VCC = 5.5 V, IF = 0 mA) Dual Channel(VE = 0.5 V) Low Level Supply Current Single Channel (VCC = 5.5 V, IF = 10 mA) Dual Channel(VE = 0.5 V) L...
Vendor:INTELPackage Cooled:DIPD/C:N/A
ParameterTest Conditions EMITTER(IF = 10 mA) Input Forward VoltageTA =25C Input Reverse Breakdown Voltage(IR = 10 µA) Input Capacitance(VF = 0, f = 1 MHz) Input Diode Temperature Coefficient(IF = 10 mA) DETECTOR High Level Supply Current Single Channel(VCC = 5.5 V, IF = 0 mA) Dual Channel(VE = 0.5 V) Low Level Supply Current Single Channel (VCC = 5.5 V, IF = 10 mA) Dual Channel(VE = 0.5 V) L...
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:INTELPackage Cooled:DIPD/C:N/A
Received data are checked two times Built-in oscillator needs only 5% resistor VT goes high during a valid transmission Easy interface with an RF or an infrared transmission medium Minimal external components Package information: refer to Selection Table
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:TIPackage Cooled:LCCD/C:2005+
Vendor:TI
Vendor:TIPackage Cooled:LCC20
Vendor:TI
Vendor:NSPackage Cooled:LCCD/C:2005+
Vendor:NSPackage Cooled:LCCD/C:2005+
Vendor:TEXASPackage Cooled:CDIP16 D/C:1995
The CAT661 can replace the MAX660 and the LTC660 in applications where higher oscillator frequency and smaller capacitors are needed. In addition, the CAT661 is pin compatible with the 7660/1044, offering an easy upgrade for applications with 100mA loads.
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:N/APackage Cooled:30D/C:N/A
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. POLA, TMS320 are trademarks of Texas Instruments.
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:TI
Vendor:TI
Vendor:TI
Vendor:TI
HIGH PERFORMANCE • Polynomial complies to Intelsat IESS-308; RTCA DO-217 Appendix F, Revision D and proposed ITU-TS SG-18 (Formerly CCITT SG- 18) standards • 50 MBytes/sec burst transfer rate with a 50 MHz clock for all block lengths • Sustained data transfer rate of 12.5 MBytes/sec for block lengths from 54 bytes through 255 bytes using a 50 MHz clock • Processing latenc...
Vendor:TIPackage Cooled:LCCD/C:2005+
Vendor:TEXASPackage Cooled:CDIP16(军用)
• Single power supply • Low power consumption Operating mode Power down mode • Digital signal input/output interface • Sampling frequency(fs) • Transmission clock frequency • Filter characteristics
Vendor:MOTPackage Cooled:CLCCD/C:03+
Vendor:TI
Vendor:TEXASPackage Cooled:CDIP16
The LA75675M-S is an NTSC intercarrier VIF/SIF IC that adopts a semi-adjustment-free structure. In particular, it uses VCO adjustment to make AFT adjustment unnecessary and thus simplifies the overall adjustment process. A PLL-based technique is adopted for FM detection. The 5 V supply voltage provides compatibility with other multimedia systems. In addition it achieves high audio quality by incorpora...
Vendor:N/APackage Cooled:30D/C:N/A
Vendor:N/APackage Cooled:30D/C:N/A
This table reflects the DC limits used by Philips Semiconductors during its testing operations and conducted under the conditions set forth under the Recommended Operating Conditions table. VOH, for example, is guaranteed to be no less than 2.7V when tested with VCC = +4.75V, VIH = 2.0V, VIL = 0.8V, across the temperature range from 0 to 70C, and with an output current of IOH = C1.0mA. In this table, ...
Vendor:TIPackage Cooled:LCCD/C:2005+
Vendor:TEXASPackage Cooled:CDIP14D/C:1997
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
Vendor:TEXASPackage Cooled:CDIP14D/C:1997
NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which is compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J Std-020B.
Vendor:TIPackage Cooled:(LX)high-frequency
All terminations can be disconnected from the bus with a single logic control line. In the disconnect mode, output lines remain high impedance with or without power applied. This allows hot socket equipment plugging as required for plug and play applications.
Vendor:TIPackage Cooled:(LX)high-frequency
A programmable security bit in the DSM protects its contents from unauthorized viewing and copy- ing. When set, the security bit will block access of programming devices (JTAG or others) to the DSM Flash memories and PLD configuration. The only way to defeat the security bit is to erase the entire DSM device, after which the device is blank and may be used again. The DSP will always have access to ...
Vendor:TIPackage Cooled:(LX)high-frequency
A programmable security bit in the DSM protects its contents from unauthorized viewing and copy- ing. When set, the security bit will block access of programming devices (JTAG or others) to the DSM Flash memories and PLD configuration. The only way to defeat the security bit is to erase the entire DSM device, after which the device is blank and may be used again. The DSP will always have access to ...
Vendor:TIPackage Cooled:N/AD/C:08+
Vendor:TIPackage Cooled:N/AD/C:08+
Chip Select : Enables or disables all inputs except CK, /CK, CKE, DQS and DM. All com- mands are masked when /CS is registered high. /CS provides for external bank selection on systems with multiple banks. /CS is considered part of the command code.
Vendor:TID/C:03+04+
Vendor:TIPackage Cooled:N/AD/C:08+
Vendor:TIPackage Cooled:0323+D/C:LCC
Vendor:TIPackage Cooled:0342+D/C:LCC
Vendor:TIPackage Cooled:CLCCD/C:04+
Vendor:TIPackage Cooled:CLCCD/C:04+
Vendor:TEXASPackage Cooled:CDIP14 D/C:1995
Vendor:NSPackage Cooled:CAN3
Vendor:NSPackage Cooled:CAN3
Vendor:NSPackage Cooled:CAN3
D/C:886
Vendor:N/APackage Cooled:510D/C:N/A
Vendor:TIPackage Cooled:CDIP
Vendor:TIPackage Cooled:(LX)high-frequency
ECOS1KA821AA ECOS1KA102AA ECOS1KA122AA ECOS1KA471BL ECOS1KA471BA ECOS1KA681BA ECOS1KA821BA ECOS1KA102BA ECOS1KA122BA ECOS1KA152BA ECOS1KA182BA ECOS1KA222BA ECOS1KA681CL ECOS1KA102CA ECOS1KA122CA ECOS1KA152CA ECOS1KA182CA ECOS1KA222CA ECOS1KA272CA ECOS1KA332CA ECOS1KA102DL ECOS1KA182DA ECOS1KA222DA ECOS1KA272DA ECOS1KA332DA ECOS1KA392DA ECOS1KA472DA ECOS1KA152EL ECOS1KA222EA ECOS1KA272EA...
Vendor:TIPackage Cooled:(LX)high-frequency
ECOS1KA821AA ECOS1KA102AA ECOS1KA122AA ECOS1KA471BL ECOS1KA471BA ECOS1KA681BA ECOS1KA821BA ECOS1KA102BA ECOS1KA122BA ECOS1KA152BA ECOS1KA182BA ECOS1KA222BA ECOS1KA681CL ECOS1KA102CA ECOS1KA122CA ECOS1KA152CA ECOS1KA182CA ECOS1KA222CA ECOS1KA272CA ECOS1KA332CA ECOS1KA102DL ECOS1KA182DA ECOS1KA222DA ECOS1KA272DA ECOS1KA332DA ECOS1KA392DA ECOS1KA472DA ECOS1KA152EL ECOS1KA222EA ECOS1KA272EA...
Vendor:TIPackage Cooled:LCCD/C:2005+
Vendor:2585Package Cooled:N/A
Vendor:2585Package Cooled:N/A
Vendor:N/APackage Cooled:30D/C:N/A
Error amplifier inverting Soft start and SCP setting capacitor connection pin Power supply pin Output current setting and control pin Totem-pole type output pin Ground pin Capacitor and resistor connection pin setting the oscillation frequency Error amplifier output pin
Vendor:25Package Cooled:intersilD/C:N/A
Note: 1. Enhancement mode technology employs a single positive Vgs, eliminating the need of negative gate voltage associated with conventional depletion mode devices. 2. Refer to reliability datasheet for detailed MTTF data 3. Conform to JEDEC reference outline MO229 for DRP-N 4. Linearity Figure of Merit (LFOM) is essentially OIP3 divided by DC bias power.
D/C:99+
These devices consist of a 32-bit shift register, 32 data latches, and control logic to perform polarity and blanking functions. Data is shifted through the shift register on the logic high-to-low transition of the clock. The HV45 shifts in the counterclockwise direction when viewed from the top of the package and the HV46 shifts in the clockwise direction. A data output buffer is provided for cascading...
Vendor:105D/C:N/A
The IDT70V3579 is a high-speed 32K x 36 bit synchronous Dual- Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very short cycle times. With an input data register, the IDT7...
Vendor:INTELPackage Cooled:CDIPD/C:9831+
Vendor:INTELPackage Cooled:CDIPD/C:9831+
Vendor:TIPackage Cooled:0331+D/C:LCC
D/C:1356