Index "5"Package Cooled:CAND/C:998
The CY7C964 circuitry is designed to be of use to designers of VMEbus circuitry, including VSB (VME subsystem bus) and designs not requiring the features of the Cypress VIC068A, VIC64, CY7C960, and CY7C961. The logic diagram includes general-purpose blocks of comparators, counters, and latches that can be controlled using the flexible control interface to allow many different options to be implemented....
Package Cooled:CAND/C:998
Package Cooled:CAND/C:998
Vendor:TIPackage Cooled:N/AD/C:98+
External Access enable: EA must be externally held low to enable the device to fetch code from external program memory locations 0000H to FFFFH. If EA is held high, the device executes from internal program memory unless the program counter contains an address greater than 0FFFH. This also receives the 12V programming enable voltage (VPP) during Flash programming.
Vendor:TEAXPackage Cooled:DIP
The digital output stage of the TLC372 can be damaged if it is held in the linear region of the transfer curve. Conventional operational amplifier/comparator testing incorporates the use of a servo loop that is designed to force the device output to a level within this linear region. Since the servo-loop method of testing cannot be used, the following alternatives for measuring parameters such as input of...
Vendor:ADPackage Cooled:N/AD/C:08+
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guarant- eed for volume production. SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties.
The ADC11DL066 is a dual, low power monolithic CMOS analog-to-digital converter capable of converting analog in- put signals into 11-bit digital words at 66 Megasamples per second (MSPS), minimum. This converter uses a differential, pipeline architecture with digital error correction and an on- chip sample-and-hold circuit to minimize die size and power consumption while providing excellent dynamic per...
Vendor:XICORPackage Cooled:DIP
Vendor:XICORD/C:03+04+
Vendor:XICORD/C:03+04+
Vendor:TI
Thermal Resistance . . . . . . . . . . . . . . . .jajc Ceramic DIP and FRIT Package . . . . . 80oC/W20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W20oC/W Maximum Package Power Dissipation (PD) at +125oC For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K). . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation...
Vendor:TIPackage Cooled:CDIP8D/C:00+
The ADE7763 provides a serial interface to read data and a pulse output frequency (CF) that is proportional to the active power. Various system calibration features such as channel offset correction, phase calibration, and power calibration ensure high accuracy. The part also detects short duration, low or high voltage variations.
Vendor:TIPackage Cooled:0333+D/C:LCC
Vendor:TIPackage Cooled:0333+D/C:LCC
Vendor:TIPackage Cooled:CDIP8D/C:137
1.3 INSTRUCTION SET In todays 8-bit microcontroller application arena cost/ performance, flexibility and time to market are several of the key issues that system designers face in attempting to build well-engineered products that compete in the marketplace. Many of these issues can be addressed through the manner in which a microcontrollers instruction set handles process- ing tasks. And thats why COP...
D/C:99+
(1) Pulse duration300 µs, duty cycle2%. (2) Ratings apply for tw = 1 ms. See Figure 1 for ITM capability for various durations of an exponentially decaying current waveform. tw is defined as 5 time constants of an exponentially decaying current pulse. (3) The gate controlled turn-on time in a crowbar circuit will be influenced by the circuit inductance.
Vendor:TIPackage Cooled:CDIP14D/C:00/01+
Vendor:TIPackage Cooled:CDIP8D/C:144
Self-discharge of NiMH and NiCd batteries is estimated based on an internal timer and temperature sen- sor. Compensations for battery tem- perature and rate of charge or dis- charge are applied to the charge, dis- charge, and self-discharge calcula- tions to provide available charge in- formation across a wide range of op- erating conditions. Battery capacity is automatically recalibrated, or learned, in...
Vendor:TIPackage Cooled:CDIP8D/C:146
The ADSP-21991 instruction set provides flexible data moves and multifunction (one or two data moves with a computation) instructions. Every single word instruction can be executed in a single processor cycle. The ADSP-21991 assembly language uses an algebraic syntax for ease of coding and readability. A compre- hensive set of development tools supports program development.
Vendor:TIPackage Cooled:CDIP8D/C:146
The ADSP-21991 instruction set provides flexible data moves and multifunction (one or two data moves with a computation) instructions. Every single word instruction can be executed in a single processor cycle. The ADSP-21991 assembly language uses an algebraic syntax for ease of coding and readability. A compre- hensive set of development tools supports program development.
Vendor:TI
VIN (Pin 4): Input Power Supply. This pin supplies power to the boosted switch and corresponds to the collector of the switch transistor.This pin also supplies power to most of the ICs internal circuitry if the VBIAS pin is not driven externally. This supply will be subject to high switching transient currents so this pin requires a high quality bypass capacitor that meets whatever application-specific input ...
Vendor:TIPackage Cooled:CDIP14D/C:01+
Vendor:TIPackage Cooled:0339+D/C:LCC
Vendor:TIPackage Cooled:0339+D/C:LCC
Vendor:TI
ADJ: In the adjustable version, the user programs the output voltage with two external resistors. The resistors should be 0.1% for high accuracy. The output amplifier is configured as a noninverting operational amplifier. The resistors should meet the criteria of R3 || R4 < 100 Ω. Connect ADJ to VOUT for an output voltage of 1.2 V. Note that the point at which the feedback network is connected to ...
Vendor:TI
Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Vendor:SILPackage Cooled:CDIP
The output drivers in the HIP6601 and HIP6603 have the capacity to efficiently switch power MOSFETs at frequencies up to 2MHz. Each driver is capable of driving a 3000pF load with a 30ns propagation delay and 50ns transition time. Both products implement bootstrapping on the upper gate with only an external capacitor required. This reduces implementation complexity and allows the use of higher p...
Vendor:SILPackage Cooled:CDIP
The output drivers in the HIP6601 and HIP6603 have the capacity to efficiently switch power MOSFETs at frequencies up to 2MHz. Each driver is capable of driving a 3000pF load with a 30ns propagation delay and 50ns transition time. Both products implement bootstrapping on the upper gate with only an external capacitor required. This reduces implementation complexity and allows the use of higher p...
Vendor:ADPackage Cooled:30D/C:N/A
(For a differential input unit) An example of I/O voltage characteristics of a level conversion circuit for a differential input is shown in the figure to the right. Although the characteristics, including those of the Vth voltage, are basically the same as those for a single-phased input, the two- phased input phase is defined. (Refer to clock timing conditions.)
Vendor:TI
As shown in Figure 1, for 6A output, only two 1210 footprint ceramic capacitors are needed to meet the 50% step load change, thus greatly reducing the output capacitor size when compared to switching at 500kHz or less. A second benefit is due to the low ESR of the ceramic capacitors. Large inductor ripple current is allowed to achieve the 1% ripple voltage requirement.The value of the output inductor is 0.6...
Vendor:TIPackage Cooled:DIPD/C:01+
Internal Power Dissipation JA (Exposed paddle soldered down) JA (Exposed paddle not soldered down) JC (At exposed paddle) Maximum Junction Temperature Operating Temperature Range Storage Temperature Range Lead Temperature Range (Soldering 60 sec)
Vendor:INTELPackage Cooled:DIP
Vendor:INTELPackage Cooled:DIPD/C:N/A
Although designed as fixed-voltage regulators, the output voltage can be increased through the use of a simple voltage divider. The low quiescent drain current of the device insures good regulation when this method is used, especially for the SG120 series.
Vendor:INTELPackage Cooled:DIPD/C:N/A
Although designed as fixed-voltage regulators, the output voltage can be increased through the use of a simple voltage divider. The low quiescent drain current of the device insures good regulation when this method is used, especially for the SG120 series.
Vendor:Intel
Vendor:Intel
The dMAX controller includes features such as the capability to perform three-dimensional data transfers for advanced data sorting, and the capability to manage a section of the memory as a circular buffer/FIFO with delay-tap based reading and writing of data. The dMAX controller is capable of concurrently processing two transfer requests (provided that they are to/from different source/destinations).
Vendor:Intel
NOTE: 1. AVSS (reference ground) must be connected to 0V (ground). AVCC (reference input) cannot differ from VCC by more than 0.2V, and must be in the range 4.5V to 5.5V. 2. When P0.2 is at or close to 0 volt, it may affect the internal ROM operation. We recommend that P0.2 be tied to VCC via a small pullup (e.g., 2kΩ).
D/C:1453
Vendor:Analog DevicesPackage Cooled:Original
The MSM7716 is a single-channel CODEC CMOS IC for voice signals that contains filters for linear A/D and D/A conversion. Designed especially for a single-power supply and low-power applications, the device is optimized for applications for the analog interfaces of audio signal processing DSPs and digital wireless systems. The analog output signal can directly drive a ceramic type handset receiver. In addit...
500 MSPS Selectable 2x-8x Interpolation On-Chip PLL/VCO Clock Multiplier Full IQ Compensation Including Offset, Gain, and Phase Flexible Input Options: C FIFO With Latch on External or Internal Clock C Even/Odd Multiplexed Input C Single Port Demultiplexed Input Complex Mixer With 32-Bit NCO Fixed Frequency Mixer With Fs/4 and Fs/2 1.8-V or 3.3-V I/O Voltage On-Chip 1.2-V Reference Differential Scala...
There are two limitations on the power handling ability of a transistor; average junction temperature and secondary breakdown. Safe operating area curves indicate IC C VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
Vendor:Analog Devices
These INFINEON modules are industry standard 144 pin 8-byte Synchronous DRAM (SDRAM) Small Outline Dual In-line Memory Modules (SO-DIMM) which are organised as 8Mx64 (64MByte) and 16x64 (128MByte) high speed memory arrays designed for use in non-parity applications. These SO-DIMMs use SDRAMs in TSOPII packages. Decoupling capacitors are mounted on the board.
Vendor:CYPRESSPackage Cooled:30D/C:N/A
Microprocessors with bidirectional reset pins (such as the Motorola 68HC11 series) can contend with the MAX709 reset output. If, for example the MAX709 RESET output is asserted high and the µP wants to pull it low, indeterminate logic levels may result. To correct this, connect a 4.7kΩ resistor between the MAX709 RESET output and the µP reset I/O (see Figure 3). Buffer the MAX709 RESET outp...
Vendor:CY
The transfer of information from the input serial streams to the output serial streams results in a delay through the MT8985 device. The delay through the MT8985 device varies according to the mode selected in the V/C bit of the connect memory high.
Vendor:NSCPackage Cooled:CAND/C:95+
Vendor:N/APackage Cooled:N/AD/C:08+09+
Low-power dissipation Operating: 10.8 mW/MHz (typical) Single power supply voltage of 2.3 to 3.6 V Power down features using CE Data retention supply voltage of 1.5 to 3.6 V Direct TTL compatibility for all inputs and outputs Standby Current (maximum):
Vendor:N/APackage Cooled:N/AD/C:08+09+
Low-power dissipation Operating: 10.8 mW/MHz (typical) Single power supply voltage of 2.3 to 3.6 V Power down features using CE Data retention supply voltage of 1.5 to 3.6 V Direct TTL compatibility for all inputs and outputs Standby Current (maximum):
Vendor:N/APackage Cooled:N/AD/C:08+09+
Note: The HUMMER module itself can sustain continuous voltages of up to 50 VDC and voltage spikes of 80 volts for up to 50 msec, and it will pass these voltages on to the converter through the external bypass diode. If these ratings exceed the rating of the converter, care should be taken to control the line voltage to prevent damage to the converter.
Vendor:N/APackage Cooled:N/AD/C:08+09+
Note: The HUMMER module itself can sustain continuous voltages of up to 50 VDC and voltage spikes of 80 volts for up to 50 msec, and it will pass these voltages on to the converter through the external bypass diode. If these ratings exceed the rating of the converter, care should be taken to control the line voltage to prevent damage to the converter.
Vendor:N/APackage Cooled:N/AD/C:08+09+
The feedback voltage pin is the non-inverting input to the PWM comparator. It has a 0.9mA current source connected internally while a capacitor and op- tocoupler are typically connected externally. A feedback voltage of 6V trig- gers over load protection (OLP). There is a time delay while charging external capacitor Cfb from 3V to 6V using an internal 5uA current source. This time delay prevents false trigger...
A. These materials are intended as a reference to assist customers with the selection of Panasonic semiconductor products best suited to their applications. Due to modification or other reasons, any information contained in this material, such as available product types, technical data, and so on, is subject to change without notice. Customers are advised to contact our semiconductor sales office and o...
A. These materials are intended as a reference to assist customers with the selection of Panasonic semiconductor products best suited to their applications. Due to modification or other reasons, any information contained in this material, such as available product types, technical data, and so on, is subject to change without notice. Customers are advised to contact our semiconductor sales office and o...
Vendor:TI
The 5962-9093201MEA is a high-speed low-noise clock generator designed to work with the Pericom's PI6C18x clock buffer to meet all clock needs for Mobile Intel Architecture platforms. CPU and chipset clock frequencies of 66.6 MHz and 100 MHz are supported.
Vendor:TI
This is an input pin to the device and is generated by the master that is controlling the device. The master transfers Input informa- tion (Start bit, Opcode bits, Array addresses and Data) serially via this pin into the device. This Input information is latched on the rising edge of the SCK. This pin is gated by CS signal.
Vendor:INTEL