74LC32A

Vendor:TIPackage Cooled:SSOPD/C:07+

This pin adjusts the peak current limit of the Sense FET. The feedback 0.9mA current source is diverted to the parallel combination of an internal 2.8kΩ resistor and any external resistor to GND on this pin to determine the peak current limit. If this pin is tied to Vcc or left floating, the typical peak cur- rent limit will be 0.7A.

74LC373A

Package Cooled:96D/C:SOP

Hynix HYMD264G726A(L)8-M/K/H/L series is registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx72 high-speed memory arrays. Hynix HYMD264G726A(L)8-M/ K/H/L series consists of eighteen 32Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD264G726A(L)8-M/K/H/L series provide a high performance 8-byte interface in 5....

74LC541A

Vendor:TID/C:99

74LC541A

Vendor:TID/C:99

74LC543A

74LC574A

Vendor:TIPackage Cooled:SMDD/C:04

Capacitor Table Table 1-1 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The number of capacitors required at both the input and output buses is identified for each capacitor type.

74LC72524M

Vendor:NSPackage Cooled:5100D/C:05+

74LC74A

Vendor:FSCPackage Cooled:SOPD/C:07+

INPUT/OUTPUT CHARACTERISTICS Input Common-Mode Voltage Adjustment Range Max Output Voltage Swing1 dB Compressed Output Common-Mode Offset Output Common-Mode DriftC40C to +85C Output Differential Offset Voltage Output Differential Offset Drift C40C to +85C Input Bias Current Input Resistance1 Input Capacitance1 CMRR Output Resistance1 Output Capacitance1

74LC86

Vendor:TIPackage Cooled:TSSOP14

74LC86A

Vendor:TIPackage Cooled:SSOPD/C:07+

Intel Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in an Intel product. No other circuit patent licenses are implied. Information contained herein supersedes previously published specifications on these devices from Intel. © INTEL CORPORATION, 1993November 1993Order Number: 270727-006

74LCH245A

Vendor:TIPackage Cooled:SSOPD/C:99

This series of hermetically packaged products feature the latest advanced MOSFET and packaging technology. They are ideally suited for Military requirements where small size, high performance and high reliability are required, and in applications such as switching power supplies, motor controls, inverters, choppers, audio amplifiers and high energy pulse circuits. The MOSFET gates are protected using bi-la...

74LCS21A/P

Package Cooled:99D/C:563

If the port is left in a forced 1394b beta only (B1, B2, or B4) mode, then the TPB+ and TPBC terminals may be left unconnected or the TPB+ and TPBC terminals can be connected to the suggested normal termination network. The TPA+ and TPAC terminals of an unused port can be left unconnected. The TPBIAS#_SD# terminal must be pulled to ground through a 1.2-kΩ or less resistor.

74LCS21A/P

Package Cooled:99D/C:563

If the port is left in a forced 1394b beta only (B1, B2, or B4) mode, then the TPB+ and TPBC terminals may be left unconnected or the TPB+ and TPBC terminals can be connected to the suggested normal termination network. The TPA+ and TPAC terminals of an unused port can be left unconnected. The TPBIAS#_SD# terminal must be pulled to ground through a 1.2-kΩ or less resistor.

74LCT2524

Vendor:NSPackage Cooled:SMD-8

The BA178M!!T and BA178M!!FP series are 3-pin, fixed positive output voltage regulators. These regulators are used to provide a stabilized output voltage from a fluctuating DC input voltage. There are 11 fixed output voltages, as follows : 5V, 6V, 7V, 8V, 9V, 10V, 12V, 15V, 18V, 20V, and 24V. The maximum current capacity is 0.5A for each of the above voltages.

74LCT2524M

D/C:00+

The TLC372C is characterized for operation from 0C to 70C. The TLC372I is characterized for operation from C 40C to 85C. The TLC372M is characterized for operation over the full military temperature range of C 55C to 125C. The TLC372Q is characterized for operation from C 40C to 125C.

74LCT2524N

Vendor:NSPackage Cooled:SOP-8D/C:2002+

74LCT2525M

Vendor:NSD/C:06+

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−b...

74LCV00A

Package Cooled:93D/C:650

The TS input of the bq2060 in conjunction with an NTC thermistor measures the battery temperature as shown in Figure 1. The bq2060 reports temperature in Tem- perature(). THON may be used to connect the bias source to the thermistor when the bq2060 samples the TS input. THON is high impedance for 60ms when the temperature is measured, and driven low otherwise.

74LCV1G32DBVR

74LCV4245A

Vendor:PHILIPSD/C:03+

To assist in the transceiver evaluation process, Agilent offers a 1.25 Gbd Gigabit Ethernet evaluation board which facilitates testing of the HFBR-5710L. It can be obtained through the Agilent Field Organization by referencing Agilent part number HFBR-0571.

74LCV541APW

74LCVC74APW

Time t6, represents a transition between light and heavy load. A single energy pulse is not sufficient to force the output voltage above its upper threshold before the mini- mum off time has expired, and a second charge cycle is commanded. Since the inductor current does not reach zero in this case, the peak current is greater than 0.5A at the end of the next charge on time. The result is a ratcheting...

74LCX00(TSSOPMC74LCX00DT)00

Vendor:OND/C:0

74LCX00BQX

the performance for a wide range of applications and locations world wide. The KESRX05, with its anti-jamming detector circuit, is an ideal ASK/ OOK receiver for difficult reception areas caused by interference such as amateur radio repeater stations and wireless stereo headphones. Operation is possible with interfering signals which are more than 20dB stronger than the wanted signal (IF bandwidth = ...

74LCX00DR2

Vendor:ONPackage Cooled:SOP3.9D/C:10

74LCX00FT-EL

Vendor:TSBPackage Cooled:TTLD/C:04+

74LCX00MTCX_F40

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX00MTCX_NF042

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX00MTCX_NF40

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX00SJ

Vendor:FAIPackage Cooled:SOP5.2D/C:01+

• External hardware 5-bit value readable via • Multiplexer selection can be overridden by I2C-bus • Operating power supply voltage 3.0 V to 3.6 V • 5 V and 2.5 V tolerant inputs • 0 to 400 kHz clock frequency • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V

74LCX00SJX

Vendor:FSCPackage Cooled:SOP5.2D/C:07+

An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. An export license and/or quota needs to be obtained from the competent authorities of the Chinese Government if any of the products...

74LCX00SJX

Vendor:FSCPackage Cooled:SOP5.2D/C:07+

An export permit needs to be obtained from the competent authorities of the Japanese Government if any of the products or technologies described in this material and controlled under the "Foreign Exchange and Foreign Trade Law" is to be exported or taken out of Japan. An export license and/or quota needs to be obtained from the competent authorities of the Chinese Government if any of the products...

74LCX02DT

74LCX02MTC

Vendor:98

DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique " Single Feature Size™ " strip-based process. The resulting tran- sistor shows extremely high packing density for low on-resistance, rugged avalanche charac- teristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.

74LCX02MTC

Vendor:98

DESCRIPTION This Power MOSFET is the latest development of STMicroelectronics unique " Single Feature Size™ " strip-based process. The resulting tran- sistor shows extremely high packing density for low on-resistance, rugged avalanche charac- teristics and less critical alignment steps therefore a remarkable manufacturing reproducibility.

74LCX02MTCX(LVC02)

Vendor:FSCPackage Cooled:TSSOPD/C:03+

PLL division factors for different clock inputs The word select PLL The Filter Stream DAC (FSDAC) Interpolation filter Noise shaper Function of pin POM Power off plop suppression Pin VREFDA for internal reference Supply of the analog outputs External control pins Digital serial inputs/outputs and SPDIF inputs Digital serial inputs/outputs SPDIF inputs I2C-bus interface (pins SCL and SDA) R...

74LCX02MTCX_F042

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX02MTCX_NF40

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX02MTCX-NL

As with most timing specifications, phase noise measurements have issues. The primary issue relates to the limitations of the equipment. Often the noise floor of the equipment is higher than the noise floor of the device. This is illustrated above. The de-

74LCX02MX

Vendor:FSCPackage Cooled:SOP14D/C:09+

During a memory read cycle the 7-bit check word is re- trieved along with the actual data In order to be able to determine whether the data from the memory is acceptable to use as presented on the bus the error flags must be tested to determine if they are at the high level The first case in Table III represents the normal no-error conditions The EDAC presents highs on both flags The

74LCX02SJX

Vendor:Fairchild

Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the de- vice. This is a stress rating only and functional opera- tion of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

74LCX02TTR

Vendor:STPackage Cooled:SSOP-14D/C:01+

The MC100ES6039 is a low skew 2/4, 4/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, LVPECL input signals. In addition, by using the VBB outp...

74LCX045SJ

74LCX04BQX

Vendor:FAIRCHILDPackage Cooled:QFN14D/C:08+

The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recom- mended conditions. All voltage parameters are absolute referenced to COM. The VS offset rating is tested with all supplies biased at 15V differential.

74LCX04D

The U6209B is controlled via a 2-wire I2C bus format by feeding data and clock signals into the SDA and SCL lines respectively. The table I2CCBUS DATA FORMAT describes the format of the data and shows how to select the device address by applying a voltage at pin 10. When the correct address byte has been received, the SDA line is pulled low by the device during the acknowledge period, and then also dur...

74LCX04DR

Vendor:MOTPackage Cooled:SMD

Port 0: Port 0 is a 5-bit bidirectional port. Port 0.0CP0.2 are open drain. Port 0.0CP0.2 pins that have 1s written to them float, and in that state can be used as high-impedance inputs. P0.3CP0.4 are bidirectional I/O port pins with internal pull-ups. These pins are driven low if the port register bit is written with a 0. The state of the pin can always be read from the port register by the program. Port...

74LCX04DTR2

Vendor:ON

DESCRIPTION The 74V2T241 is an advanced high-speed CMOS DUAL BUS BUFFER NON INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It has one active-high and one active-low output enable. Power down protection is provided on all

74LCX04M(SMD) D/C01

Vendor:FSCD/C:1

74LCX04MTCX

Vendor:FAIPackage Cooled:TSSOPD/C:00+

and NX26F041A offer 1M-bits and 4M-bits of Flash memory organized in sectors of 264 bytes each. Each sector is individually addressable through basic commands or control functions such as Reset, Read, Erase/Write, and Ready/Busy. The NXS (NexFlash Serial) 2-wire serial interface is ideal for use with microcontrollers since it only requires two pins. This leaves pins normally used for parallel Flash fr...

74LCX04MTCX_E4

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX04MTCX_NF042

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX04MTCX-NL

Serial data output, 5-V CMOS logic level tristate output for output (status) register data, sends 16-bit status information to the microcontroller (LSB is transferred first). Output will remain tristated unless device is selected by CS = low, therefore, several ICs can operate on one data output line only.

74LCX04MX

Vendor:FSCPackage Cooled:SOP14D/C:08+

Free E86 family information such as data books, users man ual s , data sh eets , ap pl ic ati on n otes , th e FusionE86 Partner Solutions Catalog, and other litera- ture is available with a simple phone call. Internation- ally, contact your local AMD sales office for complete E86 family literature.

74LCX04SJX

Vendor:FAIPackage Cooled:04+05+D/C:4450

The crystal used should be a fundamental mode (do not use third overtone), parallel resonant crystal. To optimize the initial accuracy, connect crystal capacitors from pins X1 to ground and X2 to ground. The value of these capacitors is given by the following equation:

74LCX04TS

Vendor:FAIRCHILDPackage Cooled:TSSOPD/C:01+

Enables the associated DDR2 SDRAM command decoder when low and disables the command decoder when high. When the command decoder is disabled, new commands are ignored but previous operations continue. Rank 0 is selected by S0, Rank 1 is selected by S1. Ranks are also called Physical banks.

74LCX04TTR

Vendor:STPackage Cooled:TSSOP-14D/C:01+

"Uncertainty" refers to the uncertainty of the temperature measurement when performing the 2-point calibration trim as described in the application note. These graphs assume 11-bit temperature conversion. The accuracy can be improved further through software correction. See the application note referenced as "Note 18" on the previous page for details.

74LCX05M

Vendor:STPackage Cooled:SOP-14D/C:99

Internal circuitry is provided to ensure that in a power loss scenario, writes to non-volatile memory that have already started get completed. To ensure proper functioning of this circuitry, the VDD droop time (during power down or power loss) should be at least 10ms from the time LVI circuit trips and voltage reaches 2.77V.

74LCX06

Vendor:FAIPackage Cooled:SOP3.9D/C:04+

SMBJ surface mount package is utilized where power and space is a requirement. Designed for effective protection of power bus lines from voltage spikes originating from ESD, line noise (EFT), and induced lighting defined by IEC 1000-4-2, 1000- 4-4, and 1000-4-5 respectively. Advanced technology provides lowest clamping voltage with surface mount packaging minimizing parasitic inductance.

74LCX06M

1.1 Scope. This specification covers the performance requirements for NPN, silicon, low-power, high voltage transistors. Four levels of product assurance are provided for each encapsulated device types as specified in MIL-PRF-19500, and two levels of product assurance for each unencapsulated device type die.

74LCX06M_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX06MTC

Vendor:FSCPackage Cooled:TSSOPD/C:03+

The MSK 5115 series voltage regulators are available in +3.3V, +5.0V, +12.0V or adjustable output configura- tions. All boast ultra low dropout specifications due to the utilization of a super PNP output pass transistor with monolithic technology. Dropout voltages of 350mV at 1.5 amps are typical in this configuration, which drives efficiency up and power dissipation down. Accuracy is guaranteed with a 1% m...

74LCX06MX_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX06SJ

(VIN1 = VIN2 = 3.7V, PWR_ON = IN1, L = 2.2µH (LQH31CN2R2M53), CFF = 150pF, VOUT1 = VOUT2 = 2.6V, VOUT3 = 1.867V (R1 = 150kΩ, R2 = 75kΩ), CIN = 10µF, CBP = 0.01µF, COUT1 = COUT2 = 4.7µF, COUT3 = 2.2µF, RESET pulled up with 100kΩ to OUT1, TA = +25C, unless otherwise noted.)

74LCX06SJ

(VIN1 = VIN2 = 3.7V, PWR_ON = IN1, L = 2.2µH (LQH31CN2R2M53), CFF = 150pF, VOUT1 = VOUT2 = 2.6V, VOUT3 = 1.867V (R1 = 150kΩ, R2 = 75kΩ), CIN = 10µF, CBP = 0.01µF, COUT1 = COUT2 = 4.7µF, COUT3 = 2.2µF, RESET pulled up with 100kΩ to OUT1, TA = +25C, unless otherwise noted.)

74LCX07FT

This document is a general product description and is subject to change without notice. Hyundai electronics does not assume any responsibility for use of circuits described. No patent licences are implied Hyundai Semiconductor Rev.00 / Sep.97

74LCX07MTC

Vendor:FAIRCHILDPackage Cooled:TSSOPD/C:05+

Serialized data bits are output from the DO output, starting in ascending order, from parallel input bit DI C 0. The number of serialized data bits output per data clock cycle is determined by the multiplexing ratio M. For values of M less than or equal to 10, the cascade input (CI) is not used, and only the first M parallel input bits (DI C 0 thought DI C [M C 1]) are used. For values of M greater than 1...

74LCX07MTC

Vendor:FAIRCHILDPackage Cooled:TSSOPD/C:05+

Serialized data bits are output from the DO output, starting in ascending order, from parallel input bit DI C 0. The number of serialized data bits output per data clock cycle is determined by the multiplexing ratio M. For values of M less than or equal to 10, the cascade input (CI) is not used, and only the first M parallel input bits (DI C 0 thought DI C [M C 1]) are used. For values of M greater than 1...

74LCX07MTR

Vendor:stPackage Cooled:07+D/C:12500

• LDO with Integrated Microcontroller Reset Monitor Functionality • Low Input Supply Current (80 µA, typical) • Very Low Dropout Voltage • 10 µsec (typ.) Wake-Up Time from SHDN • 300 mA Output Current • Standard or Custom Output and Detected Voltages • Power-Saving Shutdown Mode • Bypass Input for Quiet Operation • Separate Input for Dete...

74LCX07MTX

Vendor:FSCPackage Cooled:TSSOP14D/C:02+

The DDX-2000 converts serial I2S digital audio signals into pulse-width-modulated digital signals output at 8*Fs, according to Apogees patented damped ternary architecture. Signals from the S/PDIF receiver are applied as inputs to the DDX processor and signals from the DDX processor are applied to the inputs of the DDX power stage.

74LCX07MTX

Vendor:FSCPackage Cooled:TSSOP14D/C:02+

The DDX-2000 converts serial I2S digital audio signals into pulse-width-modulated digital signals output at 8*Fs, according to Apogees patented damped ternary architecture. Signals from the S/PDIF receiver are applied as inputs to the DDX processor and signals from the DDX processor are applied to the inputs of the DDX power stage.

74LCX07MX_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX07SJ

Vendor:Fairchild

• Separate record/playback input and output. Unprocessed signal output available in the encode and decode modes. • Reduction of external components count. • Small capacitor value for the reference voltage. • NR ON/OFF switching and REC/PB switching are provided internally. • 2-type package (DP-16, FP-16DA) • Wide range of operating supply voltage.

74LCX07SJ

Vendor:Fairchild

• Separate record/playback input and output. Unprocessed signal output available in the encode and decode modes. • Reduction of external components count. • Small capacitor value for the reference voltage. • NR ON/OFF switching and REC/PB switching are provided internally. • 2-type package (DP-16, FP-16DA) • Wide range of operating supply voltage.

74LCX07SJX

Vendor:Fairchild

Operation of the SX1405 is straightforward. Parallel data is input to the device. SerialCtoCparallel conversion is performed. Then the serial data is output at the selected line rate clock. The 78 MByte/s or 19 MByte/s parallel data is converted into a bitCserial 622 Mbit/s or 155 Mbit/s data stream.

74LCX07TTR

Vendor:STPackage Cooled:TSSOP-14D/C:01+

Integrates 10BASE-T Transceiver Functions: -Driver and Receiver -Link Integrity Test -Receive Polarity Detection and Correction Integrates AUI Interface Implements 10 Mbps Manchester Encoding/Decoding and Clock Recovery Automatic Retransmission, Bad Packet Rejection, and Transmit Padding External and Internal Loopback Modes Four Direct Driven LEDs for Status/ Diagnostics

74LCX08APW

Package Cooled:TID/C:2003

This circuit consists of two independent, high gain, internally frequency compensated which were designed specifically for automotive and industrial control system. It operates from a single power supply over a wide range of voltages. The low power supply drain is independent of the magnitude of the power supply voltage.

74LCX08DT

Notes: 1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.

74LCX08DTR2(TSSOP2.5K/RL)00

Vendor:OND/C:0

74LCX08FN

Package Cooled:SOPD/C:05环保

74LCX08MT

Vendor:FAIRCHILDPackage Cooled:N/AD/C:0406+

Up to 18-A Output Current 5-V Input Bus Wide-Output Voltage Adjust (0.8 V to 3.6 V) Efficiencies up to 96% On/Off Inhibit Output Voltage Sense Prebias Start-Up Undervoltage Lockout Auto-Track™ Sequencing Output Overcurrent Protection (Nonlatching, Auto-Reset) Overtemperature Protection Operating Temperature: C40C to 85C Safety Agency Approvals: UL/cUL 60950, EN60950 VDE (Pending) POLA™ C...

74LCX08MTCX_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX08MTCX-NL

5. The dominant wavelength, ëd, is derived from the CIE chroma- ticity diagram and represents the single wavelength which defines the color of the device. 6. The HDSP-088X and HDSP-098X series devices are categor- ized as to dominant wavelength with the category designated by a number on the back of the display package. 7. All typical values at VCC = 5.0 V and TA = 25C.

74LCX08MX_NF40

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX08SJX

Vendor:FAIRCHILDPackage Cooled:SOPD/C:2004

The Hynix 74LCX08SJX Series are 32Mx64bits Synchronous DRAM Modules. The modules are composed of sixteen 16Mx8bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. One 0.22uF and one 0.0022uF decoupling capacitors per each SDRAM are mounted on the PCB.

74LCX08SJX

Vendor:FAIRCHILDPackage Cooled:SOPD/C:2004

The Hynix 74LCX08SJX Series are 32Mx64bits Synchronous DRAM Modules. The modules are composed of sixteen 16Mx8bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. One 0.22uF and one 0.0022uF decoupling capacitors per each SDRAM are mounted on the PCB.

74LCX08TTR

Vendor:STPackage Cooled:TSSOP-14D/C:01+

Expansion of serial cards beyond four channels is possible using the 8-bit pass-through Local Bus function. The addressable space can be increased up to 256 bytes, and divided into four chip-select regions. In 32-bit mode the bus can map up to 16kb of Memory address space. This flexible expansion scheme caters for cards with up to 20 serial ports using external 16C950, 16C952, 16C954 or compatible dev...

74LCX09MTR

74LCX10M

Vendor:Fairchild

Notes: 1. Precaution: Devices are ESD sensitive. Use proper handling procedures. 2. Electronic Industrial Association of Japan. 3. Pulsed measurement, PW350 µs, duty cycle 2%. 4. The emitter terminal should be connected to the ground terminal of the 3 terminal capacitance bridge.

74LCX10MTCX_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX10SJ

Pin 16 is the (-) clamp input pin. This pin is the inverting input to the clamp comparator. A 10KΩ feedback resistor is connected from this pin to the output pin of the amplifier (pin 14). When the clamp comparator is enabled, the voltage at pin 16 is compared to the voltage at pin 17, which is the non- inverting input of the clamp comparator. A source or sink cur- rent is generated at pin 10 to ...

74LCX10SJX

In addition to high-power/low-power bias modes, the efficiency of the PA module can be significantly increased at backed-off RF power levels by dynamically varying the supply voltage (Vcc) applied to the amplifier. Since mobile handsets and power amplifiers frequently operate at 10-20 dB back-off, or more, from maximum rated linear power, battery life is highly dependent on the DC power consumed at an...

74LCX11

Vendor:FAIPackage Cooled:SOP3.9D/C:04+

This series of fixed-voltage integrated-circuit voltage regulators is designed for a wide range of applications. These applications include on-card regulation for elimination of noise and distribution problems associated with single-point regulation. Each of these regulators can deliver up to 1.5 A of output current. The internal current-limiting and thermal-shutdown features of these regulators essential...

74LCX11

Vendor:FAIPackage Cooled:SOP3.9D/C:04+

This series of fixed-voltage integrated-circuit voltage regulators is designed for a wide range of applications. These applications include on-card regulation for elimination of noise and distribution problems associated with single-point regulation. Each of these regulators can deliver up to 1.5 A of output current. The internal current-limiting and thermal-shutdown features of these regulators essential...

74LCX112MTC

• Space Saving SIP Package • +5V input • 5-bit Programmable: 1.3V to 3.5V@13A • High Efficiency • Input Voltage Range: 4.5V to 5.5V • Differential Remote Sense • Short Circuit Protection • Over-Voltage Drive • Power Good Signal

74LCX112MTC_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX112MTCX_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74LCX112MX

Vendor:FSCPackage Cooled:SOP

The parallel I/O interface may be configured for numerous forms of clocking to provide the highest flexibility in system architecture. In addition to clocking the transmit path, the receive interface may be configured to present data relative to a recovered clock or to a local reference clock.

74LCX112SJX

Vendor:FAIPackage Cooled:2000D/C:8000

With handheld equipment functioning as an iButton reader/writer one often faces the problem of finding a place for the probe when it is not used. The 74LCX112SJX Touch and Hold Probe Cable Cradle solves this problem. In addition to that, it converts the handheld equipment into a compact single-unit reader/writer for iButtons if the probe is firmly inserted into the cradle.

74LCX112SJX

Vendor:FAIPackage Cooled:2000D/C:8000

With handheld equipment functioning as an iButton reader/writer one often faces the problem of finding a place for the probe when it is not used. The 74LCX112SJX Touch and Hold Probe Cable Cradle solves this problem. In addition to that, it converts the handheld equipment into a compact single-unit reader/writer for iButtons if the probe is firmly inserted into the cradle.

74LCX11M

• International standard package JEDEC TO-247 AD • High frequency IGBT with guaranteed Short Circuit SOA capability • IGBT and anti-parallel FRED in one package • 2nd generation HDMOSTM process • Low VCE(sat) - for low on-state conduction losses • MOS Gate turn-on - drive simplicity