74VHCT541AMTC

Vendor:FAIRCHILDPackage Cooled:TSSOPD/C:99+

5V tolerant inputs and outputs 10 mA ICCQ max Power-down high impedance inputs and outputs Supports live insertion withdrawal 2 0VC3 6V VCC supply operation g24 mA output drive Implements patented Quiet SeriesTM noise EMI reduction circuitry Functionally compatible with the 74 series 273 Latch-up performance exceeds 500 mA ESD performance Human Body Model l 2000V Machine Model l 200V

74VHCT541AMTC

Vendor:FAIRCHILDPackage Cooled:TSSOPD/C:99+

5V tolerant inputs and outputs 10 mA ICCQ max Power-down high impedance inputs and outputs Supports live insertion withdrawal 2 0VC3 6V VCC supply operation g24 mA output drive Implements patented Quiet SeriesTM noise EMI reduction circuitry Functionally compatible with the 74 series 273 Latch-up performance exceeds 500 mA ESD performance Human Body Model l 2000V Machine Model l 200V

74VHCT541AN

NOTES: 1. Dimensions are in inches. 2. Metric equivalents are given for general information only. 3. Symbol TL is measured from HD maximum. 4. Details of outline in this zone are optional. 5. Symbol CD shall not vary more than 0.010 inch (0.25 mm) in zone P. This zone is controlled for automatic handling. 6. Leads at gauge plane 0.054 inch (1.37 mm) +0.001 inch (0.03 mm) -0.000 inch (0.00 mm) below ...

74VHCT541ASJ

Receive analog outputs and the output for receive gain adjustment. VFRO is the receive filter output. AOUT+ and AOUTC are differential analog signal outputs which can directly drive ZL (= 350 W + 120 nF) or a 1.2 kW load. Refer to Fig.1 for gain adjustment. However, these outputs are in high impedance state during power-down.

74VHCT541FW

The MPX10 series device is a silicon piezoresistive pressure sensor providing a very accurate and linear voltage output directly proportional to the applied pressure. This standard, low cost, uncompensated sensor permits manufacturers to design and add their own external temperature compensating and signal conditioning networks. Compensation techniques are simplified because of the predictability of Moto...

74VHCT573A

Vendor:MOTD/C:2000

The TLH.64.. series was developed for standard applications like general indicating and lighting pur- poses. It is housed in a 5 mm tinted diffused plastic package. The wide viewing angle of these devices provides a high on-off contrast. Several selection types with different luminous inten- sities are offered. All LEDs are categorized in lumi- nous intensity groups. The green and yellow LEDs are c...

74VHCT573ADWR2

During the SELF REFRESH operation, the row address to be refreshed, the bank, and the refresh interval are generated automatically internally. SELF REFRESH can be used to retain data in the SDRAM without external clocking, even if the rest of the system is powered down. The SELF REFRESH operation is started by dropping the CKE pin from HIGH to LOW. During the SELF REFRESH operation all other inputs t...

74VHCT573AM

These octal D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

74VHCT573AMTCX

Vendor:FSCPackage Cooled:TSSOP

SRAM-Based In-System Configuration - Fast SelectMAP™ configuration - Triple Data Encryption Standard (DES) security option (Bitstream Encryption) - IEEE1532 support - Partial reconfiguration - Unlimited re-programmability - Readback capability

74VHCT573AMX

Vendor:FSCPackage Cooled:SOP7.2mm-20LD/C:2002

Parameter VDD to GND VA, VB, VW to GND IMAX1 Digital Inputs and Output Voltage to GND Operating Temperature Range Maximum Junction Temperature (TJMAX) Storage Temperature Lead Temperature (Soldering, 10 sec) Thermal Resistance2 JA: MSOP-10

74VHCT573ASJ

74VHCT573M

n Clock recovery from PLL lock to random data patterns. n Guaranteed transition every data transfer cycle n Chipset (Tx + Rx) power consumption < 500 mW (typ) @ 66 MHz n Single differential pair eliminates multi-channel skew n Flow-through pinout for easy PCB layout n 660 Mbps serial Bus LVDS data rate (at 66 MHz clock) n 10-bit parallel interface for 1 byte data plus 2 control bits n Synchroniza...

74VHCT573MTC

Note 4: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Applications Information. Note 5: Rise and fall times are measured using 10% and 90% levels. Delay times are measured using 50% levels. Note 6: The minimum on-time condition is specified for an inductor peak-to-peak ripple current 40% of IMAX (see minimum on-time considerations in the Applicatio...

74VHCT573MTCX

When connecting the asic to the AC line the asic first passes through a startup sequence. The duration of this sequence is 1.25 or 3.75 seconds depending on the duration of phase 1. After the start up test the normal function of the chip begins. This sequence

74VHCT574A

Vendor:FAIRCHILDPackage Cooled:SMDD/C:03+

Digital decimation and filtering circuitry is embedded on chip to generate serial output I&Q data streams. The decimating filters remove unwanted signals and noise outside the channel of interest. In addition, programmable RAM Coefficient filters allow anti-aliasing, matched filtering, and static equalization functions to be combined in a single, cost- effective filter.

74VHCT574AM

Vendor:FAIRCHILDD/C:06+

LAID: (Load Accumulator-Indirect); Single byte look up table instruction provides efficient data path from the program memory to the CPU. This instruction can be used for table lookup and to read the entire program memory for checksum calculations. RETSK: (Return Skip); Single byte instruction allows return from subroutine and skips next instruction. Decision to branch can be made in the subroutine it...

74VHCT574AMTC

Output -2 (User Defined) - This function is associated with individual channels, A through B. The state at these pin(s) are defined by the user and through the software setting of MCR register bit-3. INT A-B are set to the active mode and OP2 to a logic 0 when MCR-3 is set to a logic 1. INT A-B are set to the three state mode and OP2 to a logic 1 when MCR- 3 is set to a logic 0. See bit-3, Modem Contro...

74VHCT574AMTCX

Vendor:FSCPackage Cooled:SSOP-20LD/C:2002

Note 1: All voltages are with respect to GND. All currents are positive into the specified terminal. Consult Unitrode Integrated Circuits databook for information regarding thermal specifica- tions and limitations of packages. Note 2: In normal operation VCC is powered through a current limiting resistor. Absolute maximum of 12V applies when VCC is driven from a low impedance source such that ICC does ...

74VHCT574AMTCX /VT574

Vendor:FAIPackage Cooled:TSSOPD/C:02+

74VHCT574AMTCX_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74VHCT574AMX

To retain data, 1,024 refresh cycles are required in each 16 ms period. There are two ways to refresh the memory. 1. By clocking each of the 1,024 row addresses (A0 through A9) with RAS at least once every 128 ms. Any read, write, read- modify-write or RAS-only cycle refreshes the addressed row. 2. Using a CAS-before-RAS refresh cycle. CAS-before- RAS refresh is activated by the falling edge of RAS,

74VHCT574AMX

To retain data, 1,024 refresh cycles are required in each 16 ms period. There are two ways to refresh the memory. 1. By clocking each of the 1,024 row addresses (A0 through A9) with RAS at least once every 128 ms. Any read, write, read- modify-write or RAS-only cycle refreshes the addressed row. 2. Using a CAS-before-RAS refresh cycle. CAS-before- RAS refresh is activated by the falling edge of RAS,

74VHCT574ASJ

The ISP2200A firmware implements a multitasking host adapter that provides the host system with IP communications and complete SCSI command and data transport capabilities, thus freeing the host system from the simultaneous execution of SCSI and IP traffic. The firmware provides two interfaces to the host system: the command interface and the Fibre Channel transport interface. The single-threaded co...

74VHCT574ASJX

Parameter Forward Voltage Terminal Capacitance Collector Dark Current Collector-Emitter Breakdown Voltage Emitter-Collector Breakdown Voltage Collector Current Current Transfer Ratio[2] Collector-Emitter Saturation Voltage Isolation Resistance

74VHCT574ASJX

Parameter Forward Voltage Terminal Capacitance Collector Dark Current Collector-Emitter Breakdown Voltage Emitter-Collector Breakdown Voltage Collector Current Current Transfer Ratio[2] Collector-Emitter Saturation Voltage Isolation Resistance

74VHCT574MTCX

Vendor:FSCD/C:06+

Electrostatic discharge can cause damage ranging from per- formance degradation to complete device failure. Burr- Brown Corporation recommends that all integrated circuits be handled and stored using appropriate ESD protection methods.

74VHCT574SJX

Double metal process for low gate resistance International standard packages Epoxy meet UL 94 V-0, flammability classification Avalanche energy and current rated Fast intrinsic Rectifier miniBLOC package version with Aluminum Nitrate isolation

74VHCT74A

Vendor:FAIRCHILDPackage Cooled:SOP-14D/C:03+

The A74VHCT74AxLW takes a different approach to the noise suppression problem by sensing the noise pulse in the receivers RF section and blanking the pulse before it reaches the IF. This requires a noise amplifier with a minimum propagation delay and high-speed gating.

74VHCT74A

Vendor:FAIRCHILDPackage Cooled:SOP-14D/C:03+

The A74VHCT74AxLW takes a different approach to the noise suppression problem by sensing the noise pulse in the receivers RF section and blanking the pulse before it reaches the IF. This requires a noise amplifier with a minimum propagation delay and high-speed gating.

74VHCT74AM

Vendor:FAIPackage Cooled:N/AD/C:452

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.05 /Dec. 2000Hynix Semiconductor

74VHCT74AM

Vendor:FAIPackage Cooled:N/AD/C:452

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.05 /Dec. 2000Hynix Semiconductor

74VHCT74AMT2X

Vendor:FAIRCHILD ?Package Cooled:2003?D/C:62500

The Hynix HYM71V32C735AT4 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 256Mbytes memory. The Hynix HYM71V32C735AT4 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

74VHCT74AMTCX

Vendor:FAIRCHILDPackage Cooled:SOP8D/C:0312+

• THE EASE OF USE AND FAST SYSTEM SPEED OF PLDs WITH THE DENSITY AND FLEXIBILITY OF FPGAS Enhanced Pin Locking Capability Three Dedicated Clock Input Pins Synchronous and Asynchronous Clocks Programmable Output Slew Rate Control Flexible Pin Placement Optimized Global Routing Pool Provides Global Interconnectivity

74VHCT74AMTCX_NF40

Vendor:ＦＡＩＲＣＨＩＬＤ

74VHCT74MTC

(AVDD3.3 = DVDD3.3 = AVCLK = +3.3V, AVDD1.8 = DVDD1.8 = +1.8V, GND = 0, fCLK = 2 x fDAC, external reference VREFIO = +1.25V, out- put load 50Ω double-terminated, transformer-coupled output, IOUTFS = 20mA, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 2)

74VHCT74N

Vendor:NSPackage Cooled:DIPD/C:96+

PARAMETER Supply Voltage VCC Supply Current VCC Undervoltage Lockout Release VCC Undervoltage Lockout Hysteresis ON Pin Input Current SENSE Pin Input Current Circuit Breaker Trip Voltage GATE Pin Pull-Up Current GATE Pin Pull-Down Current

74VHCT86

74VHCT86A

Vendor:ONPackage Cooled:TSSOP-14

• Device with high radiant intensity suitable for surface mounting (SMT) • High data transmission rate up to 100 Mbaud (IR keyboard, Joystick, Multimedia) • Analog and digital Hi-Fi audio and video signal transmission • Low power consumption (battery) equipment • Suitable for professional and high-reliability applications • Alarm and safety equipment • I...

74VHCTQ04A

74VHCU04M

Vendor:NSPackage Cooled:SOIC-14/3.9mmD/C:98+

Soft−Start Timing control pin. An external soft−start capacitor can be connected to this pin if extended soft−start is required. A 50 nA current will be sourced from this pin to charge up the capacitor during startup and gently ramps the device into service to prevent output voltage overshoot. If this pin is floated, built−in 500 ms (typ.) soft−start will be activated.

74VHCU04M

Vendor:NSPackage Cooled:SOIC-14/3.9mmD/C:98+

Soft−Start Timing control pin. An external soft−start capacitor can be connected to this pin if extended soft−start is required. A 50 nA current will be sourced from this pin to charge up the capacitor during startup and gently ramps the device into service to prevent output voltage overshoot. If this pin is floated, built−in 500 ms (typ.) soft−start will be activated.

74VHCU04MTCX /VU04

Vendor:FAIPackage Cooled:TSSOPD/C:05+

74VHCU04MTR

Vendor:STPackage Cooled:04+D/C:7500

If the overcurrent condition is severe enough that the part heats up to the thermal limit TMAX, then the switch will be turned off and the temperature cools down. At TMIN the switch then turns on again, and the device heats up again, and so on, until the fault is removed.

74VHCU04MTR

Vendor:STPackage Cooled:04+D/C:7500

If the overcurrent condition is severe enough that the part heats up to the thermal limit TMAX, then the switch will be turned off and the temperature cools down. At TMIN the switch then turns on again, and the device heats up again, and so on, until the fault is removed.

74VHCU04N

Vendor:FAIPackage Cooled:9936D/C:7500

*Settable gain dynamics (25 or 50dB) *Low power consumption, totally 1.0mA at 3.3V typical. *Background noise compensation in the transmitting channel *with hold function. *Excellent noise performance. *Both channel input amplifiers have balanced inputs. *Minimum of external components needed for function.

74VHCU04SJ

Vendor:Fairchild

As shown in Figure 4, the falling edge of the 8 kHz input signal (C8Kb for DPLL #2 or F0i for DPLL # 1) is used to sample the internally generated 8 kHz clock and the correction signal (CS) once in every frame (125 µs). If the sampled CS is 1, then the DPLL makes a speed-up or slow-down correction depending upon the sampled value of the internal 8 kHz signal. A sampled 0 or 1 causes the frequency correc...

74VHCU04T

Vendor:STPackage Cooled:TSSOP-14

74VHT04MX

Vendor:FAIPackage Cooled:SOPD/C:98/P3

74VHV00

Vendor:NATIONALPackage Cooled:SMD14D/C:96+

The VHC132 is an advanced high speed CMOS 2-input NAND Schmitt Trigger Gate fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Pin configuration and func- tion are the same as the VHC00 but the inputs have hyster- esis between the positive-going and negative-going input thresholds, which ...

74VIG125

74VILA40S01

Vendor:MOTPackage Cooled:SMD-20D/C:99+

(1) Losses from power consumed by the internal oscillator, switch drive, etc. (which vary with input voltage, temperature and oscillator frequency). (2) I2R losses due to the onCresistance of the MOSFET switches onCboard the charge pump. (3) Charge pump capacitor losses due to effective series resistance (ESR).

74VLVC374A

Vendor:PHILIPSPackage Cooled:SSOP-20D/C:02

The AC/ACT574 is a high-speed, low power octal flip-flop with a buffered common Clock (CP) and a buffered com- mon Output Enable (OE). The information presented to the D-type inputs is stored in the flip-flops on the LOW-to-HIGH Clock (CP) transition.

74VS42

The CA3080 and CA3080A are similar in generic form to conventional operational amplifiers, but differ sufficiently to justify an explanation of their unique characteristics. This new class of operational amplifier not only includes the usual differential input terminals, but also contains an additional control terminal which enhances the device's flexibility for use in a broad spectrum of applications....

74VT00A

Vendor:FAIRCHILDPackage Cooled:SOP-14D/C:03+

2. When using this product, please observe the absolute maximum ratings and the instructtonsfor use outlined in these specitkation sheets, as well as the precautions mentioned below. Sharp assumes no responsibthty for any damage resulting from use of the product which does not comply with the absolute mardmum ratings and the instructions included in these speciflcatton sheets, and the precautions mentione...

74VT08A

Vendor:FAIRCHILDPackage Cooled:TSSOPD/C:02+

Celeritek reserves the right to make changes without further notice to any products herein. Celeritek makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Celeritek assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conseque...

74VT1403DR

Vendor:7200Package Cooled:99/00+D/C:TSOP32

VSS for PLL Analog Register Pin for VCO Gain VDD for PLL Analog (3.3V) VDD for PLL VCO (3.3V) Charge Pump Output Control Voltage for VCO Gain Adjust Register for Phase Detector VSS for PLL VCO EQ Control Signal EFM Offset Adjustment Bulk Bias for PLL EFM Output Signal Asymmetric Input Signal for DVD Asymmetric Input Signal for CD RF Input Signal RF Envelope DC Drawing Output RF Envelope Detection Ou...

74VT1403DR

Vendor:7200Package Cooled:99/00+D/C:TSOP32

VSS for PLL Analog Register Pin for VCO Gain VDD for PLL Analog (3.3V) VDD for PLL VCO (3.3V) Charge Pump Output Control Voltage for VCO Gain Adjust Register for Phase Detector VSS for PLL VCO EQ Control Signal EFM Offset Adjustment Bulk Bias for PLL EFM Output Signal Asymmetric Input Signal for DVD Asymmetric Input Signal for CD RF Input Signal RF Envelope DC Drawing Output RF Envelope Detection Ou...

74VT14A

Vendor:FAIRCHILDPackage Cooled:SMDD/C:03+

Frame sequence, constant throughput delay, and guaranteed minimum delay are high priority requirements in todays integrated data and multimedia networks. The IDT72V8985 provides these functions on a per-channel basis using a standard microprocessor control interface. Each of the eight serial lines is designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data. In Processor Mode, the microprocessor can access t...

74VT14A

Vendor:FAIRCHILDPackage Cooled:SMDD/C:03+

Frame sequence, constant throughput delay, and guaranteed minimum delay are high priority requirements in todays integrated data and multimedia networks. The IDT72V8985 provides these functions on a per-channel basis using a standard microprocessor control interface. Each of the eight serial lines is designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data. In Processor Mode, the microprocessor can access t...

74VT244B

Vendor:PHILIPSD/C:99+

If ((7/8 bit = 0) And (DIV bit = 0)) PWM base period CLOCK period x 128 else If ((7/8 bit = 0) And (DIV bit = 1)) PWM base period = CLOCK period x 256 else If ((7/8 bit = 1) And (DIV bit = 0)) PWM base period = CLOCK period x 256 else If ((7/8 bit = 1) And (DIV bit = 1)) PWM base period = CLOCK period x 512

74VT244B

Vendor:PHILIPSD/C:99+

If ((7/8 bit = 0) And (DIV bit = 0)) PWM base period CLOCK period x 128 else If ((7/8 bit = 0) And (DIV bit = 1)) PWM base period = CLOCK period x 256 else If ((7/8 bit = 1) And (DIV bit = 0)) PWM base period = CLOCK period x 256 else If ((7/8 bit = 1) And (DIV bit = 1)) PWM base period = CLOCK period x 512

74VT245A

Vendor:FAIRCHILDPackage Cooled:N/AD/C:0430+

This network is less than 2% of the overall network resistance so it has a negligible effect on long term stability. Figure 3 shows the proper connection of the VRE3041 series voltage references with the optional trim resistor for initial error and the optional capacitor for noise reduction.

74VT245A

Vendor:FAIRCHILDPackage Cooled:N/AD/C:0430+

This network is less than 2% of the overall network resistance so it has a negligible effect on long term stability. Figure 3 shows the proper connection of the VRE3041 series voltage references with the optional trim resistor for initial error and the optional capacitor for noise reduction.

74VT373

Vendor:FAIRCHILDPackage Cooled:SMDD/C:03+

XDR DRAM device architecture allows the highest sustained bandwidth for multiple, interleaved randomly addressed mem- ory transactions. The highly-efficient protocol yields over 95% utilization while allowing fine access granularity. The devices eight banks support up to four interleaved transactions.

74VT374A

Vendor:FAIRCHILDPackage Cooled:SMDD/C:03+

74VU04

Distributed VCC and GND-Pin Configuration Minimizes High-Speed Switching Noise ESD Protection Exceeds JESD 22 C 2000-V Human-Body Model (A114-A) C 200-V Machine Model (A115-A) C 1000-V Charged-Device Model (C101) Latch-Up Performance Exceeds 250 mA Per JESD 17 Package Options Include Plastic Thin Shrink Small-Outline (DGG) and Ceramic Quad Flat (HV) Packages

74VX00

74VX245MSCX

74VXC245MTC

Vendor:FairchildPackage Cooled:TSSOP-20D/C:03+

74VXC3245

74VXC38

Vendor:FAIRCHILDPackage Cooled:SMDD/C:03+

74W201

74XR162245

Package Cooled:2005D/C:TSSOP

The MCP1700 is a family of CMOS low dropout (LDO) voltage regulators that can deliver up to 250 mA of current while consuming only 1.6 µA of quiescent current (typical). The input operating range is specified from 2.3V to 6.0V, making it an ideal choice for two and three primary cell battery-powered applications, as well as single cell Li-Ion-powered applications.

74XXF174ADR

5V TOLERANT INPUTS HIGH SPEED: tPD = 4.2ns (MAX.) at VCC = 3V LOW POWER DISSIPATION: ICC = 1µA (MAX.) at TA = 25C POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 5.5V (1.2V Data Retention) IMPROVED LATCH-UP IMMUNITY

74Y2932

75.000MHZ

Vendor:N/APackage Cooled:2001D/C:50

A LOW on this pin initializes the FIFO Read and Write pointers to the first location of memory and sets the Port B output register to all zeroes. A LOW pulse on MRS1 selects the programming method (serial or parallel) and one of three programmable flag default offsets. It also configures Port B for bus size and endian arrangement. Four LOW-to-HIGH transitions of CLKA and four LOW-to-HIGH transitions of CLK...

750.76.058

Package Cooled:08+D/C:800

Calibration can minimize these errors. The gain calibration cannot have a REF IN+ of more than AVDD −1.5V with Buffer ON. To calibrate gain, turn Buffer OFF. (3) ∆VOUT is change in digital result. (4) 9pF switched capacitor at fSAMP clock frequency (see Figure 13). (5) The input impedance for PGA = 128 is the same as that for PGA = 64 (that is, 7MΩ/64).

7500-

Vendor:FSCD/C:DIP16/SOP16

750-000646

75001SE

Vendor:HARPackage Cooled:05+D/C:2035

Eight GLBs, 32 I/O cells, two dedicated inputs and two ORPs are connected together to make a Megablock (see Figure 1). The outputs of the eight GLBs are connected to a set of 32 universal I/O cells by the two ORPs. Each ispLSI 2096V device contains three Megablocks.

75-0025

Vendor:N/APackage Cooled:N/AD/C:08+09+

a. AC characteristics apply for parallel output termination of 50Ω to VTT. b. The input frequency fXTAL and the PLL feedback divider M must match the VCO frequency range: fVCO = fXTAL ⋅ M 4. c. The frequency of S_CLOCK is limited to 10 MHz in serial programming mode. S_CLOCK can be switched at higher frequencies when used as test clock in test mode 6. See application section for more details.

75002-S02

Vendor:.Package Cooled:2005D/C:500

Note: 1. The number and size of ground via holes in a circuit board is critical for thermal and RF grounding considerations. 2. We recommend that the ground via holes be placed on the bottom of lead pin 2 for better RF and thermal performance, as shown in the drawing at the left side.

75-003

75-0031

Vendor:N/APackage Cooled:N/AD/C:08+09+

Hynix HYMD264G726A(L)8M-M/K/H/L series is Low Profile registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx72 high-speed memory arrays. Hynix HYMD264G726A(L)8M-M/K/H/L series consists of eighteen 32Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD264G726A(L)8M-M/K/H/L series provide a high performance 8-byte i...

75-0031

Vendor:N/APackage Cooled:N/AD/C:08+09+

Hynix HYMD264G726A(L)8M-M/K/H/L series is Low Profile registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx72 high-speed memory arrays. Hynix HYMD264G726A(L)8M-M/K/H/L series consists of eighteen 32Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD264G726A(L)8M-M/K/H/L series provide a high performance 8-byte i...

75-0032

Vendor:IRPackage Cooled:00+D/C:2035

(3) Static Electricity Static electricity or surge voltage damages the LEDs. It is recommended that a wrist band or an anti-electrostatic glove be used when handling the LEDs. All devices, equipment and machinery must be properly grounded. It is recommended that measures be taken against surge voltage to the equipment that mounts the LEDs. When inspecting the final products in which LEDs were assembl...

75-0032N

Vendor:IORPackage Cooled:SOP-4D/C:01+

• Double data rate architecture: two data transfers per clock cycle • Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver • DQS is edge-aligned with data for reads and is center-aligned with data for writes • Differential clock inputs (CK and CK) • Four internal banks for concurrent operation • Data...

750036CFS005

Vendor:PHILIPSPackage Cooled:30D/C:N/A

CKI Operating Frequency CKI Period CKI High Time CKI Low Time Bus Timing Cycle Wait State Period CK2 Rising Edge after CKI Falling Edge (Note 2) CK2 Falling Edge after CKI Falling Edge (Note 2) External UART Clock Input Frequency External MICROWIRE PLUS Clock Input Frequency

750036CFSC003

Vendor:PHILIPSPackage Cooled:QFP1420-80D/C:99+

750036CFSC004

Vendor:PHILIPSPackage Cooled:QFP1420-80D/C:00+

Direct-Memory-Access (DMA) Controller With an Auxiliary Channel Flexible Phase-Locked-Loop (PLL) Clock Generator 32-Bit Expansion Bus (XBus) − Glueless/Low-Glue Interface to Popular PCI Bridge Chips − Glueless/Low-Glue Interface to Popular Synchronous or Asynchronous Microprocessor Buses − Master/Slave Functionality − Glueless Interface to Synchronous FIFOs and Asynchronous P...

75-0037

Vendor:N/APackage Cooled:N/AD/C:08+09+

Resolution bit - writing a zero to this bit chooses 7-bit counter resolution, while writing a one chooses 8-bit PWM counter resolution. Choosing 7-bit resolution doubles the achieveable PWM base frequency at the expense of decreased duty cycle resolution. The combination of the Divide bit and the Resolution bit provides the user with three different PWM base periods for a given external CLOCK frequency. A

75-0037

Vendor:N/APackage Cooled:N/AD/C:08+09+

Resolution bit - writing a zero to this bit chooses 7-bit counter resolution, while writing a one chooses 8-bit PWM counter resolution. Choosing 7-bit resolution doubles the achieveable PWM base frequency at the expense of decreased duty cycle resolution. The combination of the Divide bit and the Resolution bit provides the user with three different PWM base periods for a given external CLOCK frequency. A

7500-3741-13

75-0037N

Vendor:N/APackage Cooled:N/AD/C:08+09+

FEATURES lOptions :- 10mm lead spread - add G after part no. Surface mount - add SM after part no. Tape&reel - add SMT&R after part no. lHigh Current Transfer Ratio ( 80 - 400% ) lHigh Isolation Voltage (5.3kVRMS ,7.5kVPK ) lHigh BVCEO ( 80Vmin ) lAll electrical parameters 100% tested lExternal Creepage 7mm

75-0038

Vendor:IRPackage Cooled:00+D/C:2035

The 40EPF.. fast soft recovery QUIETIR rectifier series has been optimized for combined short reverse recovery time and low forward voltage drop. The glass passivation ensures stable reliable operation in the most severe temperature and power cycling conditions.

75004G769

Vendor:NECPackage Cooled:452D/C:05+

Output Current in Excess of 500 mA Output Adjustable between 1.2 V and 37 V Internal Thermal Overload Protection Internal Short Circuit Current Limiting Output Transistor Safe−Area Compensation Floating Operation for High Voltage Applications Eliminates Stocking Many Fixed Voltages Pb−Free Packages are Available

75004GK16

Vendor:NECPackage Cooled:QFPD/C:98+

Note: The remote sense feature is not designed to compensate for the forward drop of non-linear or frequency dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense connections they are effectively placed inside the regulation control loop, which can ad...

750066

Vendor:NECPackage Cooled:SSOP42D/C:2007+

In a running motor, a current will flow through the resistor RSENSE resulting in a voltage drop. The commutation will cause a narrow window where there is no current flow. Motor detection is done by the presence of commutation pulses. If there is constant voltage level on the VSENSE pin when the motor is driven by a PWM signal, the motor is jammed. When there is no voltage at all, the motor might not b...

750068-384

Vendor:NECPackage Cooled:22000D/C:05+

750071-1

Vendor:Tyco / AMPPackage Cooled:N/AD/C:4

Silicon chip on Direct-Copper-Bond substrate - High power dissipation - Isolated mounting surface - 2500V electrical isolation Low cathode to tab capacitance (<15pF) Planar passivated chips Very short recovery time Extremely low switching losses Low IRM-values Soft recovery behaviour Epoxy meets UL 94V-0