72V235L10TF

72V235L20PF

72V241L15PF

D/C:00+

72V245

Vendor:IDTPackage Cooled:TQFP80D/C:2007+

72V245L15PF

72V255

Vendor:IDTPackage Cooled:SQFP64D/C:07+

Interface and Control 16 Bit Serial Peripheral Interface (2bit/CH) Device programming via SPI Separate diagnosis output for each CH ( DIAG1 C 6) General Fault Flag + Overtemperature Flag Direct parallel control of all channels General enable signal to control all channels simultaneously

72V275L15PF

*The power dissipation PD is based on TJ(max) = 175_C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit.

72V275L15PF

*The power dissipation PD is based on TJ(max) = 175_C, using junction-to-case thermal resistance, and is more useful in settling the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit.

72V275L20TF

The window comparator section detects data from the resis- tor input network. A Logic 1 corresponds to ARINC High state (OUTA) and a Logic 0, to ARINC Low state (OutB). An ARINC Null state at the inputs forces both outputs to Logic 0. Threshold and hysteresis voltages are generated by a bandgap voltage reference to maintain stable switching characteristics over temperature and power supply variations.

72V291

Vendor:IDTPackage Cooled:N/AD/C:08+

72V3611L15PF

Vendor:IDTPackage Cooled:LQFP

The input to output map is configured through the processor interface. The I/O map is stored in a bank of 24 configuration registers. Each register corresponds to one output bit. The output bit is mapped to the input via a value, 0 to 23, stored in the register. After power-up, the user has the option of config- uring the switch in 1:1 mode by using the reset input, RST. In 1:1 mode the crosspoint swit...

72V3612

Vendor:IDTPackage Cooled:SQFP120D/C:2007+

72V3660

Vendor:IDTPackage Cooled:SQFP128D/C:2007+

General Telecom Switching - Telephone Line Interface - On/off Hook - Ring Relay - Break Switch - Ground Start Battery-powered Switch Applications Industrial Controls -Microprocessor Control of Solenoids, Lights, Motors, Heaters, etc. Programmable Controllers Instrumentation See "Solid State Relays" ( Application Note 56)

72V3680

Vendor:IDTPackage Cooled:SQFP128D/C:07+

Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features com- bine to make this design an extremely efficient and reliable...

72V3690

Vendor:IDTPackage Cooled:SQFP128D/C:07+

5. Dropout is defined as either the minimum control voltage (VCONTROL) or minimum power voltage (VPOWER) to output voltage differential required to maintain 1.5% regulation at a particular load current. 6. This parameter is guaranteed by design, but not parametrically tested in production. However, a 100% thermal shutdown functional test is performed on each part.

72V51236

Package Cooled:BGAD/C:01+

72V70840DA

Vendor:availPackage Cooled:IDTD/C:06+

The SecSi™ (Secured Silicon) Sector is an extra 256 byte sector capable of being permanently locked by AMD or customers. The SecSi Customer (DQ6) is permanently set to 1 if the part has been customer locked, and is 0 if customer lockable. This way, cus- tomer lockable parts can never be used to replace a factory locked part.

72V71650

Vendor:IDTPackage Cooled:N/AD/C:08+

72V71650

Vendor:IDTPackage Cooled:N/AD/C:08+

72V82L15PA

Vendor:IDTPackage Cooled:TSSOP56MD/C:2007+

72V82L20PA

Vendor:IDTPackage Cooled:TSOP56D/C:07+

Sirenza Microdevices 72V82L20PA is a high performance Silicon Germanium Heterostructure Bipolar Transistor (SiGe HBT) designed for operation from DC to 6 GHz. The 72V82L20PA is optimized for 3V operation but can be biased at 2V for low voltage battery operated systems. The device provides high gain, low NF, and excellent linearity at a low cost. It can be operated at very low bias currents in applications w...

72V83

Vendor:IDTPackage Cooled:TSOP56D/C:2007+

72V84

Vendor:IDTPackage Cooled:TSOP56D/C:2007+

72V845

Vendor:IDTPackage Cooled:N/AD/C:08+

If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. If Military/ Aerospace specified devices are required, please contact the National semiconductor Sales/Office/Distributors for availability and specifications.

72V851

Vendor:IDTPackage Cooled:N/AD/C:08+

72V851L10TF

Vendor:IDTPackage Cooled:LQFP64

NOTES: 1. All VDD pins must be connected to 3.3V power supply. 2. All VDDQ pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to VIH (3.3V), and 2.5V if OPT pin for that port is set to VIL (0V) 3. All VSS pins must be connected to ground. 4. Package body is approximately 15mm x 15mm x 1.4mm with 0.8mm ball pitch. 5. This package code is used to reference the package dia...

72V90823PQF

Vendor:IDTPackage Cooled:QFPD/C:47

This access is initiated when both of the following conditions are satisfied at clock rise: (1) ADSP is asserted LOW, and (2) chip select is asserted active. The address presented is loaded into the address register and the address advancement logic while being delivered to the memory core. The write signals (GW, BWE, and BW[A:D]) and ADV inputs are ignored during this first cycle.

72X6743

Vendor:AMDD/C:PLCC

72X6744

Vendor:AMDD/C:PLCC

72X6746

Vendor:PLCC-20Package Cooled:MMID/C:04+

Note 2 Do not design with this parameter unless CKI is driven with an active signal and SLOW mode is not selected When using a passive crystal circuit its stability is not guaranteed if either CKI or CKO is connected to any external logic other than the passive components of the crystal circuit

72X6746

Vendor:PLCC-20Package Cooled:MMID/C:04+

Note 2 Do not design with this parameter unless CKI is driven with an active signal and SLOW mode is not selected When using a passive crystal circuit its stability is not guaranteed if either CKI or CKO is connected to any external logic other than the passive components of the crystal circuit

72X7337ESD

Vendor:IBMPackage Cooled:模块

The CY7C261, CY7C263, and CY7C264 are plug-in replace- ments for bipolar devices and offer the advantages of lower power, superior performance and programming yield. The EPROM cell requires only 12.5V for the supervoltage and low current requirements allow for gang programming. The EPROM cells allow for each memory location to be tested 100%, as each location is written into, erased, and repeatedly exercised...

72X7337ESD

Vendor:IBMPackage Cooled:模块

The CY7C261, CY7C263, and CY7C264 are plug-in replace- ments for bipolar devices and offer the advantages of lower power, superior performance and programming yield. The EPROM cell requires only 12.5V for the supervoltage and low current requirements allow for gang programming. The EPROM cells allow for each memory location to be tested 100%, as each location is written into, erased, and repeatedly exercised...

72X7408

Vendor:IBMPackage Cooled:00+D/C:PLCC

RSTA/RSTB (Pins 6, 15): Card Socket. The RSTA/RSTB pins should be connected to the RST pins of the respective card sockets. The RSTA/RSTB signals are derived from the RSTIN pin. When a card is selected, its RST pin follows RSTIN. The RSTA/RSTB pins are gated off until VCCA/VCCB attain their correct values.

72X7482

Vendor:PLCC-20Package Cooled:MMID/C:04+

An internal Dummy Ringer is permanently connected across Tip and Ring which is a series AC load of (17kΩ+330nF). This represents a mechanical telephone ringer and allows ringing voltages to be sensed. This load can be considered negligible when the line has been terminated.

72X7483

Vendor:PLCC-20Package Cooled:MMID/C:04+

Note: (1) The minimum DC input voltage is C0.5V. During transitions, inputs may undershoot to C2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC + 2.0V for periods of less than 20ns. (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) This parameter is tested initially and after a design or process cha...

72X7484

Vendor:PLCC-20Package Cooled:MMID/C:04+

Note: All devices contains Access.bus (ACB), Clock and Re- set, MICROWIRE/API, Multi-Input Wake-Up (MIWU), Power Management (PMM), and the Real-Time Timer and Watch- dog (TWM) modules. Access.bus is compatible with I2C bus offered by Philips Semiconductor.

72X7485

Vendor:PLCC-28Package Cooled:MMID/C:04+

n Floating channel designed for bootstrap operation Fully operational to +600V Tolerant to negative transient voltage dV/dt immune n Gate drive supply range from 10 to 20V n Undervoltage lockout n 5V Schmitt-triggered input logic n Matched propagation delay for both channels n Outputs in phase with inputs

72X7486

Vendor:PLCC-28Package Cooled:MMID/C:04+

FIFO status flags monitor the extent to which each FIFO buffer has been filled. Full, Almost-Full, Half-Full, Almost-Empty, and Empty flags are included for each FIFO. The Almost-Full and Almost-Empty flags are pro- grammable over the entire FIFO depth, but are automat- ically initialized to eight locations from the respective FIFO boundaries at reset. A data block of 256 or fewer words may be retran...

72X7487

Vendor:PLCC-20Package Cooled:MMID/C:04+

The bq24007 and bq24008 provide the timer-enable function, allowing the host to disable the charge timer when charge current is shared with a load or when the battery is absent. This feature is ideal for applications such as cellular phones, PDAs, and internet appliances.

72X7487

Vendor:PLCC-20Package Cooled:MMID/C:04+

The bq24007 and bq24008 provide the timer-enable function, allowing the host to disable the charge timer when charge current is shared with a load or when the battery is absent. This feature is ideal for applications such as cellular phones, PDAs, and internet appliances.

72X7488

Vendor:PLCC-28Package Cooled:MMID/C:04+

The L1 memory system is the primary highest performance memory available to the Blackfin processor core. The L2 memory provides additional capacity with slightly lower performance. Lastly, the off-chip memory system, accessed through the External Bus Interface Unit (EBIU), provides expansion with SDRAM, flash memory, and SRAM, optionally accessing more than 768M bytes of external physical memory.

72X7489

Vendor:PLCC-28Package Cooled:MMID/C:04+

Note 6: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, Tj. Due to the limited production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient temperature as a result of internal power dissipation, PD. Tj=TA+jA PD where ...

72X7490

Vendor:PLCC-28Package Cooled:MMID/C:04+

2.2 Order of precedence. In the event of a conflict between the text of this specification and the references cited herein (except for associated detail specifications, specification sheets or MS standards), the text of this specification takes precedence. Nothing in this specification, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.

72X7490

Vendor:PLCC-28Package Cooled:MMID/C:04+

2.2 Order of precedence. In the event of a conflict between the text of this specification and the references cited herein (except for associated detail specifications, specification sheets or MS standards), the text of this specification takes precedence. Nothing in this specification, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.

72X7491

Vendor:PLCC-28Package Cooled:MMID/C:04+

LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales.

72X8201

Package Cooled:SOP16MD/C:2007+

The MAX6501/MAX6503 have an active-low, open-drain output intended to interface with a microprocessor (µP) reset input. The MAX6502/MAX6504 have an active- high, push-pull output intended to directly drive fan- control logic. The MAX6501/MAX6502 are offered with hot-temperature thresholds (+35C to +115C), assert- ing when the temperature is above the threshold. The MAX6503/MAX6504 are offered with cold...

72X8203

Vendor:IBMPackage Cooled:PLCCD/C:03+

Digital logic input used to select charge pump current. This pin has an internal pull-up resistor. Refer Modulation Selection Table. Digital logic input used to select charge pump current. This pin has an internal pull-up resistor. Refer Modulation Selection Table.

72X8206

Vendor:OKI

Fujitsu Flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability, and cost effectiveness. The devices electrically erase all bits within a sector simulta- neously via hot-hole assisted erase. The words are programmed one word at a time using the EPROM program- ming mechanism of hot electron injection.

72X8206

Vendor:OKI

Fujitsu Flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability, and cost effectiveness. The devices electrically erase all bits within a sector simulta- neously via hot-hole assisted erase. The words are programmed one word at a time using the EPROM program- ming mechanism of hot electron injection.

72X8262

Vendor:PLCC-20Package Cooled:AMDD/C:04+

The sixteen Function Blocks in the XC73144 are PAL-like structures, complete with programmable product term arrays and programmable multilevel Macrocells. Each Function Block receives 24 inputs, contains nine Macro- cells configurable for registered or combinatorial logic and produces nine outputs which feedback to the UIM and output pins.

72X8262

Vendor:PLCC-20Package Cooled:AMDD/C:04+

The sixteen Function Blocks in the XC73144 are PAL-like structures, complete with programmable product term arrays and programmable multilevel Macrocells. Each Function Block receives 24 inputs, contains nine Macro- cells configurable for registered or combinatorial logic and produces nine outputs which feedback to the UIM and output pins.

72X8287ESD

Vendor:IBMPackage Cooled:模块D/C:01+

Note 12: Electrical Characteristic table reflects open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated). Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output vol...

72X8287ESD

Vendor:IBMPackage Cooled:模块D/C:01+

Note 12: Electrical Characteristic table reflects open loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated). Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Closed loop current limit is the peak inductor current measured in the application circuit by increasing output current until output vol...

72X8290

Vendor:PLCC-20Package Cooled:MMID/C:04+

SIGNAL DESCRIPTIONS See Figure 1, Logic Diagram, and Table 1, Signal Names, for a brief overview of the signals connect- ed to this device. Address Inputs (A0-A17). The Address Inputs select the cells in the memory array to access dur- ing Bus Read operations. During Bus Write opera- tions they control the commands sent to the Command Interface of the internal state machine. Data Inputs/Outputs (DQ0...

72X8299

Vendor:IBMPackage Cooled:PLCCD/C:29

This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.02 / May.02Hynix Semiconductor

72X8299

Vendor:IBMPackage Cooled:PLCCD/C:29

This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.02 / May.02Hynix Semiconductor

72X8299 (F4710FT)

72XLR100LF

72XLR10LF

72XR10KLF

72XR1MEGLF

72XR200LF

72XR2KLF

72XR500LF

72XR50KLF

72XWR1KLF

72XWR200KLF

72XWR250KLF

72XWR25KLF

72XWR500LF

72XWR50KLF

73.2OHM (TA-I RM13FTN73R2)

73005MQ

Vendor:QFP

is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and three-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A18).

7300AGDW

7300B20-300110

7301Q

Vendor:7500Package Cooled:德州D/C:06+

Edition 07.96 This edition was realized using the software system FrameMaker®. Published by Siemens AG, Bereich Halbleiter, Marketing- Kommunikation, Balanstraße 73, 81541 Mnchen © Siemens AG 1996. All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits im...

7302CR

Vendor:FAIPackage Cooled:SSOPD/C:07+

Directly placing semiconductor transient protection devices or MOV's on the sense leads is not advised; these devices have extremely large amounts of non-linear parasitic C, which will swamp the capacitance of the electrode and may deliver spurious sensing results.

7302CR

Vendor:FAIPackage Cooled:SSOPD/C:07+

Directly placing semiconductor transient protection devices or MOV's on the sense leads is not advised; these devices have extremely large amounts of non-linear parasitic C, which will swamp the capacitance of the electrode and may deliver spurious sensing results.

7303468231

730470-00

When read enable input RE is L, the contents of memory are output to data outputs Q0 to Q7 in synchronization with rise edge of read clock input RCK. At this time, the read address counter is also incremented simultaneously. The read functions given below are also performed in syn- chronization with rise edge of RCK. When RE is H, a read operation from memory is inhibited and the read address counter...

730470-00

When read enable input RE is L, the contents of memory are output to data outputs Q0 to Q7 in synchronization with rise edge of read clock input RCK. At this time, the read address counter is also incremented simultaneously. The read functions given below are also performed in syn- chronization with rise edge of RCK. When RE is H, a read operation from memory is inhibited and the read address counter...

730518003708V00

Vendor:N/APackage Cooled:DIP28D/C:07+

Inside 5B45 & 5B46 Modules C The 5B45/46 internal circuitry compares the input signal to the user-selected threshold (VT) and hysteresis (VH). Signals of virtually any wave shape that exceed the combined threshold and hystersis levels (VT +VH)will trigger a comparator at a rate determined by the input frequency. The comparator output is then transmitted across a proprietary transformer-coupled iso...

7305247431

730-6.3/103M18X20

7306333161

730871N11

Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V, VA = VD = +5V, VDR = +3.0V, PD = 0V, VREF = +2.0V, fCLK = 10 MHz, tr = tf = 3 ns, CL = 25 pF/pin. Boldface limits apply for TA = TJ = TMIN to TMAX: all other limits TA = TJ = 25˚C (Notes 7, 8, 9)

7308T1N15

73099-0221

Vendor:MolexPackage Cooled:connectorD/C:06+

73099-0221

Vendor:MolexPackage Cooled:connectorD/C:06+

73099-9221

Vendor:MolexPackage Cooled:connectorD/C:06+

73099HED

Package Cooled:ＳＯＰD/C:06+

Direction of Rotation: When the codewheel rotates in a counter- clockwise direction (when viewed from the encoder end of the motor) channel A will lead channel B. If the codewheel rotates in the clockwise direction channel B will lead channel A.

730B-GZG

730B-ZZG

Vendor:TID/C:8000

*Single chip P-channel ED MOS LSI *LED direct drive using time division (duplex configuration) *Wide operating power supply voltage range *Built-in alarm function with 24-hour control *Supports changeover between 12-hour AM/PM and 24-hour displays *Built-in battery backup CR oscillator *Users 50Hz or 60Hz as standard frequency *Built-in automatic fast forward function for hour and minute settings *Built-i...

730DT

Vendor:SILITEKPackage Cooled:DIPD/C:08+

BPMODE (TPS2074) or BPMODE (TPS2075) is an output that signals when the device is in bus-powered mode. The logic state is set according to the voltages on BP, SP, and BP_DIS. For the TPS2074, BPMODE outputs a low signal to indicate bus-powered mode or a high signal to indicate self-powered mode. For the TPS2075, BPMODE outputs a high signal to indicate bus-powered mode or a low signal to indicate self-pow...

730P305X9400

Package Cooled:500

731.070-00

Vendor:AMISPackage Cooled:06+D/C:500

73100

D/C:08+/09+

11CPDPower Dissipation Capacitance (Note 6)pF 6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the noCload dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.

73100-0103

Vendor:MolexD/C:08+

MXIC Flash technology reliably stores memory con- tents even after 10,000 erase and program cycles. The MXIC cell is designed to optimize the erase and programming mechanisms. In addition, the combi- nation of advanced tunnel oxide processing and low internal electric fields for erase and programming operations produces reliable cycling.The

73100-0114

Vendor:MOLEXD/C:3247

Other features include low quiescent current, typical- ly 70µA, and low dropout voltage which is typically less than 400mV at the maximum output current level of 300mA. The device is output short circuit protect- ed and has a thermal shutdown circuit for additional protection under extreme operating conditions.