74AC08MTR

Vendor:ST

(1) LED Current Control and Resistor RLED Selection The NJU6048 incorporates the LED current control to regulate the LED current (ILED), which is programmed by the feedback resistor (RLED) connected between the FB and the VSS terminals. Typically, the reference voltage VREF is internally regulated to 0.25V and is used as the positive input of the built-in comparator. Formula (1) is used to choose the va...

74AC08MTR

Vendor:ST

(1) LED Current Control and Resistor RLED Selection The NJU6048 incorporates the LED current control to regulate the LED current (ILED), which is programmed by the feedback resistor (RLED) connected between the FB and the VSS terminals. Typically, the reference voltage VREF is internally regulated to 0.25V and is used as the positive input of the built-in comparator. Formula (1) is used to choose the va...

74AC08PC

Vendor:NSPackage Cooled:DIP16D/C:9424+9412

READ: Read strobe indicates that the processor is performing a memory or I/O read cycle, depending on the state of the M/IO or S2 pin. This signal is used to read devices which reside on the HS-80C86RH local bus. RD is active LOW during T2, T3 and TW of any read cycle, and is guaranteed to remain HIGH in T2 until the 80C86 local bus has floated.

74AC08PC_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74AC08PWR TSSOP14

74AC08SCTR

74AC109E

Vendor:HARPackage Cooled:DIPD/C:94+

This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.05 /Dec. 2000Hynix Semiconductor

74AC109FN

Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

74AC109MTCX

Vendor:Fairchild

A flow through pin out has been adopted to allow simple PCB routing and maintain the cost effectiveness of this solution. All inputs and outputs of the BUFxx703 incorporate internal ESD protection circuits that prevent functional failures at voltages up to 4kV HBM and 1.5kV CDM.

74AC109SC_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74AC109SCX

Vendor:FAIRCHILDPackage Cooled:SOP14/3.9D/C:07+

High resolution ADC 24 bits no missing codes 0.0015% nonlinearity Optimized for fast channel switching 18-bit p-p resolution (21 bits effective) at 500 Hz 16-bit p-p resolution (19 bits effective) at 4 kHz On-chip per channel system calibration Configurable inputs 8 single-ended or 4 fully differential Input ranges +625 mV, 625 mV, +1.25 V, 1.25 V, +2.5 V, 2.5 V 3-wire serial interface SPI&re...

74AC109SJ

The PIC12C67X devices have 128 bytes of RAM, 16 bytes of EEPROM data memory (PIC12CE67X only), 5 I/O pins and 1 input pin. In addition a timer/counter is available. Also a 4-channel, high-speed, 8-bit A/D is provided. The 8-bit resolution is ideally suited for appli- cations requiring low-cost analog interface, (i.e., thermostat control, pressure sensing, etc.)

74AC109SJX_F042

Vendor:ＦＡＩＲＣＨＩＬＤ

74AC10DR

Table 5−43, HPI Read and Write Timing Requirements: − H13 [tw(DSL)]: deleted K = 1, K = 2, and K = 4 column − H14 [tw(DSH)]: − deleted K = 1, K = 2, and K = 4 column − changed MIN value from 3P, P, and 1.75P to 2P (ns) − deleted K = divider ratio ... footnote − added A host must not initiate transfer requests ... footnote

74AC10M96S2463

• Complete shutdown C TXD, RXD, PIN diode • Low shutdown current C 10 nA typical • Adjustable optical power management C Adjustable LED drive-current to maintain link integrity • Integrated EMI shield C Excellent noise immunity • Edge detection input C Prevents the LED from long turn-on time • Interface to various super I/O and controller devices •...

74AC10MTC

Vendor:Fairchild SemiconductorPackage Cooled:07+D/C:570

19.44 Mbit/s inputs to a 155.52 Mbit/s OC3 serial data output Performs parallelCtoCserial conversion of eight 77.76 Mbit/s inputs to a 622.08 Mbit/s OC12 serial data output Integrated PLL and VCO to generate the lineCrate clock from a subCrate reference clock Multiple configurations for parallel interface timing provide system design versatility Provides PLL Frequency Control Monitor and OutCofCLock I...

74AC10PC_F40

Vendor:ＦＡＩＲＣＨＩＬＤ

74AC10SC

Vendor:FAIRCHILDD/C:06+

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.11 /Jan. 2002Hynix Semiconductor

74AC10SC

Vendor:FAIRCHILDD/C:06+

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.11 /Jan. 2002Hynix Semiconductor

74AC10SC_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74AC10SCX

Vendor:FAIRCHILDPackage Cooled:SOP8D/C:0342+

Four selectable Receive and Transmit FIFO interrupt trigger levels Standard modem interface or infrared IrDA encoder/decoder interface Sleep mode Standard asynchronous error and framing bits (Start, Stop, and Parity Overrun Break) Independent receiver clock input Transmit, Receive, Line Status, and Data Set interrupts independently controlled Fully programmable character formatting: x 5-, 6-, 7-, or 8...

74AC10SJL

Vendor:NSPackage Cooled:SOP5.2mmD/C:1998

Unlike other nonvolatile memory technologies, there is no write delay with MRAM. The entire memory operation occurs in a single bus cycle. Therefore, any operation including read or write can occur immediately following a write. Data Polling, a technique used with EEPROMs to determine if the write is complete is unnecessary. Page write, a technique used to enhance EEPROM write performance is also unnecessary ...

74AC10SJR

Vendor:NSPackage Cooled:SOPD/C:93/P2

Oxide passivated structure for very low leakage currents Epitaxial structure minimizes forward voltage drop Forward voltage decreases with radiation exposure Qualified for space applications Thin construction for fit with photovoltaic cells Rectangular shape

74AC11000DR

Vendor:TI

BYTE PROGRAMMING: Once the memory array is erased, the device is programmed (to a logical 0) on a byte-by-byte basis. Please note that a data 0 cannot be programmed back to a 1; only erase operations can con- vert 0s to 1s. Programming is accomplished via the internal device command register and is a four-bus cycle operation (please refer to the Command Definitions table). The device will automaticall...

74AC11000N

Vendor:TIPackage Cooled:DIP-16D/C:8745

Programmable Power Limiting and Current Limiting for Complete SOA Protection Wide Operating Range: +9 V to +80 V Latched Operation (TPS2490) and Automatic Retry (TPS2491) High-side Drive for Low-RDS(on) External N-channel MOSFET Programmable Fault Timer to Protect the MOSFET and Eliminate Nuisance Shutdowns Power Good Open-Drain Output for Down- stream DC/DC Coordination Enable can be used as a Prog...

74AC11004AN

IL5 through IL0 are available on the TP3070. IL4 through IL0 are available on the TP3071. Each Interface Latch I/O pin may be individually programmed as an input or an output determined by the state of the corresponding bit in the Latch Direction Register (LDR). For pins configured as inputs, the logic state sensed on each input is latched into the Interface Latch Register (ILR) whenever control ...

74AC11004D

TAOperating free-air temperatureC4085C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.

74AC11004DW

Vendor:MITPackage Cooled:SOP-20D/C:99+

74AC11004DWR

D/C:96+

The Hitachi HN58S256A is a electrically erasable and programmable EEPROMs organized as 32768- word 8-bit employing advanced MNOS memory technology and CMOS process and circuitry technology. It also has a 64-byte page programming function to make the write operations faster.

74AC11004N

Vendor:TI

The MAX4599 successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxims continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxims quality and reliability standards.

74AC11004N

Vendor:TI

The MAX4599 successfully meets the quality and reliability standards required of all Maxim products. In addition, Maxims continuous reliability monitoring program ensures that all outgoing product will continue to meet Maxims quality and reliability standards.

74AC11008D

Vendor:TI

For the TPS774xx, the power good terminal (PG) is an active high output, which can be used to implement a power-on reset or a low-battery indicator. An internal comparator in the TPS774xx monitors the output voltage of the regulator to detect an undervoltage condition on the regulated output voltage. When OUT falls below 82% of its regulated voltage, PG will go to a low-impedance state. PG will go to a hi...

74AC11008PW

Vendor:TIPackage Cooled:TSSOP-16

74AC11030N

Vendor:TIPackage Cooled:DIP-14D/C:8731

4. In the case of CMOS Output Type: The time interval between the rising edge of VDD input pulse from 0.7 V to (+VDET) +2.0 V and output voltage level becoming to VDD/2. In the case of N−Channel Open Drain Output Type: Output pin is pulled up with a resistance of 470 kW to 5.0 V, the time interval between the rising edge of VDD input pulse from 0.7 V to (+VDET) +2.0 V and output voltage level becomi...

74AC11032D

Vendor:TIPackage Cooled:3000D/C:07+

Writing memory data is performed in word/byte increments of the devices 32k-word blocks typically within 8.4 µS (5V VDD, 12V VPP), 4k-word blocks typically within 17 µS (5V VDD, 12V VPP). Word/byte write suspend mode enables the system to read data or execute code from any other flash memory array location.

74AC11032N

Vendor:SigneticsPackage Cooled:DIP-16D/C:8914

Notes: 1Tester measures code transitions by dithering the voltage of the analog input (VIN ). The difference between the measured and the ideal code width (VREF /256) is the DNL error (Figure 2.). The INL error is the maximum distance (in LSBs) from the best fit line to any transition voltage (Figure 3.). Accuracy is a function of the sampling rate (FS). 2Guaranteed. Not tested. 3Specified values gu...

74AC11034

DCLK 3-wire FSK Interface Data Clock (Schmitt Input/CMOS Output). In mode 0 (when the CB0 pin is logic low) this is a CMOS output which denotes the nominal mid-point of a FSK data bit. In mode 1 (when the CB0 pin is logic high) this is a Schmitt trigger input used to shift the FSK data byte out to the DATA pin.

74AC11074DR

Vendor:TIPackage Cooled:SOP-14D/C:00+

The Am29PL160C is a 16 Mbit, 3.0 Volt-only Page mode Flash memory device organized as 2,097,152 bytes or 1,048,576 words.The device is offered in a 44-pin SO or a 48-pin TSOP package. The word-wide data (x16) appears on DQ15CDQ0; the byte-wide (x8) data appears on DQ7CDQ0. This device can be pro- grammed in-system or with in standard EPROM programmers. A 12.0 V VPP or 5.0 V CC are not required for ...

74AC11074N

Vendor:SigneticsPackage Cooled:DIP-14D/C:8931

Send PCM Signal Output (Output). 128 kbps to 4096 kbps serial PCM output stream. Data may be in either companded or 2s complement linear PCM format. This is the Send Out signal after acoustic echo cancellation and non-linear processing. Data bits are clocked out following SSI, ST- BUS or GCI timing requirements.

74AC1108

74AC11086D

Vendor:TI

CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the 74AC11086D features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid p...

74AC11109N

SEL 15 SELECT-this input determines whether data written into the IXDP610 goes to the internal Pulse Width (PW) latch or to the Control latch. A zero on this input (low voltage) directs data to the PW latch; a one on this input (high voltage) directs data to the Control latch.

74AC11112D

Vendor:PHILIPSPackage Cooled:SOP16

The TSOP22..YA1 - series are miniaturized receivers for infrared remote control systems. PIN diode and preamplifier are assembled on lead frame, the epoxy package is designed as IR filter. The demodulated output signal can directly be decoded by a microprocessor. TSOP22..YA1 is the standard IR remote control receiver series, support- ing all major transmission codes.

74AC11138D

Vendor:TID/C:08+

The Supertex MD1811 is a high speed, quad MOSFET driver designed to drive high voltage P/N-channel MOSFETs for medical ultrasound applications and other applications requiring a high output current for a capacitive load. The high-speed input stage of the MD1811 can operate from a 1.2 to 5.0 volt logic interface with an optimum operating input signal range of 1.8 to 3.3 volts. An adaptive threshold circuit is ...

74AC11158N

The 5 Volt Boot Block Flash memory family provides pinout-compatible flash memories at the 2-, 4-, and 8-Mbit densities. The 28F200B5, 28F400B5, and 28F800B5 can be configured to operate either in 16-bit or 8-bit bus mode, with the data divided into individually erasable blocks. The 28F004B5 provides 8-bit operation in a compact package.

74AC11158N

The 5 Volt Boot Block Flash memory family provides pinout-compatible flash memories at the 2-, 4-, and 8-Mbit densities. The 28F200B5, 28F400B5, and 28F800B5 can be configured to operate either in 16-bit or 8-bit bus mode, with the data divided into individually erasable blocks. The 28F004B5 provides 8-bit operation in a compact package.

74AC112

Package Cooled:DIP

The 74AC112 Phase IC combined with an IR XPhaseTM Control IC provides a full featured and flexible way to implement power solutions for the latest high performance CPUs and ASICs. The Control IC provides overall system control and interfaces with any number of Phase ICs which each drive and monitor a single phase of a multiphase converter. The XPhaseTM architecture results in a power supply that is smaller, ...

74AC1124

Vendor:TID/C:01

74AC11240N

Vendor:SigneticsPackage Cooled:DIP-24D/C:8935

1. In addition to lower output capaci- tance between terminals than ever before, the PhotoMOS relay achieves low ON-resistance. Output capacitance(C): 1.0pF (typ.) ON resistance(R): 9.5Ω (typ.) 2. High speed switching Turn on time: 30µs Turn off time: 30µs 3. SO package 4-pin type in super min- iature design 4. Low-level off state leakage current The SSR has an off state leakage c...

74AC11240NT

Vendor:TIPackage Cooled:DIP-24D/C:8745

The MC68302 Integrated Multiprotocol Processor Users Manual describes the program- ming, capabilities, registers, and operation of the MC68302; the MC68000 Family Program- mers Reference Manual provides instruction details for the MC68302; and the MC68302 Low Power Integrated Multiprotocol Processor Product Brief provides a brief description of the MC68302 capabilities.

74AC11244D

Vendor:PHIPackage Cooled:7.2D/C:92

NOTES: 1. The device may be operated outside recommended frequency ranges without damage, but functional operation is not guaranteed. 2. The level to be set on FS is determined by the nominal operating frequency of the VCO and Time Unit Generator. The VCO frequency always appears at 1Q1:0, 2Q1:0, and the higher outputs when they are operated in their undivided modes. The frequency appearing at the REF and ...

74AC11244D

Vendor:PHIPackage Cooled:7.2D/C:92

NOTES: 1. The device may be operated outside recommended frequency ranges without damage, but functional operation is not guaranteed. 2. The level to be set on FS is determined by the nominal operating frequency of the VCO and Time Unit Generator. The VCO frequency always appears at 1Q1:0, 2Q1:0, and the higher outputs when they are operated in their undivided modes. The frequency appearing at the REF and ...

74AC11244DW

The TLV2262/4 also makes great upgrades to the TLV2332/4 in standard designs. They offer increased output dynamic range, lower noise voltage and lower input offset voltage. This enhanced feature set allows them to be used in a wider range of applications. For applications that require higher output drive and wider input voltage range, see the TLV2432 and TLV2442 devices. If your design requires single amp...

74AC11257N

Vendor:TIPackage Cooled:04+D/C:860

C Internal Address and Data Latches for 128 Bytes C Internal Control Timer Fast Write Cycle Time C Page Write Cycle Time C 10 ms Maximum C 1 to 128-byte Page Write Operation Low Power Dissipation C 80 mA Active Current C 300 µA CMOS Standby Current Hardware and Software Data Protection DATA Polling for End of Write Detection High Reliability CMOS Technology C Endurance: 104 or 105 Cycles ...

74AC11280N

D/C:92

The SY88713V low-power limiting post amplifier is designed for use in fiber optic receivers. The device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88713V quantizes these signals and outputs PECL level waveforms.

74AC11286N

D/C:97

Note 1: All voltages are with respect to GND. All currents are positive into the specified terminal. Consult Unitrode Integrated Circuits databook for information regarding thermal specifica- tions and limitations of packages. Note 2: In normal operation VCC is powered through a current limiting resistor. Absolute maximum of 12V applies when VCC is driven from a low impedance source such that ICC does ...

74AC112P

Vendor:TOSHIBAPackage Cooled:DIPD/C:9701

Cin = Required 1000µF electrolytic Cout= Required 330µF electrolytic L1 = Optional 1µH input choke R1 = Required 10kΩ pull-up when using Pwr Good signal. Pwr good output is high when the output voltage is within specification.

74AC11533D

Vendor:SPackage Cooled:SOP24WD/C:2007+

PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice.

74AC11M

Vendor:STPackage Cooled:SOP-14D/C:99

Table 1. Electrical Specifications ItemSpec.Typical Input and Output Impedance-50Ω Nominal Center Frequency (f0)-1575.42MHz Insertion Loss1574.42~1576.42MHz3.5dB max.3.0dB Response Variation1574.42~1576.42MHz1.5dB max.1.0dB Out of Band Rejection1475.42MHz40dB min.45dB (Relative to1535.42MHz30dB min.35dB Through Level)1615.42MHz20dB min.28dB 1675.42MHz40dB min.44dB (Operating Temperature Rang...

74AC11M

Vendor:STPackage Cooled:SOP-14D/C:99

Table 1. Electrical Specifications ItemSpec.Typical Input and Output Impedance-50Ω Nominal Center Frequency (f0)-1575.42MHz Insertion Loss1574.42~1576.42MHz3.5dB max.3.0dB Response Variation1574.42~1576.42MHz1.5dB max.1.0dB Out of Band Rejection1475.42MHz40dB min.45dB (Relative to1535.42MHz30dB min.35dB Through Level)1615.42MHz20dB min.28dB 1675.42MHz40dB min.44dB (Operating Temperature Rang...

74AC11MTC

The CDS is driven through an off-chip coupling capacitor (CIN). AC coupling is strongly recommended because the DC level of the CCD output signal is usually too high (several volts) for the CDS to work properly. A 0.1-µF capacitor is recommended for CIN, however, it depends on the application environment.

74AC11MTCX

74AC11NSR

Vendor:TEXASD/C:03

74AC11SC

Vendor:FSCPackage Cooled:SOP14D/C:07+

The MC74AC646/74ACT646 consist of registered bus transceiver circuits, with outputs, DCtype flipCflops and control circuitry providing multiplexed transmission of data directly from the input bus or from the internal storage registers. Data on the A or B bus will be loaded into the respective registers on the LOWCtoCHIGH transition of the appropriate clock pin (CAB or CBA). The four fundamental data ha...

74AC11SCX

D/C:573

MaverickCrunch™ Math Engine • Floating point, integer and signal processing instructions • Optimized for digital music compression and decompression algorithms • Hardware interlocks allow in-line coding

74AC11SJ

Vendor:NSPackage Cooled:SOP5.2mm-14LD/C:1994

Note: 1. All input pulses are supplied by a generator having the following characteristics: tr or tf 1ns, Pulse Repetition Rate (PRR) = 15 Mpps, Pulse width = 10 0.2ns. CL includes instrumentation and fixture capacitance within 0.06m of the D.U.T.

74AC11SJX

Package Cooled:99D/C:2000

The command register itself does not occupy any addressable memory location. The register is a latch used to store the commands, along with the address and data information needed to execute the command. The command register is written to bring #WE to logic low state, while #CE is at logic low state and #OE is at logic high state. Addresses are latched on the falling edge of #WE or #CE, whichever happens la...

74AC11SJX_F042

Vendor:ＦＡＩＲＣＨＩＬＤ

74AC125D

D/C:07+

†Purchase of I2C components from Maxim Integrated Products, Inc. or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.

74AC125D

D/C:07+

†Purchase of I2C components from Maxim Integrated Products, Inc. or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.

74AC125DR2(SMDTR) D/C00

Vendor:OND/C:0

74AC125DTRL

Vendor:MOTD/C:06+

The ADS5545 is a high performance 14-bit 170-MSPS ADC. Using an internal sample and hold and low jitter clock buffer this ADC supports high SNR and high SFDR at high IF. With programmable options for parallel CMOS and LVDS outputs, this device is available in a compact 48-pin QFN package. The device provides internal references or can optionally be driven with an external reference. The device is specifie...

74AC125FN

Notes: 3. CL includes probe and jig capacitance. 4. All input pulses are supplied by generators having the following characteristics: PRR < 100 MHz, Z0 = 50W, tR < 2.5 nS, tF < 2.5 nS. 5. The outputs are measured one at a time with one transition per measurement. 6. TPLH and TPHL are the same as tpd.

74AC125M

Vendor:FAIRCHILDD/C:06+

The Hynix HYM71V16M635B(L)T8 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 128Mbytes memory. The Hynix HYM71V16M635B(L)T8 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

74AC125MTC

The device consists of a surface micromachined capacitive sensing cell (g-cell) and a CMOS signal conditioning ASIC contained in a single integrated circuit package. The sensing element is sealed hermetically at the wafer level using a bulk micromachined cap'' wafer.

74AC125MTC

The device consists of a surface micromachined capacitive sensing cell (g-cell) and a CMOS signal conditioning ASIC contained in a single integrated circuit package. The sensing element is sealed hermetically at the wafer level using a bulk micromachined cap'' wafer.

74AC125PC

Vendor:FSCPackage Cooled:DIP-14D/C:0052

Notes: 1. CL = Load capacitance: includes jig and probe capacitance. 2. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator 3. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. ...

74AC125SC

Vendor:FSCPackage Cooled:SOP14D/C:09+

Out (pin 7) The output pin assumes a logic high state once the resistance of R1 exceeds that of R2 for three successive measurement cycles. The output is maintained until R1 is less than R2 by the hysteresis amount for an additional three counts.

74AC125SJ

Vendor:NSPackage Cooled:SOPD/C:05/P

Specialized addressing requirements are met by using the onboard 24 x 24 crosspoint switch. This feature allows the map- ping of the 24 address bits at the output of the address genera- tor to the 24 address outputs of the chip. As a result, bit reverse addressing, such as that used in FFTs, is made possible.

74AC125SJX

Vendor:FAIRCHILD 仙童Package Cooled:03+D/C:2000

The information provided herein is believed to be reliable; however, C&D TECHNOLOGIES assumes no responsibility for inaccuracies or omissions. C&D TECHNOLOGIES assumes no responsibility for the use of this information, and all use of such information shall be entirely at the users own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circ...

74AC125TELL

Vendor:HIT

The AMS1082 series of adjustable and fixed regulators are easy to use and have all the protection features expected in high performance voltage regulators: short circuit protection and thermal shut-down. Pin compatible with older three terminal adjustable regulators, these devices offer the advantage of a lower dropout voltage, more precise reference tolerance and improved reference stability with temp...

74AC126

Package Cooled:SOP14MD/C:2007+

75 Volt Motor Supply Voltage 29 Amp Output Switch Capability, All N-Channel MOSFET Output Bridge 100% Duty Cycle High Side Conduction Capable Suitable for PWM Applications from DC to 100KHz Shoot-Through/Cross Conduction Protection Undervoltage Lockout Protection Programmable Dead-Time Control Low Active Enable for Bridge Shutdown Control Isolated Package Design for High Voltage Isolation Plus Good The...

74AC126P

Vendor:TOSPackage Cooled:DIP

The CMOS inputs are compatible with standard CMOS logic levels. TTL circuits may require the use of appropriate pull-up resistors. By using the serial data output, the drivers can be cascaded for interface applications requiring additional drive lines.

74AC132

D/C:93

The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in...

74AC132

D/C:93

The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in...

74AC132DR2

74AC132DR2

74AC138BM96

This specification is established by characterization and not 100% tested. See characterization graphs that relate converter performance to VREF level. VIN = 0.1V to 4.9V @ 1 kHz. VDD =5VP-P 500 mV @ 1 kHz, see test circuit Figure 3-3. Maximum clock frequency specification must be met. VREF = 400 mV, VIN = 0.1V to 4.9V @ 1 kHz TSSOP devices are only specified at 25C and +85C. For slow sample rates, see Se...

74AC138DC

Vendor:FPackage Cooled:DIPD/C:88

74AC138F

Vendor:HITACHIPackage Cooled:SOP

CLKA/CLKB (Pins 5, 16): Card Socket. The CLKA/CLKB pins should be connected to the CLK pins of the respective card sockets. The CLKA/CLKB signals are derived from the CLKIN pin. They provide a level shifted CLKIN signal to the selected card. The CLKA/CLKB pins are gated off until VCCA/VCCB attain their correct values.

74AC138M

Vendor:FAIRCHILDD/C:06+

Thermal Resistance (Typical, Note 4)JA (oC/W) JC (oC/W) CERDIP Package . . . . . . . . . . . . . . . .8024 Maximum Junction Temperature (Hermetic Package or Die) . . . 175oC Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC

74AC138M96

Vendor:HarrisD/C:94

74AC138MTC

DIGITAL OUTPUTS(6) Logic Family Logic Coding Low Output Voltage (IOL = 50µA to 0.5mA) High Output Voltage (IOH = 50µA to 0.5mA) Low Output Voltage (IOL = 50µA to 1.6mA) High Output Voltage (IOH = 50µA to 1.6mA) 3-State Enable Time 3-State Disable Time Output Capacitance

74AC138MTC

DIGITAL OUTPUTS(6) Logic Family Logic Coding Low Output Voltage (IOL = 50µA to 0.5mA) High Output Voltage (IOH = 50µA to 0.5mA) Low Output Voltage (IOL = 50µA to 1.6mA) High Output Voltage (IOH = 50µA to 1.6mA) 3-State Enable Time 3-State Disable Time Output Capacitance

74AC138MTC_NL

Vendor:ＦＡＩＲＣＨＩＬＤ

74AC138MTCX

Vendor:FAIRCHILDD/C:06+

74AC138MTCX

Vendor:FAIRCHILDD/C:06+

74AC138MTR

Vendor:7500Package Cooled:STD/C:06+

1. A17 is a NC for IDT70V3399. 2. All VDD pins must be connected to 3.3V power supply. 3. All VDDQ pins must be connected to appropriate power supply: 3.3V if OPT pin for that port is set to VIH (3.3V), and 2.5V if OPT pin for that port is set to VIL (0V). 4. All VSS pins must be connected to ground supply. 5. Package body is approximately 15mm x 15mm x 1.4mm with 0.8mm ball pitch. 6. This package code ...

74AC138P

Package Cooled:98D/C:2589

These solid state display devices are designed and tested for use in adverse industrial environments. The character height is 7.4 mm (0.29 inch). The numeric and hexadecimal devices incorporate an on-board IC that contains the data memory, decoder and display driver functions.

74AC138P

Package Cooled:98D/C:2589

These solid state display devices are designed and tested for use in adverse industrial environments. The character height is 7.4 mm (0.29 inch). The numeric and hexadecimal devices incorporate an on-board IC that contains the data memory, decoder and display driver functions.