82C54/B

Vendor:OKIPackage Cooled:30D/C:N/A

The AMC7123/4 is member of ADDM North Star White/Blue LED driver family. No external component is required. Especially good for use flash light LED driver. The special circuit design provides over 90% efficiency in low noise. The AMC7123/4 is Integrated with 2 control pins for LEDs driving current control.

82C54-2

Vendor:SSOP-32Package Cooled:OKID/C:04+

This basic current-mirror configuration is sensitive to the transistor beta (). The addition of another active transistor, shown in Figure 3B, greatly diminishes the circuit sensitivity to transistor beta and increases the current-source output impedance in direct proportion to the transistor beta. Cur- rent-mirror W (Figure 2) uses the configuration shown in Fig- ure 3A, while mirrors X, Y, and Z are ...

82C54-2JS

Guard Outputs for Ion Detector Input +/-0.75pA Detect Input Current Internal Reverse Battery Protection Low Quiescent Current Consumption (<6uA) Available in 16L PDIP or 16L N SOIC ESD Protection on all Pins Internal Low Battery Detection Interconnect up to 40 Detectors 10 Minute Timer for Sensitivity Control Compatible with Allegro A5367

82C54-2RS

At the end of the rows containing the sysMEM Blocks are the sysCLOCK Phase Locked Loop (PLL) Blocks. These PLLs have multiply, divide and phase shifting capability; they are used to manage the phase relationship of the clocks. The LatticeECP/EC architecture provides up to four PLLs per device.

82C547

Vendor:OPTIPackage Cooled:QFPD/C:2006

Protection from switching transients and induced RF Protection from ESD and EFT per IEC 61000-4-2 and IEC 61000-4-4 Secondary lightning protection per IEC61000-4-5 with 42 Ohms source impedance: Class 1: 1N6036 to 1N6072A Class 2: 1N6036 to 1N6067A Class 3: 1N6036 to 1N6061A Class 4: 1N6036 to 1N6054A Secondary lightning protection per IEC61000-4-5 with 12 Ohms source impedance: Class 1 : 1N6036 to ...

82C547

Vendor:OPTIPackage Cooled:QFPD/C:2006

Protection from switching transients and induced RF Protection from ESD and EFT per IEC 61000-4-2 and IEC 61000-4-4 Secondary lightning protection per IEC61000-4-5 with 42 Ohms source impedance: Class 1: 1N6036 to 1N6072A Class 2: 1N6036 to 1N6067A Class 3: 1N6036 to 1N6061A Class 4: 1N6036 to 1N6054A Secondary lightning protection per IEC61000-4-5 with 12 Ohms source impedance: Class 1 : 1N6036 to ...

82C54AFP

Vendor:MITPackage Cooled:SOP24D/C:04+

All synchronous inputs pass through input registers controlled by the rising edge of the clock. All data outputs pass through output registers controlled by the rising edge of the clock. Maximum access delay from the clock rise (TCO) is 2.6 ns (250-MHz device).

82C54FP

Vendor:MITPackage Cooled:SOPD/C:N/A

R2 (Program Counter) • The structure is depicted in Fig. 4. • Generates 16Kx13 on-chip ROM addresses to the relative programming instruction codes. • JMP instruction allows the direct loading of the low 10 program counter bits. • CALL instruction loads the low 10 bits of the PC, PC+1, and then push into the stack.. • RET (RETL k, RETI) instruction loads the program counter wi...

82C54FP6

Vendor:MITSUBISHIPackage Cooled:SOP24D/C:2007+

Transmit and Receive frames and time-slots may be skewed from each other by any number of BCLK cycles. During each assigned Transmit time-slot, the selected DX0/1 output shifts data out from the PCM register on the rising edges of BCLK. TSX0 (or TSX1 as appropriate) also pulls low for the first 71⁄2 bit times of the time-slot to control the TRI-STATE Enable of a backplane line-driver. Serial PCM ...

82C550A

The HY62LF16206A is a high speed, super low power and 2Mbit full CMOS SRAM organized as 128K words by 16bits. The HY62LF16206A uses high performance full CMOS process technology and is designed for high speed and low power circuit technology. It is particularly well-suited for the high density low power system application. This device has a data retention mode that guarantees data to remain valid at a minim...

82C556M

Vendor:OPTIPackage Cooled:QFPD/C:97+

Agilent Technologies HLMP subminiature LED lamps [3]. For example, the pulsed emerald green LED will have a light output approximately 30% brighter then the equivalent DC drive circuit at a peak pulsed current of 30 mA. Note that the pulsed circuit does not always produce a brighter LED. The pulsed emerald green LED has a brighter light output at peak currents greater than 10 mA; however, the DC circui...

82C557

Data contained in the phantom clock register is in binary-coded decimal format (BCD). Reading and writing the registers is always accomplished by stepping through all eight registers, starting with bit 0 of register 0 and ending with bit 7 of register 7.

82C558

Vendor:OPTIPackage Cooled:50D/C:N/A

IBREAK ICLK TRST VSS VDDI VDDE NMI P65/INT3 P64/INT2 P63/INT1 P62/INT0 P61 P60/ATRG P57/TRG3 P56/TRG2 P55/TRG1 P54/TRG0 P53/TMI3 P52/TMI2 P51/TMI1 P50/TMI0 MD3 MD2 MD1 MD0 P47/PPG3 P46/PPG2 P45/PPG1 P44/PPG0 X1A VSS X0A VDDI VDDE P43/TMO3 P42/TMO2

82C558E

The CM3004 is supplied in a space-saving, 8-lead power SOIC package which has been thermally enhanced via an integral leadframe to ensure maxi- mum junction-to-ambient power dissipation. The CM3004 is also available with optional lead-free finish- ing.

82C558N

Vendor:OPTIPackage Cooled:30D/C:N/A

Note 3: Typical values are determined with TA = TJ = 25˚C and represent the most likely norm. Note 4: All limits are guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). All room temperature limits are 100% tested during production with TA = TJ = 25˚C. All limits at temperature extremes are guaranteed via correlation using standard standard Quality Cont...

82C55A-2

Vendor:OKAD/C:08+

RESET: This active low input causes a chip reset which lasts for 26 clocks after RST has been deasserted. The reset initializes the Crosspoint Switch and some of the con- figuration registers as described in the Processor Interface Section. The chip must be clocked for reset to complete.

82C55A-2

Vendor:OKAD/C:08+

RESET: This active low input causes a chip reset which lasts for 26 clocks after RST has been deasserted. The reset initializes the Crosspoint Switch and some of the con- figuration registers as described in the Processor Interface Section. The chip must be clocked for reset to complete.

82C55A-2P3

Vendor:OKIPackage Cooled:DIPD/C:0623+

The most common application for charge pump devices is the inverter (Figure 3). This application uses two external capacitors - C1 and C2 (plus a power supply bypass capacitor, if necessary). The output is equal to CVIN plus any voltage drops due to loading. Refer to Table 1 and Table 2 for capacitor selection.

82C55A2VJ3

82C55A-2VJS

Vendor:300

The VHC164 is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissi- pation. The VHC164 is a high-speed 8-Bit Serial-In/Paral- lel-Out Shift Register. Serial data is entered through a 2- input AND gate synchronous with the LOW-to-HIGH transi- tion of the...

82C55A-2VJS

Vendor:300

The VHC164 is an advanced high-speed CMOS device fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissi- pation. The VHC164 is a high-speed 8-Bit Serial-In/Paral- lel-Out Shift Register. Serial data is entered through a 2- input AND gate synchronous with the LOW-to-HIGH transi- tion of the...

82C55AC

Vendor:NECPackage Cooled:DIPD/C:06+

Controls C12V, 3.3V, 5V and 12V Supplies 14.4V Absolute Maximum Rating for 12VIN and C12VIN Input Pins Insensitive to Supply Voltage Transients Adjustable Foldback Current Limit with Circuit Breaker LOCAL_PCI_RST# Logic On-Chip PRECHARGE Output Biases I/O Pins During Card Insertion and Extraction LTC4244-1 Designed for Applications without C12V Available in 20-Lead Narrow SSOP Package

82C55AC-2

Vendor:n/nD/C:07+

82C55AFP

Vendor:MITPackage Cooled:O5+D/C:915

Read and write accesses to the DDR SDRAM are burst oriented; accesses start at a selected location and con- tinue for a programmed number of locations in a pro- grammed sequence. Accesses begin with the registration of an Active command, which is then followed by a Read or Write command. The address bits registered coincident with the Active command are used to select the bank and row to be accessed....

82C55AFP

Vendor:MITPackage Cooled:O5+D/C:915

Read and write accesses to the DDR SDRAM are burst oriented; accesses start at a selected location and con- tinue for a programmed number of locations in a pro- grammed sequence. Accesses begin with the registration of an Active command, which is then followed by a Read or Write command. The address bits registered coincident with the Active command are used to select the bank and row to be accessed....

82C55AFP-2

Vendor:M5L

DESCRIPTION The 82C55AFP-2, 82C55AFP-2 and 82C55AFP-2 (ex- tended temperature range) and the 82C55AFP-2B, 82C55AFP-2 and 82C55AFP-2 (intermediate tempera- ture range) are monolithic integrated circuits available in 16-lead dual in-line plastic or ceramic package and plastic micro package. The 82C55AFP-2C/82C55AFP-2 and 82C55AFP-2C/82C55AFP-2 types are single-digit BCD-to-7-seg- ment decoder/driver circ...

82C55AFP5

Vendor:MITSUBISHIPackage Cooled:04+D/C:6

Nonmultiplexed address bus Processor operates at the clock input frequency On the Am186ES/ESLV microcontroller, 8-bit or 16-bit memory and I/O static bus option n Enhanced integrated peripherals provide increased functionality, while reducing system cost

82C55AM2

Vendor:968D/C:SMD

Perpendicular recording drive support for 2.88 MBytes Burst (16-byte FIFO) and Non-Burst modes Full support for IBM Tape Drive Register (TDR) im- plementation of AT and PS/2 drive types High-performance digital separator Supports fast tape drives (2 Mbps) and standard tape drives (1 Mbps, 500 Kbps and 250 Kbps)

82C55AM-2/82C55AFP2

Vendor:MIT/TOSPackage Cooled:SOP40WD/C:07+

RST Reset input A high on this pin for two machine cycles while the oscillator is running resets the de- vice The port pins will be driven to their reset condi- tion when a minimum VIH1 voltage is applied wheth- er the oscillator is running or not An internal pull- down resistor permits a power-on reset with only a capacitor connected to VCC

82C55FP

Receive Frame Sync input. Normally a pulse or squarewave with an 8 kHz repetition rate is applied to this input to define the start of the receive time slot assigned to this device (non-delayed data timing mode), or the start of the receive frame (delayed data timing mode using the internal time-slot assignment counter).

82C55OKI

Due to its large bandwidth the 82C55OKI is more likely to oscillate than lower bandwidth Power Operational Amplifiers. To pre- vent oscillations a reasonable phase margin must be main- tained by: 1. Selection of the proper phase compensation capacitor and resistor. Use the values given in the table under external connections on the first page of this data sheet and interpo- late if necessary. The p...

82C566

Vendor:OPTIPackage Cooled:PQFPD/C:2002

Y/C separation & Video Decoder 82C566 is a 1chip LSI of multi 3line comb and multi color decoder. 82C566 has 10bit ADC and 2channels 8bit ADC for analog Video signal interface and also include Y/C separation, color decode, and signal processing circuit. The output interface of 82C566 is a selectable for ITUR-601 & 656.

82C567

Vendor:OPTIPackage Cooled:QFP208D/C:06+

READ: The AT49BV/LV002(N)(T) is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE or OE is high. This dual-line control gives designers flexibility in pre- venting bus contention. COMMAND SEQUENCES: When the device is first pow- ered...

82C568

Vendor:OPTIPackage Cooled:QFPD/C:2000+

CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. UltraFET® is a registered trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation. SABER™ is a trademark of Analogy, Inc. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corpor...

82C56M

Vendor:OPTIPackage Cooled:QFP

The LH1556FP is robust, ideal for telecom and ground fault applications. It contains two SPST nor- mally open switches (1 Form A) that replace electro- mechanical relays in many applications. It is constructed using a GaAs LED for actuation control and an integrated monolithic die for the switch output. The die, fabricated in a high-voltage dielectrically iso- lated BCDMOS technology, is comprised of...

82C59

Package Cooled:07+D/C:800

On a semi-log plot (as shown in the HP catalog) the current graph will be a straight line with inverse slope 2.3 x 0.026 = 0.060 volts per cycle (until the effect of RS is seen in a curve that droops at high current). All Schottky diode curves have the same slope, but not necessarily the same value of current for a given voltage. This is determined by the saturation current, IS, and is related to th...

82C596

Vendor:OPTIPackage Cooled:50D/C:N/A

PAGE WRITE: The page write operation of the AT28C010-12DK allows 1 to 128 bytes of data to be written into the device during a single internal programming period. A page write operation is initiated in the same manner as a byte write; the first byte written can then be followed by 1 to 127 additional bytes. Each successive byte must be written within 150 µs (tBLC) of the previous byte. If the tBLC l...

82C597

Package Cooled:08+D/C:800

Notes a. Surface Mounted on 1 x 1 FR4 Board. b. See Solder Profile (http://www.vishay.com/doc?73257). The PowerPAK 1212-8 is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure adequate bottom side solder interconnection. c. Re...

82C59A-2JS

82C59AFP

Vendor:MITPackage Cooled:SOPD/C:N/A

The MPX53/MPXV53GC series silicon piezoresistive pressure sensors provide a very accurate and linear voltage output directly proportional to the applied pressure. These standard, low cost, uncompensated sensors permit manufacturers to design and add their own external temperature compensating and signal conditioning networks. Compensation techniques are simplified because of the predictability of Motorol...

82C59FP2

Vendor:3580Package Cooled:NULLD/C:00+

82C601A

D/C:02+

The primary function of any OC protection device is to quickly isolate the voltage bus from a faulty load. Unlike other manufacturers IC products that sense the IC thermal condition to isolate a faulty load, the ISL6118 uses an internal 12ms timer that starts upon OC detection. Once an OC condition is detected, the appropriate output is current limited for 12ms to allow transient conditions to pass before la...

82C602

Vendor:OPTIPackage Cooled:96D/C:N/A

Please read rating and !CAUTION (for storage, operating, rating, soldering, mounting and handling) in this catalog to prevent smoking and/or burning, etc.!Note •Please read rating and !CAUTION (for storage, operating, rating, soldering, mounting and handling) in this PDF catalog to prevent smoking and/or burning, etc.

82C602A

Internally, the 82C602A consists of a sensor core and an image flow processor. The sen- sor core functions to capture raw Bayer-encoded images that are input into the IFP as shown in Figure 1. The IFP processes the incoming stream to create interpolated, color- corrected output and controls the sensor core to maintain the desirable exposure and color balance.

82C602GA

Vendor:OPTID/C:02+

82C606

Package Cooled:08+D/C:800

* High performance CMOS technology. * Rhythm wind or Normal wind for SLEEP mode can be chosen. * Two to three-wind grade control in wind modes. * Memory start-up function option. * Many types of timer setting on three or four steps and ladder adder or non-ladder adder. * Two swing head control, micro-swing output can be chosen by MASK option. * SPEED or ON/OFF key can enable fan controller. * ...

82C606(OPTI)

Package Cooled:QFP

While the LM2936 maintains regulation to 60V, it will not withstand a short circuit above 40V because of safe operat- ing area limitations in the internal PNP pass device. Above 60V the LM2936 will break down with catastrophic effects on the regulator and possibly the load as well. Do not use this device in a design where the input operating voltage may ex- ceed 40V, or where transients are likely to e...

82C611A

Vendor:OPTIPackage Cooled:52D/C:N/A

The switch-over mode time enables the synchronous operation of microcontroller and watchdog. When the power-up reset time has elapsed, the watchdog has to be switched to monitoring mode by the microcontroller by a low signal transmitted to the mode pin (pin 12) within the time-out period, t1. If the low signal does not occur within t1, (see Fig- ure 4) the watchdog generates a reset pulse, t 6 , and the t...

82C6518AIK

Vendor:AMDPackage Cooled:PLCC

82C670

Vendor:ＭＩＴＳＵ….Package Cooled:328D/C:SMD

82C6700-08

Vendor:SPackage Cooled:SOP20WD/C:2007+

Notes: 1. The luminous intensity is measured on the mechanical axis of the lamp package. 2. The optical axis is closely aligned with the package mechanical axis. 3. The dominant wavelength, ëd, is derived from the CIE Chromaticity Diagram and represents the color of the lamp. 4. 1/2 is the off-axis angle where the luminous intensity is one half the on-axis intensity. 5. The intensity of narrow viewing ...

82C681

Vendor:OPTiPackage Cooled:01+D/C:360

Output voltage can be programmed using the on-chip DAC or an external precision reference. A two bit code programs the DAC reference to one of 4 possible values (0.6V, 0.9V, 1.2V and 1.5V). A unity gain, differential amplifier is provided for remote voltage sensing, compensating for any potential difference between remote and local grounds. The output voltage can also be offset through the use of single exter...

82C682

Vendor:OPTIPackage Cooled:50D/C:N/A

82C684CJ44

Vendor:XRPackage Cooled:1000D/C:PLCC44

The AD581 is easy to use in virtually all precision reference applications. The three terminals are simply primary supply, ground, and output, with the case grounded. No external com- ponents are required even for high precision applications; the degree of desired absolute accuracy is achieved simply by select- ing the required device grade. The AD581 requires less than 1 mA quiescent current from an op...

82C684J

Package Cooled:PLCC68D/C:93

The UC3844B, UC3845B series are high performance fixed frequency current mode controllers. They are specifically designed for Off−Line and dc−dc converter applications offering the designer a cost−effective solution with minimal external components. These integrated circuits feature an oscillator, a temperature compensated reference, high gain error amplifier, current sensing comparato...

82C684J/44

Vendor:XRPackage Cooled:PLCC

1. Obtaining fully specified performance from the ADS-930 requires careful attention to pc-card layout and power supply decoupling. The device's analog and digital ground systems are connected to each other internally. For optimal performance, tie all ground pins (4, 11, 13, 18, 24 and 30) directly to a large analog ground plane beneath the package.

82C687

Vendor:OPTIPackage Cooled:50D/C:N/A

The DS2745 provides current-flow, voltage, and temperature measurement data to support battery- capacity monitoring in cost-sensitive applications. The DS2745 can be mounted on either the host side or pack side of the application. Current measurement and coulomb counting is accomplished by monitoring the voltage drop across an external sense resistor, voltage measurement is accomplished through a separate v...

82C696

Vendor:OPTIPackage Cooled:50D/C:N/A

3. Martin, G.A., Viskochil, D., Bollag, G., McCabe, P.C., Crosier, W.J., Haubruck, H., Conroy, L., Clark, R., OConnell, P., Cawthon, R.M., Innis, M.A., and McCormick, F. 1990. The GAP-related domain of the neurofibromatosis type 1 gene product interacts with ras p21. Cell 63: 843-849.

82C696-0052

Vendor:OPTIPackage Cooled:QFPD/C:1995

Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 3.3V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = VCC C 0.6V at rated current.

82C700

linear analysis program having the five element equivalent circuit with RV, CJ and RS fixed. The optimizer can then adjust the values of LP and CP until the calculated S11 matches the measured values. Note that extreme care must be taken to de- embed the parasitics of the 50 Ω test fixture.

82C72

Vendor:N/APackage Cooled:100D/C:N/A

DESCRIPTION The HCF4094B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4094B is an 8 stages serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data

82C722G

Vendor:N/APackage Cooled:50D/C:N/A

Power Up and Down Recommendations. There are no restrictions on the power-up or power- down conditions of VCC and the voltages applied to the potentiometer pins provided that VCC is always more positive than or equal to VH, VL, and VW, i.e., VCC VH, VL, VW. The VCC ramp rate specification is always in effect.

82C722GAPWD

Vendor:OMEGA MICROPackage Cooled:MQFP208D/C:96

The HYM75V32M636(L)T6 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 256M bytes memory. The HYM75V32M636(L)T6 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

82C722GX

Vendor:S3Package Cooled:QFPD/C:07+

Parameter DC INPUT CHARACTERISTICS Input Voltage Range Input Differential Voltage Input Offset Voltage Input Offset Voltage Channel Matching Offset Voltage Tempco Input Bias Current Input Bias Current Tempco Input Offset Current Input Capacitance Input Resistance, Differential Mode Input Resistance, Common Mode Active Gain Common-Mode Rejection Ratio Hysteresis LATCH ENABLE CHARACTERIS...

82C750

Package Cooled:07+D/C:800

The UC62LV0256 is a high performance, very low power CMOS Static Random Access Memory organized as 32,768 words by 8 bits and operates from a wide range of 2.0V to 3.6V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 1uA and maximum access time of 70ns in 2.0V operation. Easy memory expansion is provided...

82C750

Package Cooled:07+D/C:800

The UC62LV0256 is a high performance, very low power CMOS Static Random Access Memory organized as 32,768 words by 8 bits and operates from a wide range of 2.0V to 3.6V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 1uA and maximum access time of 70ns in 2.0V operation. Easy memory expansion is provided...

82C79M-2

D/C:05+

This N-Channel MOSFET is produced using Fairchild Semiconductors advanced PowerTrench process that has been especially tailored to minimize the on state resistance and yet maintain low gate charge for superior switching performance.

82C802A

Vendor:OPTID/C:02+

Full Scale Range Select and Extended Control Enable. In non-extended control mode, a logic low on this pin sets the full-scale differential input range to 650 mVP-P. A logic high on this pin sets the full-scale differential input range to 870 mVP-P. See Section 1.1.4. To enable the extended control mode, whereby the serial interface and control registers are employed, allow this pin to float or connect...

82C802G

Vendor:N/APackage Cooled:N/AD/C:08+09+

The PLL is tuned by comparing the local oscillator frequency, after suitable division, with that of the crystal oscillator reference. The loop filter has been integrated in the IC. Practical limits upon the values of components which may be integrated mean that the local oscillator performance may be slightly improved by using an external PFD filter, shown in Figure 2. In this way the user may choose to h...

82C814ES

Vendor:OPTIPackage Cooled:TQFP-144D/C:06+

203 X 146mm (8" x 5.75") +5V 5%, +12V 5% Max. : 10A @ +5V, 1.02A @ +12V (within 5ms after power on) Typical: 5.6A @ +5V, 0.17A @ +12V (with 256 MB DRAM, Intel®) 0 ~ 60 C (32~140 F) 0% ~ 90% Relative Humidity, non condensing 0.85 kg (weight of total package)

82C8167

Package Cooled:05+D/C:122

Port 3: Port 3 is an 8-bit I/O port with a user configurable output type. Port 3 latches have 1s written to them and are configured in the quasi-bidirectional mode during reset. the operation of port 3 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to the section on I/O port configuration and the DC Electrical Characteristics for de...

82C822

Package Cooled:08+D/C:800

9. RGBCNV The YUV signal generated from the luminance and chrominance signals is converted to RGB using a matrix. However, since the band of the UV signal is dropped to around 800 kHz at a relatively early stage relative to the chrominance signal, this is not a signal in which all three channels have the same wide band as the Y signal, such as the signals used in 3-CCD video cameras.

82C822

Package Cooled:08+D/C:800

9. RGBCNV The YUV signal generated from the luminance and chrominance signals is converted to RGB using a matrix. However, since the band of the UV signal is dropped to around 800 kHz at a relatively early stage relative to the chrominance signal, this is not a signal in which all three channels have the same wide band as the Y signal, such as the signals used in 3-CCD video cameras.

82C84

Vendor:OKIPackage Cooled:DIPD/C:08+

The MC10/100EP31 is a D flipCflop with set and reset. The device is pin and functionally equivalent to the EL31 and LVEL31 devices. With AC performance much faster than the EL31 and LVEL31 devices, the EP31 is ideal for applications requiring the fastest AC performance available. Both set and reset inputs are asynchronous, level triggered signals. Data enters the master portion of the flipCflop when CL...

82C84

Vendor:OKIPackage Cooled:DIPD/C:08+

The MC10/100EP31 is a D flipCflop with set and reset. The device is pin and functionally equivalent to the EL31 and LVEL31 devices. With AC performance much faster than the EL31 and LVEL31 devices, the EP31 is ideal for applications requiring the fastest AC performance available. Both set and reset inputs are asynchronous, level triggered signals. Data enters the master portion of the flipCflop when CL...

82C84A-2RS

82C861G

Vendor:OPTIPackage Cooled:01+D/C:10000

The 82C861G is an application-specific, correlated double sampling (CDS) circuit designed for electronic-imaging applications that employ CCD's (charge coupled devices) as their photodetector. The 82C861G has been optimized for use in digital video applications that employ 10 to 14-bit A/D converters. The low-noise 82C861G can accurately determine each pixel's true video signal level by sequentially s...

82C863

Vendor:N/APackage Cooled:QFPD/C:07+

Bias Modes The power amplifier may be placed in either a Low Bias mode or a High Bias mode by applying the appropriate logic levels (see Operating Ranges table) to the VMODE Voltage. The Bias Control table lists the recommended modes of operation for various applications.

82C87

82C895

Vendor:OPTIPackage Cooled:QFPD/C:1995

The mixer has a balanced input and is capable of being driven single-ended. The input impedance is 2.5kΩ in parallel with a 2.2pF cap at 90MHz RF. The mixer output can drive a 1500Ω ceramic filter at 455kHz or 600kHz directly without any matching required. The mixer conversion power gain is 7dB when both input and output are matched and optimum LO level is used to drive the internal mi...

82C916

Package Cooled:SOP

This narrow beam angle 5 mm plastic packaged emitter contains a double wirebonded, GaAlAs, 880 nm IRED chip. This cost effective design is well suited for dc or high current pulse applications. This device is a UL recognized component for smoke alarm applications (UL file #S3506).

82C925

Vendor:OPTIPackage Cooled:50D/C:N/A

The Intersil HS-26C32RH is a differential line receiver designed for digital data transmission over balanced lines and meets the requirements of EIA Standard RS-422. Radiation hardened CMOS processing assures low power consumption, high speed, and reliable operation in the most severe radiation environments.

82C928-002

Package Cooled:QFP160D/C:2007+

Expand/Store: A common output that can be used as either an input to an external audio expander or the input to a voice storage medium such as the MX812. Components relevant to the external device requirements should be used at this output. See Figures 2 and 3.

82C928A

Vendor:OPTIPackage Cooled:QFPD/C:9406+

interface between the IMP8980Ds and the filter/codecs. Figure 8 shows the position of these components in an example architec- ture. The Mitel MT8964 filter/codec in Figure 7 receives and transmits digitized voice signals on the ST-BUS input DR, and ST-BUS output DX, respectively. These signals are routed to the ST-BUS inputs and outputs on the top IMP8980D, which is used as a digital speech switch....

82C930

Vendor:OPTIPackage Cooled:N/AD/C:95

Single-power-supply flash memory (F-ZTAT™*) is available, providing a quick and flexible response to conditions from ramp-up through full-scale volume production, even for applications with frequently changing specifications.

82C933

Vendor:OPTIPackage Cooled:30D/C:N/A

In a system, the 82C37A address and control outputs and data bus pins are basically connected in parallel with the system busses. An external latch is required for the upper address byte. While inactive, the controllers outputs are in a high impedance state. When activated by a DMA request and bus control is relinquished by the host, the 82C37A drives the busses and generates the control signals to pe...

82C950

Vendor:OPTIPackage Cooled:50D/C:N/A

82CNQ030APBF

Vendor:VishayPackage Cooled:D-61-8AD/C:08+

The active polarity of SHP/SHD (active high or active low) can be chosen through the serial interface, refer to serial interface for details. The default value of SHP/SHD is active low. However, right after power on, this value is unknown. For this reason, it must be set to the appropriate value by using the serial interface, or reset to the default value by the RESET pin. The description and the timing di...

82CNQ030ASL

Vendor:IRD/C:04+

READ: The AT82CNQ030ASLB is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high- impedance state when either CE or OE is high. This dual line control gives designers flexibility in preventing bus con- tention in their systems. BYTE WRITE: A low pulse on the WE...

82CNQ030ASL

Vendor:IRD/C:04+

READ: The AT82CNQ030ASLB is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high- impedance state when either CE or OE is high. This dual line control gives designers flexibility in preventing bus con- tention in their systems. BYTE WRITE: A low pulse on the WE...

82CNQ030CM

Vendor:IRPackage Cooled:(LX)high-frequency

Differential LO input with high input impedance. This pin requires external AC coupling. If a single ended 50Ω source is used, a 56Ω resistor should be connected directly between LoInP and LoInM, and LoInM RF bypassed to ground. The LO signal should be AC coupled into LoInP.

82CNQ030SM

Vendor:IRPackage Cooled:D61-8-SMD/C:05+

The feedback voltage pin is the non-inverting input to the PWM comparator. It has a 0.9mA current source connected internally while a capacitor and op- tocoupler are typically connected externally. A feedback voltage of 6V trig- gers over load protection (OLP). There is a time delay while charging external capacitor Cfb from 3V to 6V using an internal 5uA current source. This time delay prevents false trigger...

82CNQ035

Vendor:IRPackage Cooled:D61-8D/C:03

The device contains two operational amplifiers and a precision shunt regulator. OPAMP 1 is designed for voltage control, whose non-inverting input internally connects to the ouput of the shunt regulator. OPAMP 2 is for current control with both inputs uncommitted. The IC offers the power converter designer a control solution that features increased precision with a corre- sponding reduction in system...

82CNQ035

Vendor:IRPackage Cooled:D61-8D/C:03

The device contains two operational amplifiers and a precision shunt regulator. OPAMP 1 is designed for voltage control, whose non-inverting input internally connects to the ouput of the shunt regulator. OPAMP 2 is for current control with both inputs uncommitted. The IC offers the power converter designer a control solution that features increased precision with a corre- sponding reduction in system...

82CNQ040

Vendor:IRPackage Cooled:D61-8D/C:03

Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device. 2. Typical values are at VCC = 3.3V, +25C ambient. 3. Per LVTTL driven input (control inputs only); Y and In pins do not contribute to ICC. This parameter is guaranteed, but not production tested.

82CNQ045

Vendor:IR

Notes 1. Signals on NC, COM, or IN exceeding VCC or GND are clamped by internal diodes. Limit forward diode current to 30mA. 2. Caution: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not...

82D01161-90LPBP

Vendor:FUJITSUPackage Cooled:BGAD/C:06+

82D01161-90LPBT

Package Cooled:00+D/C:BGA

Both the LCRI and MCI signals are intended to be sourced from the SN65LVDS150 MuxIt programmable frequency multiplier. They are carried over LVDS differential connections to minimize skew and jitter. The SN65LVDS151 includes LVDS differential line drivers for both the serialized data output (DO) stream and the link clock output (LCO). The cascade input (CI) is also an LVDS connection, and when it is used ...

82D151M385KD2D

82DB02L

Vendor:NSPackage Cooled:SOP