Index "8"When a liquid comes in contact with the sensing surface and the appropriate signals are applied to the pins, the sensor provides an output that corresponds with the refractive index of the liquid. The output of the Spreetat sensor is a series of analog voltages, one per clock pulse, from which the refractive index of the liquid is derived when the voltages are digitized and processed with the proper algor...
Vendor:NSCPackage Cooled:CDIPD/C:95+
D/C:886
Vendor:MITELPackage Cooled:07+D/C:800
Crystal Frequency(Note TCLK Frequency TCLK Duty Cycle for LEN2/1/0 = 0/0/0(Note ACLKI Frequency(Note RCLK Duty Cycle(Note Rise Time, All Digital Outputs(Note Fall Time, All Digital Outputs(Note TPOS/TNEG (TDATA) to TCLK Falling Setup Time TCLK Falling to TPOS/TNEG (TDATA) Hold Time RPOS/RNEG Valid Before RCLK Falling(Note RDATA Valid Before RCLK Falling(Note RPOS/RNEG Valid Before RCLK Rising(No...
Vendor:MITPackage Cooled:07+D/C:800
Digital End-of-Charge Output: N-Ch open drain output. Low indicates charging, a current that is higher than the programmed current set by REOC is charging the battery. When the current drops to less than the current set by REOC, the output goes high impedance, indicating end-of-charge.
Vendor:MITPackage Cooled:07+D/C:800
Digital End-of-Charge Output: N-Ch open drain output. Low indicates charging, a current that is higher than the programmed current set by REOC is charging the battery. When the current drops to less than the current set by REOC, the output goes high impedance, indicating end-of-charge.
Vendor:MIT-
Vendor:NECPackage Cooled:BGA-316D/C:0740+
Vendor:ADPackage Cooled:TQFP48D/C:2008-1-2
Package Cooled:CDIP18D/C:2007+
Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation, the device voltage and current must not exceed the maximum operating values specified in the table on page one. Bias Conditions should also satisfy the following expression: IDVD < (TJ - TL) / RTH, j-lTL=TLEAD
D/C:96
• Compact Solid-State Bidirectional Switch • Normally-Off Single-Pole Relay Function (1 Form A) • 60 V Output Withstand Voltage in Both Polarities at 25C • 0.75/1.5 Amp Current Ratings (See Schematic for Connections A & B) • Low Input Current; CMOS Compatibility • Very Low On-resistance: 0.4 Ω Typical at 25C • ac/dc Signal and Power ...
ANALOG I/O 8-Channel, 400kSPS High Accuracy, 12-Bit ADC On-Chip, 20 ppm/ o C Voltage Reference DMA Controller, High-Speed ADC-to-RAM capture Two 12-Bit Voltage Output DACs Dual Output PWM-SD DACs On-Chip Temperature Monitor Function 8051 Based Core 8051-Compatible Instruction Set (16.7 MHz Max) High performance Single Cycle Core* 32kHz Ext Crystal,On-Chip Programmable-PLL 12 Interrupt Sources...
Vendor:STPackage Cooled:06+D/C:500
The design of the DM562P is optimized for desktop personal computer applications and it provides a low cost, highly reliable, maximum integration, with the minimum amount of support required. The DM562P modem can operate over a dial-up network (PSTN) or 2 wire leased lines.
Vendor:JRCD/C:994
Vendor:QFP-44Package Cooled:.D/C:04+
In the IF section, it can be selected if the first IF signal is down-converted to a second, lower IF or if it is simply amplified to appear at the IF output. If the down-conversion option is chosen, it can be selected if the LO signal of the IF mixer is directly derived from the reference signal of the PLL, or if it is generated by doubling its frequency. The amplifiers in the IF section are gain-controlle...
D/C:袋装
Package Cooled:PLCC
Clock Enable: CKE HIGH activates, and CKE LOW deactivates internal clock signals, and device input buffers and output drivers. Taking CKE LOW provides PRECHARGE POWER DOWN and SELF REFRESH operation (all banks idle), or ACTIVE POWER DOWN (row ACTIVE in any bank). CKE is synchronous for POWER DOWN entry and exit, and for SELF REFRESH entry. CKE is asynchronous for SELF REFRESH exit, and for output disable. C...
Package Cooled:PLCC
Clock Enable: CKE HIGH activates, and CKE LOW deactivates internal clock signals, and device input buffers and output drivers. Taking CKE LOW provides PRECHARGE POWER DOWN and SELF REFRESH operation (all banks idle), or ACTIVE POWER DOWN (row ACTIVE in any bank). CKE is synchronous for POWER DOWN entry and exit, and for SELF REFRESH entry. CKE is asynchronous for SELF REFRESH exit, and for output disable. C...
Vendor:STPackage Cooled:SMD8D/C:06+
Layout 50 ps Channel-to-Channel Skew (Typ) 200 ps Differential Skew (Typ) Propagation Delay Times 2.7 ns (Typ) 3.3-V Power Supply Design High Impedance LVDS Inputs on Power Down Low-Power Dissipation (40 mW at 3.3 V Static) Accepts Small Swing (350 mV) Differential Signal Levels Supports Open, Short, and Terminated Input Fail-Safe Industrial Operating Temperature Range (C40C to 85C) Conforms to TIA/E...
Vendor:PHILIPSPackage Cooled:QFP0707-48D/C:02+
The TLV2252 and TLV2254 are dual and quadruple low-voltage operational amplifiers from Texas Instruments. Both devices exhibit rail-to-rail output performance for increased dynamic range in single- or split-supply applications. The TLV225x family consumes only 34 µA of supply current per channel. This micropower operation makes them good choices for battery-powered applications. This family i...
Vendor:PHILIPSPackage Cooled:TQFP48D/C:0546+
The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32 kHz, 44.1 kHz, and 48 kHz rates. The stereo-audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers providing up to +59.5 dB analog gain for low...
Vendor:PHILIPSPackage Cooled:TQFP48D/C:0546+
The stereo audio DAC supports sampling rates from 8 kHz to 96 kHz and includes programmable digital filtering in the DAC path for 3D, bass, treble, midrange effects, speaker equalization, and de-emphasis for 32 kHz, 44.1 kHz, and 48 kHz rates. The stereo-audio ADC supports sampling rates from 8 kHz to 96 kHz and is preceded by programmable gain amplifiers providing up to +59.5 dB analog gain for low...
Cycle-by-cycle current limit provides protection against shorted outputs, and soft-start eliminates input current surge during start up. The low current (<2µA) shutdown provides output disconnect, enabling easy power man- agement in battery-powered systems.
Vendor:PHIPackage Cooled:QFP48LD/C:2004+
The Micron® Imaging 8007BC3 VGA-based CMOS active-pixel sensor has a 1/2-inch optical format and delivers superb resolution at a turbocharged 200 fps, making it the perfect solution for machine vision assembly lines, airbag deployment, golf swing analysis, and special effects in movies. The freeze-frame shutter allows the signal charges of all pixels to be integrated in parallelall pixels start i...
D/C:05+
By using the control signal CS, SK and data input signal DI, these instructions can be given to the HT93LC66. These serial instruction data presented at the DI input will be written into the device at the rising edge of SK. During the READ cycle, DO pin acts as the data output and during the WRITE or ERASE cycle, DO pin indi- cates the BUSY/READY status. When the DO pin is ac- tive for read data or as a BUSY...
D/C:05+
By using the control signal CS, SK and data input signal DI, these instructions can be given to the HT93LC66. These serial instruction data presented at the DI input will be written into the device at the rising edge of SK. During the READ cycle, DO pin acts as the data output and during the WRITE or ERASE cycle, DO pin indi- cates the BUSY/READY status. When the DO pin is ac- tive for read data or as a BUSY...
Vendor:DYTCOMPackage Cooled:SOP
The Simultaneous Read/Write architecture provides simultaneous operation by dividing the memory space into two banks. The device can improve overall system performance by allowing a host system to pro- gram or erase in one bank, then immediately and si- multaneously read from the other bank, with zero latency. This releases the system from waiting for the completion of program or erase operations.
Vendor:MICROCHIPD/C:97+
Vendor:MOTD/C:90
The UCC3808 family offers a variety of package temperature range options, and choice of undervoltage lockout levels. The family has UVLO thresholds and hysteresis options for off-line and battery powered systems. Thresholds are shown in the table below.
Vendor:MOTD/C:90
The UCC3808 family offers a variety of package temperature range options, and choice of undervoltage lockout levels. The family has UVLO thresholds and hysteresis options for off-line and battery powered systems. Thresholds are shown in the table below.
Vendor:PHILIPSPackage Cooled:QFPD/C:01+
UCC283−3 and UCC283−5 versions are in 3-lead packages and have preset outputs at 3.3 V and 5.0 V respectively. The output voltage is regulated to 1.5% at room temperature. The UCC283−ADJ version, in a 5-lead package, regulates the output voltage programmed by an external resistor ratio.
Vendor:PHILIPSPackage Cooled:QFPD/C:01+
The ADS5423 is available in a 52 pin HTQFP with heatsink package and is pin compatible to the AD6645. The ADS5423 is built on state of the art Texas Instruments complementary bipolar process (BiCom3) and is specified over full industrial temperature range (−40C to 85C).
Vendor:PHILIPSPackage Cooled:QFPD/C:01+
Vendor:PHILIPSPackage Cooled:NULLD/C:NULL
Note 1: Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under"Recommended Operating Conditions" is not implied. Exposure to "Absolute Maximum Ratings" for extended periods may affect device ...
Vendor:IORPackage Cooled:SOP-8PD/C:03+
Vendor:SIEMENSPackage Cooled:SMD8D/C:06+
The 800GSAEs digital receiver and NTSC demodulator accepts an analog signal centered at the standard television IF frequencies. It amplifies and digitizes this signal with an integrated programmable gain amplifier and 12-bit A/D converter. The output of the A/D is sent to the receiver and demodulator. The digital receiver consists of a QAM demodulator and a VSB demodulator. Each demodulator contains ada...
Vendor:3Package Cooled:FUJITSUD/C:N/A
No part of this manual may be reproduced, copied, translated or transmitted in any form or by any means without the prior written permission of the original manufacturer. Information provided in this manual is intended to be accurate and reliable. However, the original manufacturer assumes no responsibility for its use, or for any infringements upon the rights of third parties that may result from its u...
Package Cooled:55D/C:MODULE
Vendor:ALLEN BRADLEYD/C:N/A
Vendor:ALLEN BRADLEYD/C:N/A
Vendor:TOSHIBAPackage Cooled:MODULED/C:N/A
Vendor:ADPackage Cooled:SOP8D/C:02+
• Utilizing one of the worlds brightest (AS) AllnGaP technologies • High luminous flux • Supreme heat dissipation: RthJP is 90 K/W • High operating temperature: Tj = + 125 C • Meets SAE and ECE color requirements for the automobile industry for color red • Packed in tubes for automatic insertion
Vendor:DTCPackage Cooled:QFPD/C:1995
Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and output loading specified in Figure 1a. 2. Tested with the load in Figure 1b. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
Vendor:SKPackage Cooled:DIP-8D/C:05+
wide variety of external capacitors, and the compact SOT23-5 surface-mount package. The FAN2502/03 family of products offer significant improvements over older BiCMOS designs and are pin-compatible with many popular devices. The output is thermally protected against overload.
Vendor:PHILIPSPackage Cooled:NULLD/C:;99+
Package Cooled:MSOP10D/C:06+
Vendor:DGPackage Cooled:CDIPD/C:00+
Vendor:SKPackage Cooled:SOP
A UV erasable windowed package version is ideal for code development while the cost-effective One-Time- Programmable (OTP) version is suitable for production in any volume. The customer can take full advantage of Microchips price leadership in OTP microcontrollers while benefiting from the OTPs flexibility.
Vendor:MOTPackage Cooled:06+D/C:500
• Optimum instruction set for controller applications •Wealth of data types (Bit, Byte, Word, Long Word) •Wealth of addressing modes (23 different modes) •Enhanced signed multiply-divide instructions and RETI instruction functions •Enhanced high-precision arithmetic employing 32-bit accumulator
Vendor:SIGNETICSPackage Cooled:PLCC-44D/C:99
Data RAM with size selection of 648, 968, 1608 and 2248 bits Halt function and wake-up feature to reduce power consumption 63 powerful instructions Up to 0.5µs instruction cycle with 8MHz system clock at VDD=5V All instructions in 1 or 2 machine cycles 14-bit/15-bit/16-bit table read instructions 2-level/4-level/8-level subroutine nesting Bit manipulation instructions
Vendor:PHILIPSPackage Cooled:253D/C:05+
(*) Typical temperature coefficient for all VDD value is 0.3 %/C. (1) Input tr, tf = 5ns (2) If more than unit is cascaded in a parallel clocked application, tr should be made less than or equal to the sum of the fixed propagation delay time at 15pF and the transition time of the carry output driving stage for the estimated capacitive load.
Package Cooled:CDIP28D/C:2007+
Each device has 2 rows for identification. The first row designates the device as manufactured by International Rectifier, indicated by the letters "IR", and the Part Number (indicates the current, the voltage rating and Schottky Generation). The second row indicates the year, the week of manufacturing and the Site ID.
Vendor:TSSOP-16Package Cooled:.D/C:2004+
Dual-Port RAM for 32-bit-or-more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach in 32-bit or wider memory system applications results in full-speed, error- free operation without the need for additional discrete logic. This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location...
Vendor:ZILOGPackage Cooled:PLCC
DESCRIPTION The ST3237E is a 3V to 5.5V powered EIA/ TIA-232 and V.28/V.24 communication interfaces high data-rate capability and enhanced electrostatic discharge (ESD) protection at 8KV using IEC1000-4-2 contact discharge and 15kV using Human Body Model (HBM). The other pins are protected with standard ESD protection at 2kV using HBM method. The ST3237C is a transceiver (5 drivers, 3 receivers) f...
Vendor:ZILOGPackage Cooled:PLCC
DESCRIPTION The ST3237E is a 3V to 5.5V powered EIA/ TIA-232 and V.28/V.24 communication interfaces high data-rate capability and enhanced electrostatic discharge (ESD) protection at 8KV using IEC1000-4-2 contact discharge and 15kV using Human Body Model (HBM). The other pins are protected with standard ESD protection at 2kV using HBM method. The ST3237C is a transceiver (5 drivers, 3 receivers) f...
The MAX4198/MAX4199 can drive 5kΩ loads to within 100mV from each rail. The standard differential amplifi- er configurations provide common-mode rejection of 90dB for the MAX4198 and 110dB for the MAX4199. The input common-mode voltage range for the MAX4198 extends 100mV Beyond-the-Rails™.
Vendor:ADPackage Cooled:SOP8D/C:02+
This asynchronous input halts CPUCLK (0:3) and AGP (0:1) clocks at logic 0 level, when input low (in Mobile Mode, MODE=0) SDRAM clock output. Frequency is selected by the SD_SEL latched input. SD_SEL = 1 at power on causes SDRAM frequency = CPU frequency SD_SEL = 0 at power on causes SDRAM frequency = AGP frequency This asynchronous input halts PCICLK(0:5) clocks at logic 0 level, when input low (In m...
D/C:08+
Vendor:进口Package Cooled:板D/C:07+
1. All characteristics are measured with C = 0.1µF from Pin 1 to GND, and with C = 0.1µF from Pin 3 to GND. 2. Hysteresis is the difference between the positive going input threshold voltage. V T+, and the negative going input threshold voltage, VT-.
1. All characteristics are measured with C = 0.1µF from Pin 1 to GND, and with C = 0.1µF from Pin 3 to GND. 2. Hysteresis is the difference between the positive going input threshold voltage. V T+, and the negative going input threshold voltage, VT-.
Vendor:NULL Package Cooled:MODULED/C:07+
Note 6: Load regulation is measured on a pulse basis from no load to the specified load current. Output changes due to die temperature change must be taken into account separately. Note 7: Dropout Voltage is (VIN C VOUT) when VOUT falls to 0.1% below its nominal value at VIN = 1.8V. Note 8: Peak-to-Peak noise is measured with a single pole highpass filter at 0.1Hz and a 2-pole lowpass filter at 10Hz. The un...
Vendor:NULL Package Cooled:MODULED/C:07+
• AN1831/D Using MC68HC908 On-Chip Programming Routines • AN2093/D Creating Efficient C Code for the MC68HC08 • AN1219/D M68HC08 Integer Math Routines • AN1218/D HC05 to HC08 Optimization • AN1837/D Non-Volatile Memory Technology Review • AN1752/D Data Structures for 8-bit MCUs • AN1705/D Noise Reduction Techniques for MCU-Based Systems
Package Cooled:CDIP28D/C:2007+
Vendor:NULL Package Cooled:MODULED/C:07+
The conditional skip is activated by instructions. Once the condition is met, the next instruction, fetched during the current instruction execution, is discarded and a dummy cycle replaces it to get the proper instruction. Otherwise proceed with the next instruction.
Vendor:NULL Package Cooled:MODULED/C:07+
∙ 2,097,152-word 8-bit configuration ∙ Single 5V power supply, 10% tolerance ∙ Input : TTL compatible, low input capacitance ∙ Output : TTL compatible, 3-state ∙ Refresh : 2048 cycles/32ms ∙ Fast page mode, read modify write capability ∙ CAS before RAS refresh, hidden refresh, RAS-only refresh capability ∙ Packages (SOJ28-P-400-1.27)28-pin 400mil...