857862

Vendor:FAIRCHILDPackage Cooled:SOP-16D/C:05+

857CM-0009P3

Vendor:TOKO ?D/C:.

The MAX1165/MAX1166 16-bit, low-power, successive- approximation analog-to-digital converters (ADCs) fea- ture automatic power-down, factory-trimmed internal clock, and a 16-bit wide (MAX1165) or byte wide (MAX1166) parallel interface. The devices operate from a single +4.75V to +5.25V analog supply and a +2.7V to +5.25V digital supply. The MAX1165/MAX1166 use an internal 4.096V refer- ence or an external r...

857CM-0052P3

D/C:07+

Note 1 Output voltage is set to be 2.5V. Note 2: Line and load regulations are guaranteed up to maximum power dissipation determined by input/output differential and the output current. However, the maximum power will not be available over the full input/output voltage range. Note 3: The specifications represent the minimum input/output voltage required to maintain 1% regulation. Note 4: The minimum...

857CM-0052P3

D/C:07+

Note 1 Output voltage is set to be 2.5V. Note 2: Line and load regulations are guaranteed up to maximum power dissipation determined by input/output differential and the output current. However, the maximum power will not be available over the full input/output voltage range. Note 3: The specifications represent the minimum input/output voltage required to maintain 1% regulation. Note 4: The minimum...

857FU-222MP3

Vendor:TOKOPackage Cooled:/D/C:02+

8580-001

Vendor:AMIPackage Cooled:PLCCD/C:07+

This circuit is used to design inductive proximity switches. The resonant circuit of the LC oscillator is implemented with an open half-pot ferrite and a capacitor in parallel (pin LC). If a metallic target is moved closer to the open side of the half-pot ferrite, energy is drawn from the resonant circuit and the amplitude of the oscillation is reduced accordingly. This change in amplitude is transmitted to...

8580A-00C

Vendor:MSCPackage Cooled:SOTD/C:04+

The general function of the background noise detector in the transmitting channel is to create a positive signal (in respect to the reference) so that, when coupled to the summing point at the CMP input, will counteract the signal from the transmitter level detector representing the actual sound pressure level at the microphone. This counteracts the noise from influencing the switching characteristics. The ...

8580SA

Vendor:N/APackage Cooled:30D/C:N/A

for Field Programmable Gate Arrays (FPGAs) Cascadable Read Back to Support Additional Configurations or Future Higher-density Arrays Low-power CMOS EEPROM Process Programmable Reset Polarity Available in the Space-efficient Surface-mount PLCC Package In-System Programmable via 2-wire Bus Emulation of Atmels AT24CXXX Serial EEPROMs Available in 3.3V 5% LV and 5V 5% C Versions System-friendly READY Pin Re...

85814-102

Vendor:FCIPackage Cooled:08+D/C:10000

8581--6

Vendor:PHIPackage Cooled:SOP8SD/C:2007+

8581T

Vendor:PHIPackage Cooled:SOP8WD/C:2007+

Sector Protection A hardware method to lock a sector to prevent program or erase operations within that sector Sectors can be locked in-system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors

8581T

Vendor:PHIPackage Cooled:SOP8WD/C:2007+

Sector Protection A hardware method to lock a sector to prevent program or erase operations within that sector Sectors can be locked in-system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors

8582C-1

Vendor:PHIPackage Cooled:06+D/C:2000

8582D2Y

Vendor:PHILIPSPackage Cooled:SOP8D/C:2007+

Near-zero propagation delay 5Ω switches connect inputs to outputs Direct bus connection when switches are ON Ultra-low quiescent power (0.1µA typical) C Ideally suited for notebook applications • Packages available: C 24-pin 173-mil wide plastic TSSOP (L) C 24-pin 150-mil wide plastic QSOP (Q)

8582E2TS

Vendor:SOP-16Package Cooled:PHID/C:04+

RC32300 32-bit Microprocessor C Enhanced MIPS-II ISA C Enhanced MIPS-IV cache prefetch instruction C DSP Instructions C MMU with 16-entry TLB C 8KB Instruction Cache, 2-way set associative C 2KB Data Cache, 2-way set associative C Per line cache locking C Write-through and write-back cache management C Debug interface through the EJTAG port C Big or Little endian support Interrupt Controller C Allows s...

8582F2Y

Vendor:PHILIPSPackage Cooled:SOP8

Capacitor Table Table 1-1 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type.

8582F2Y

Vendor:PHILIPSPackage Cooled:SOP8

Capacitor Table Table 1-1 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type.

85830-102

85836

Vendor:RCAPackage Cooled:06+D/C:500

8584051-301

Vendor:N/APackage Cooled:DIP14D/C:N/A

An integrated 80-mA, 8-V regulator supplies voltage to the PVCC pin and it current limits at 200 mA typical when the output is shorted to ground. A capacitor (1 mF minimum) must be connected to the PVCC pin to stabilize the regulator output. The voltage on PVCC is supplied to the integrated bootstrap diode. PVCC is used to recharge the bootstrap capacitor and powers the SiP41110 low-side driver. PVCC p...

8584052-301

Vendor:N/APackage Cooled:DIP14D/C:N/A

Device Description The following information is provided: part number, semiconductor materials used, sequence of zones, technology used, device type and, if necessary con- struction. Also, information on the typical Applications and spe- cial Features is given Absolute Maximum Ratings The absolute maximum ratings indicate the maximum permissible operational and environmental condi- tions. Exceeding...

8584054-301

Vendor:N/APackage Cooled:DIP14D/C:N/A

TEMPERATURE PROTECTION The thermal protection shuts the LX8819 down when the junction temperature exceeds 140C. Each output has independent thermal shutdown capability. Exposure to absolute maximum rated conditions for extended periods may affect device reliability (See Thermal Considerations below).

8584054-301

Vendor:N/APackage Cooled:DIP14D/C:N/A

TEMPERATURE PROTECTION The thermal protection shuts the LX8819 down when the junction temperature exceeds 140C. Each output has independent thermal shutdown capability. Exposure to absolute maximum rated conditions for extended periods may affect device reliability (See Thermal Considerations below).

8584055-301

Vendor:N/APackage Cooled:DIP14D/C:N/A

Data flow from A to Y is controlled by the output-enable (OE) input. The device operates in the transparent mode when the latch-enable (LE) input is high. When LE is low, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE is high, the outputs are in the high-impeda...

8584056-301

Vendor:N/APackage Cooled:DIP14D/C:N/A

In case of over- or undervoltage at Pin VS, an internal timer is started. When the under- voltage delay time (tdUV, tdOV) programmed by the SCT bit is reached, the power supply fail bit (PSF) in the output register is set and all outputs are disabled. When normal volt- age is present again, the outputs are enabled immediately. The PSF bit remains high until it is reset by the SRR bit in the input register.

8584057-301

Vendor:N/APackage Cooled:DIP14D/C:N/A

The devices come in 8- and 10-bit resolution versions (see Figure 2 for data alignment between 8- and 10-bit versions). Within each resolution version there are three models, offer- ing three-line adaptive comb filtering, two-line adaptive

858430

85852ES001

The HS-800/810 Series of quartz crystal oscillators provide MECL 10K and 10KH series compatible signals in industry standard four-pin DIP hermetic packages.. Systems designers may now specify space-saving, cost-effective packaged ECL oscillators to meet their timing requirements.

858605

Vendor:MOTPackage Cooled:SOP16D/C:01+

This pin provides the bus load resistor with a path to ground which contributes less than 0.1 volts to the bus offset voltage when sinking the maximum current through one unit load resistor. The transceivers maximum bus leakage current contribution to VOL from the LOAD pin when in a loss of ground state is 50uA over all operating temperatures and 3.5 < VBAT < 18 volts .

85866912

85876-302

8587SH

Vendor:PAND/C:1793

The device is compatible with the JEDEC single power-supply Flash command set standard. Com- mands are written to the command register using standard microprocessor write timings, from where they are routed to an internal state-machine that controls the erase and programming circuits. De- vice programming is performed a byte at a time by executing the four-cycle Program Command. This initiates an i...

8592A

Vendor:BBPackage Cooled:MSOP10D/C:06+

DESCRIPTION The VND600PEP is a monolithic device made usingSTMicroelectronicsVIPowerM0-3 technology. It is intended for driving resistive or inductive loads with one side connected to ground. Active VCC pin voltage clamp protects the

8593T3

8594C2Y

In order to take advantageof the 4 point structure of the LCP, the TIP and RING lines go across the device. In such case, the device will eliminate the overvoltages generated by the parasitic induc- tances of the wiring (Ldi/dt), especially for very fast transients.

8594D2X

8594D2Y

Vendor:PHIPackage Cooled:00+D/C:5000

RING INDICATION. It is asserted LOW by the CH1817 during the 2 second ON portion of the incoming AC Ring Signal and is asserted HIGH during the 4 second idle period between rings. An envelope of the AC ring signal may be created using the application circuit shown in Figure 2.

8594D2Y

Vendor:PHIPackage Cooled:00+D/C:5000

RING INDICATION. It is asserted LOW by the CH1817 during the 2 second ON portion of the incoming AC Ring Signal and is asserted HIGH during the 4 second idle period between rings. An envelope of the AC ring signal may be created using the application circuit shown in Figure 2.

8594E2Y

Vendor:PHIPackage Cooled:00+D/C:5000

• Rated isolation voltage (RMS includes DC) VIOWM = 1000 VRMS (1450 V peak) • Rated recurring peak voltage (repetitive) VIORM = 1000 VRMS • Thickness through insulation 3 mm • Creepage current resistance according to VDE 0303/IEC 60112 Comparative Tracking Index: CTI 200 • Lead-free component • Component in accordance to RoHS 2002/95/EC and WEEE 2002/96/EC

8-598-551-10BTF-FJ317

Vendor:SONYPackage Cooled:高频头

8598C2Y

Package Cooled:08+D/C:800

The PI74FCT827/828T and the PI74FCT2827/2828T are 10-bit wide bus drivers providing high-performance bus interface buffering for wide address/data paths or buses carrying parity. The 10-bit buffers have NAND-ed output enables for maximum control flexibility. They are designed for high-capacitance load drive capability, while providing low-capacitance bus loading at both inputs and outputs. The PI74FCT82...

8598E2Y

Vendor:PHIPackage Cooled:SOP8D/C:N/A

S/H2 employs a current-summing architecture that subtracts the output of S/H1 (the offset) from the output of the CCD (offset+video) while acquiring only the difference signal (i.e., the valid video). A logic "0" subsequently applied to pin 12 drives S/H2 into its hold mode, and after a brief transient settling time, the valid video signal appears at pin 22 (V OUT).

8598E2Y

Vendor:PHIPackage Cooled:SOP8D/C:N/A

S/H2 employs a current-summing architecture that subtracts the output of S/H1 (the offset) from the output of the CCD (offset+video) while acquiring only the difference signal (i.e., the valid video). A logic "0" subsequently applied to pin 12 drives S/H2 into its hold mode, and after a brief transient settling time, the valid video signal appears at pin 22 (V OUT).

8598F2Y

Vendor:PHIPackage Cooled:SOP-3.9-8PD/C:6+

1 mega pixels (1152x864) format, used with 1/2 optical system Support sub-sampling at quarter (1/4) mega pixel resolution for higher video frame rate Progressive readout Output data format: 10-bit raw data Input interface: SIF Electronic exposure control On-chip 11-bit ADC On-chip PLL Correlated double sampling Video mode and DSC mode Dead pixel removal Flash control Power down mode Automa...

85AB80C156M

85B01

Vendor:105D/C:N/A

NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 3. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 4. All loading with 50 W to VCC - 2.0 volts. 5. VIHCMR min va...

85C060

Vendor:INTELPackage Cooled:685D/C:05+

85C20

DESCRIPTION The M74HC4075 is an high speed CMOS TRIPLE 3-INPUT OR GATE fabricated with silicon gate C2MOS technology. The internal circuit is composed of 4 stages including buffer output, which enables high noise immunity and stable output.

85C206

V+ - Is the higher voltage H-bridge supply. The MOSFETS obtain the drive current from this supply pin. The voltage on this pin is limited by the drive IC. The MOSFETS are rated at 100 volts. Proper by-passing to GND with sufficient capacitance to suppress any volt- age transients, and to ensure removing any drooping during switching, should be done as close to the pins of the module as possible.

85C211

85C215

Continuous Drain Current, VGS @10V Continuous Drain Current, VGS @10V Pulsed Drain Current (1) Power Dissipation Linear Derating Factor Linear Derating Factor ( PCB Mount, D2 ) (1) Gate-to- Source Voltage Single Pulse Avalanche Energy (2) Avalanche Current (1) Repetitive Avalanche Energy (1) Peak Diode Recovery dv/dt (3) Junction & Storage Temperature Range Soldering Temperature, for 10...

85C266

Vendor:NCRPackage Cooled:QFP-80D/C:99

Notes: (1) The ISR will operate at no load with reduced specifications. (2) The minimum input voltage required by the part is V out + 1.2 V or 3.1 V, whichever is greater., (3) The STBY* control (pin 3) has an internal pull-up and if it is left open circuit the module will operate when input power is applied. The open-circuit voltage is the input voltage, Vin . Refer to the application notes for other ...

85C30-8PC

85C402

Vendor:SISPackage Cooled:50D/C:N/A

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this public...

85C402

Vendor:SISPackage Cooled:50D/C:N/A

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this public...

85C406ALQ

Vendor:SISPackage Cooled:QFP

• The functionality of the device is similar to the TFDU6102 series. The IrDA compatible serial interface function is replacing the former program- ming method, guaranteeing a perfect IrDA stan- dardized and compliant programmability. The IRED current is programmable to different levels, no external current limiting resistor is necessary.

85C406ALQ

Vendor:SISPackage Cooled:QFP

• The functionality of the device is similar to the TFDU6102 series. The IrDA compatible serial interface function is replacing the former program- ming method, guaranteeing a perfect IrDA stan- dardized and compliant programmability. The IRED current is programmable to different levels, no external current limiting resistor is necessary.

85C476

D/C:92

The serializer enters the high-impedance mode when the DEN pin is driven low. This puts both driver output pins (DO+ and DOC) into a high-impedance state. When you drive DEN high, the serializer returns to its previous state, as long as all other control pins remain static (SYNC1, SYNC2, PWRDN, TCLK_R/F). When the REN pin is driven low, the deserializer enters high-impedance mode. Consequently, the receiv...

85C496

Vendor:SISPackage Cooled:QFPD/C:05+

An external capacitor C is charged and discharged by two cur- rent sources. Current source #2 is switched on and off by a flip- flop, while current source #1 is on continuously. Assuming that the flip-flop is in a state such that current source #2 is off, and the capacitor is charged with a current I, the voltage across the capacitor rises linearly with time. When this voltage rea...

85C496

Vendor:SISPackage Cooled:QFPD/C:05+

An external capacitor C is charged and discharged by two cur- rent sources. Current source #2 is switched on and off by a flip- flop, while current source #1 is on continuously. Assuming that the flip-flop is in a state such that current source #2 is off, and the capacitor is charged with a current I, the voltage across the capacitor rises linearly with time. When this voltage rea...

85C497

Vendor:SISPackage Cooled:QFPD/C:98+

Table 3.1 - LAN91C100FD Pin Requirements Table 5.1 - Internal I/O Space Mapping Table 7.1 - VL Local Bus Signal Connections Table 7.2 - High-End ISA or Non-Burst EISA Machines Signal Connectors Table 7.3 - EISA 32 Bit Slave Signal Connections Table 10.1 - 208 Pin QFP Package Parameters Table 10.2 - 208 Pin TQFP Package Outlines

85C501

Package Cooled:08+D/C:800

The following specifications apply for VIN= 14V; VSHUTDOWN = Open; ILOAD = 10mA; TA = +25˚C; COUT = 10µF, 0.5Ω < ESR < 4.0Ω; unless otherwise specified. Bold Values indicate −40˚C TA 125˚C. (Note 4, Note 5)

85C503

Vendor:SISPackage Cooled:50D/C:N/A

The YZD and YED packages are available in tape and reel. Add a R suffix (TPS62300YxDR) to order quantities of 3000 parts. Add a T suffix (TPS62300YxDT) to order quantities of 250 parts. The DRC package is available in tape and reel. Add a R suffix (TPS62300DRCR) to order quantities of 3000 parts. For the most current package and ordering information, see the Package Option Addendum at the end of this docu...

85C5121-IL

Vendor:ATMELPackage Cooled:PLCC52D/C:0345+

PRS initializes the read and write pointers to zero and sets the output register to all zeroes. During Partial Reset, the existing mode (IDT or FWFT), programming method (serial or parallel), and programmable flag settings are all retained. RT asserted on the rising edge of RCLK initializes the READ pointer to zero, sets the EF flag to LOW (OR to HIGH in FWFT mode) temporarily and does not disturb the write ...

85C5122-EM

Vendor:ATMELPackage Cooled:PLCC68D/C:0240+

85C64-20

Vendor:NDKPackage Cooled:CDIPD/C:03+

Similarly, the derived current reading, Id, is related to Ii by the expression, Id = Ii Kd/Ki or Ii = Id Ki/Kd, where Ki is the current proportionality constant specific to this design; it is calculated by dividing the CT turn ratio by the product of the current amplifier gain and the input burden resistance. For this application, based on a 5000-turn CT, the value of Ki works out to be approximately...

85C72

Vendor:MICROCHIPackage Cooled:754D/C:05+

These beam lead diodes are constructed using a metal- semiconductor Schottky barrier junction. Advanced epitaxial techniques and precise process control insure uniformity and repeatability of this planar passivated microwave semicon- ductor. A nitride passivation layer provides immunity from contaminants which could otherwise lead to IR drift.

85C72

Vendor:MICROCHIPackage Cooled:754D/C:05+

These beam lead diodes are constructed using a metal- semiconductor Schottky barrier junction. Advanced epitaxial techniques and precise process control insure uniformity and repeatability of this planar passivated microwave semicon- ductor. A nitride passivation layer provides immunity from contaminants which could otherwise lead to IR drift.

85C72I/P

Vendor:MICROCHIP

Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2Pak is...

85C7603

Vendor:EXARPackage Cooled:852D/C:05+

DESCRIPTION Transil diode arrays provide high overvoltage pro- tection by clamping action. Their instantaneous re- sponse to transient overvoltages makes them particularly suited to protect voltage sensitive de- vices such as MOS Technology and low voltage supplied ICs. The ITA series allies high surge capability against energetic pulses with high voltage performance against ESD.

85C7603

Vendor:EXARPackage Cooled:852D/C:05+

DESCRIPTION Transil diode arrays provide high overvoltage pro- tection by clamping action. Their instantaneous re- sponse to transient overvoltages makes them particularly suited to protect voltage sensitive de- vices such as MOS Technology and low voltage supplied ICs. The ITA series allies high surge capability against energetic pulses with high voltage performance against ESD.

85C82

Vendor:MICROCHIPackage Cooled:654D/C:05+

the device has a Sector Group Protect function which hardware write protects selected sector groups. The sector group protect and unprotect features can be enabled in a PROM programmer. Temporary Sector Unprotect, which requires a high voltage, allows in-system erasure and code changes in previously protected sectors.

85C82

Vendor:MICROCHIPackage Cooled:654D/C:05+

the device has a Sector Group Protect function which hardware write protects selected sector groups. The sector group protect and unprotect features can be enabled in a PROM programmer. Temporary Sector Unprotect, which requires a high voltage, allows in-system erasure and code changes in previously protected sectors.

85C82I/SM

Package Cooled:28D/C:2005

85C82I/SM

Package Cooled:28D/C:2005

85C82I/SN

Vendor:MICROCHIPPackage Cooled:2005D/C:500

The ZL30414 accepts a CMOS compatible reference at 19.44 MHz and generates four LVPECL differential output clocks at 622.08 MHz, a CML differential clock at 155.52 MHz and a single-ended CMOS clock at 19.44 MHz. The output clocks can be individually enabled or disabled. The ZL30414 provides a LOCK indication.

85C82I/SN

Vendor:MICROCHIPPackage Cooled:2005D/C:500

The ZL30414 accepts a CMOS compatible reference at 19.44 MHz and generates four LVPECL differential output clocks at 622.08 MHz, a CML differential clock at 155.52 MHz and a single-ended CMOS clock at 19.44 MHz. The output clocks can be individually enabled or disabled. The ZL30414 provides a LOCK indication.

85C82IP

Example 2 An unbalanced power supply is often used with power amplifiers to allow a large unipolar output voltage. A +70V/C5V power supply is used with the OPA502 to drive a 30Ω load connected to ground. What is the worst case power dissipation and SOA requirement?

85C92/P

Vendor:MICROCHIPPackage Cooled:DIP8D/C:92+

has a pull down resistor to force the part into LDO mode when a clock signal is not present. To place the NCP1501 in LDO mode, the user must set the Synchronization pin low. The LDO mode guarantees an output in excess of 50 mA. Pins CB0 and CB1 control the output voltage selection. The four voltages are 1.05 V, 1.35 V, 1.57 V, 1.8 V. CB0 contains a pull down resistor and CB1 contains a pull up resist...

85C92E/P

Vendor:44Package Cooled:96/98+D/C:DIP8

A temperature measurement is also initiated every time the one-shot method is used. This method requires the user to write to the One-Shot bit in the configuration register when a temperature measurement is needed. Setting the One-Shot bit to a 1 will start a temperature conversion directly after the write operation. The track-and-hold goes into hold approxi- mately 4 µs (monostable timeout) after...

85C92I/SM

Vendor:MICROCHIPPackage Cooled:SMDD/C:97+

Loss of Lock indicator output. Asserted when internal PLL is not tracking the input reference for frequency and phase. 3 Logic 1 indicates loss of lock. Logic 0 indicates locked condition. Narrow Bandwidth enable. LVCMOS/LVTTL: Logic 1 - Narrow loop bandwidth, RIN = 2100kΩ. Logic 0 - Wide bandwidth, RIN = 100kΩ. Internal nodes. Connection to these pins can cause erratic device operation.

85C92-I/SM

Vendor:187Package Cooled:97+D/C:SMD8

Std., A, C, and D grades Low input and output leakage 1µA (max.) CMOS power levels True TTL input and output compatibility: C VOH = 3.3V (typ.) C VOL = 0.3V (typ.) High Drive outputs (-15mA IOH, 48mA IOL) Meets or exceeds JEDEC standard 18 specifications Military product compliant to MIL-STD-883, Class B and DESC listed (dual marked) Power off disable outputs permit "live insertion" ...

85CNQ015APBF

Vendor:VISHAYPackage Cooled:N/AD/C:08+

The MAX3275/MAX3277 are transimpedance amplifiers designed for up to 2.125Gbps fibre channel applica- tions. A functional diagram of the MAX3275/MAX3277 is shown in Figure 1. The MAX3275/MAX3277 comprises a transimpedance amplifier stage, a voltage amplifier stage, an output buffer, and a direct-current feedback cancellation circuit.

85CNQ015ASL

Vendor:IRPackage Cooled:SMDD/C:01+

Note 1: The maximum power dissipation for these devices must be derated at elevated temperatures and is dictated by TJMAX, JA, and the ambient temperature, TA. The maximum available power dissipation at any temperature is PD =(TJMAX−TA)/JA or the 25˚C PdMAX, whichever is less.

85CNQ015ASM

Vendor:IORPackage Cooled:D61-8-SMD/C:2006

Programmable teletax signal generation (12 kHz or 16 kHz) FSK generator Two programmable chopper clocks Master clock frequency selectable: 1.536 MHz, 1.544 MHz, 2.048 MHz, 3.072 MHz, 3.088 MHz, 4.096 MHz, 6.144 MHz, 6.176 MHz or 8.192 MHz Advanced test capabilities - 3 analog loopback tests - 5 digital loopback tests - Level metering function High analog driving capability (300 Ω AC) TTL and C...

85CNQ015ASM

Vendor:IORPackage Cooled:D61-8-SMD/C:2006

Programmable teletax signal generation (12 kHz or 16 kHz) FSK generator Two programmable chopper clocks Master clock frequency selectable: 1.536 MHz, 1.544 MHz, 2.048 MHz, 3.072 MHz, 3.088 MHz, 4.096 MHz, 6.144 MHz, 6.176 MHz or 8.192 MHz Advanced test capabilities - 3 analog loopback tests - 5 digital loopback tests - Level metering function High analog driving capability (300 Ω AC) TTL and C...

85CNQ015SL

reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDTs CMOS high-performance technology, these devices typically operate on only 400mW of power. The 85CNQ015SL is packaged in a ceramic 84-pin PGA, an 84-Pin PLCC and a 100-pin Thin Quad Flatpack.

85CNQ015SL

reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDTs CMOS high-performance technology, these devices typically operate on only 400mW of power. The 85CNQ015SL is packaged in a ceramic 84-pin PGA, an 84-Pin PLCC and a 100-pin Thin Quad Flatpack.

85CNQ045

Vendor:1380D/C:N/A

85CNQ045

Vendor:1380D/C:N/A

85CNQ45

85DKLM

Vendor:NSPackage Cooled:SOP

85EPF04

Vendor:IRPackage Cooled:TOD/C:05/06无铅

High Voltage Electrically Isolated by DBC Ceramic ( Al 2 O 3) 3500 V RMS Isolating Voltage Industrial Standard Package High Surge Capability Glass Passivated Chips Modules uses High Voltage Power diodes in four Basic Configurations Simple Mounting UL E78996 approved

85EPF12

Vendor:IRPackage Cooled:TOD/C:05/06无铅

• QPSK demodulator, PCM decoder, digital filters, D/A converters, and operational amplifiers integrated on a single chip. • The number of required external components has been reduced and adjustment-free operation achieved in the QPSK demodulator by implementing that block as a digital circuit on a single chip. • CPU interface using an I2C bus • Interface circuits for CORTE...

85F8967

Vendor:PHILIPSPackage Cooled:PLCC20

Diode protected input stage for power OFF condition 17 ns typ high speed TTL compatible g10 mV or g25 mV input sensitivity g3V input common-mode range High input impedance with normal VCC or VCC e 0V Strobes for channel selection Dual circuits Sensitivity gntd over full common-mode range Logic input clamp diodes meets both A and B version specifications g5V standard supply voltages

85F8967

Vendor:PHILIPSPackage Cooled:PLCC20

Diode protected input stage for power OFF condition 17 ns typ high speed TTL compatible g10 mV or g25 mV input sensitivity g3V input common-mode range High input impedance with normal VCC or VCC e 0V Strobes for channel selection Dual circuits Sensitivity gntd over full common-mode range Logic input clamp diodes meets both A and B version specifications g5V standard supply voltages

85F8968

Vendor:PHILIPSPackage Cooled:PLCC20

Momentary action pushbuttons are used as control inputs in this case. This allows the user to experiment with the operation of the motor. An ELM410 is used to debounce the switches, so that the mechanical bouncing of the switches does not cause multiple steps of the motor armature.

85G1700

Vendor:WAVEPackage Cooled:QFPD/C:98+

The MSM514262 supports three types of operation : random access to RAM port, high speed serial access to SAM port and bidirectional transfer of data between any selected row in the RAM port and the SAM port. In addition to the conventional multiport DRAM operating modes, the MSM514262 features the block write and flash write functions on the RAM port and a split data transfer capability on the SAM port. The...

85H5987

Vendor:IBMPackage Cooled:50D/C:N/A

Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: Supply current specification includes loads on each gate as in Figure 1a. Actual supply currents vary with operating frequency, operating voltages, V5 load, slew rates and type of external FET. Note 3: The 85H5987E is guaranteed to meet performance specifications from 0C to 70C. Specifications from ...

85H9533

Vendor:IBMPackage Cooled:50D/C:N/A

HY5V56B(L)F is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.