Index "9"Vendor:FPackage Cooled:DIP16陶瓷D/C:84+
Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Vendor:FAIRCHILDPackage Cooled:79D/C:DIP-16
The only external RF components needed for the transceiver are the antenna and its matching components. Antennas presenting an impedance in the range of 35 to 72 ohms resistive can be satisfacto- rily matched to the RFIO pin with a series matching coil and a shunt matching/ESD protection coil. Other antenna impedances can be matched using two or three components. For some impedances, two inductors and a capac...
Vendor:NS
ON Semiconductor andare registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circu...
Vendor:FPackage Cooled:DIP16陶瓷D/C:80+
Track: This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage from 0 V up to the nominal set-point voltage. Within this range the output will follow the voltage at the Track pin on a volt-for-volt basis. When the control voltage is ra...
Vendor:FPackage Cooled:DIP/16
The evaluation fixture includes a Centronics connector, CN003, thatis used to connect to a PC parallel port or an alternative host controller. This connector is utilized to access the serial control port of the PCM1742. The serial control port is used to program the PCM1742s internal registers. A standard printer cable is used to connect CN003 of the evaluation fixture to a PC parallel port. The port si...
Vendor:TECATED/C:3000
This data sheet has been carefully CORPORATION • 5980 NORTH SHANNON ROADassumed for possible inaccuracies • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739APEX MICROTECHNOLOGY checked and is believed to be reliable, however, no responsibility•is TUCSON, ARIZONA 85741 or omissions. All specifications are subject to change without notice.
Vendor:FPackage Cooled:DIP16陶瓷D/C:78+
Vendor:FPackage Cooled:DIPD/C:07+
1. MTTF calculator available at http://www.freescale.com/rf. Select Tools/Software/Application Software/Calculators to access the MTTF calculators by product. 2. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf. Select Documentation/Application Notes - AN1955. 3. Part is internally matched both on input and output.
Vendor:FAIRCHILD
21821-009-DTS Rev ADQ# 2011 All technical information is believed to be accurate, but no responsibility is assumed for errors or omissions. Interpoint reserves the right to make changes in products or specifications without notice. HR120 Series is a trademark of Interpoint. Copyright © 1994 - 1999 Interpoint. All rights reserved.
Vendor:FAIRCHILD
21821-009-DTS Rev ADQ# 2011 All technical information is believed to be accurate, but no responsibility is assumed for errors or omissions. Interpoint reserves the right to make changes in products or specifications without notice. HR120 Series is a trademark of Interpoint. Copyright © 1994 - 1999 Interpoint. All rights reserved.
Vendor:FPackage Cooled:32D/C:N/A
Push-button Reset Input (MR). A logic low on MR asserts the reset output. Reset remains as- serted as long as MR is low and for trec after MR returns high. This active-low input has an internal 52kΩ pull-up. It can be driven from a TTL or CMOS logic line, or shorted to ground with a switch. Leave open if unused. Watchdog Input (WDI). If WDI remains high or low for at least 1.6sec, the internal ...
Due to the finite switching time of the fast MUX in the MAX4358, the OSDFILL signal emerges slightly delayed from the OSDKEY signal. This results in a slightly delayed OSDFILL graphic with a trailing black level (0 IRE) equal in width to the switch delay time (as shown in Figure 1). This effect may be objectionable in applications that display all white characters, due to the high contrast between the white...
Vendor:FPackage Cooled:CDIP16尖D/C:8040
The accelerated program (ACC) feature allows the system to program the device at a much faster rate. When ACC is pulled high to VHH, the device enters the Unlock Bypass mode, enabling the user to reduce the time needed to do the program operation. This feature is intended to increase factory throughput during sys- tem production, but may also be used in the field if de- sired.
The g-cell is a mechanical structure formed from semiconductor materials (polysilicon) using semiconductor processes (masking and etching). It can be modeled as a set of beams attached to a movable central mass that move between fixed beams. The movable beams can be deflected from their rest position by subjecting the system to an acceleration (Figure 2).
The g-cell is a mechanical structure formed from semiconductor materials (polysilicon) using semiconductor processes (masking and etching). It can be modeled as a set of beams attached to a movable central mass that move between fixed beams. The movable beams can be deflected from their rest position by subjecting the system to an acceleration (Figure 2).
Vendor:NSD/C:90+
• Drives N-channel High-Side and Low-Side MOSFETs in a synchronous buck configuration • 12V High-Side and 12V Low-Side Drive • Internal Adaptive Shoot-Through Protection • Integrated Bootstrap Diode for High-Side Drive • Fast rise and fall times • Switching Frequency Up to 500kHz • OD input for Output Disable C allows for synchronization with PWM contro...
Package Cooled:SMD
Cathode-to-Anode Voltage Continuous Forward Current Continuous Forward Current Single Pulse Forward Current Maximum Single Pulse Avalanche Current ‚ Non-Repetitive Avalanche Energy ‚ Maximum Power Dissipation Maximum Power Dissipation Operating Junction and Storage Temperature Range Soldering Temperature, for 10 sec.
Package Cooled:05+D/C:SMD
Vendor:NSPackage Cooled:SMD-16D/C:00+
Implementing your design has never been easier than with PSDsoft STs software development suite. Using PSDsoft, you can do the following: • Configure your PSD3XX to work with virtually any microcontroller • Specify what you want implemented in the programmable logic using a high-level Hardware Description Language (HDL) • Simulate your design • Download your design to the p...
Note A: All data listed in the above graphs has been developed from actual products tested at 25C. This data is considered typical data for the DC-DC Converter. Note B: SOA Curves represent operating conditions at which internal components are at or below manufacturers maximum rated operating temperatures.
Vendor:FPackage Cooled:DIP22陶瓷D/C:86+
The bq4802Y/bq4802LY real-time clock is a low-power microprocessor peripheral that integrates a time-of- day clock, a century-based calendar, and a CPU super- visor, with package options including a 28-pin SOIC, TSSOP, or SNAPHAT that requires the bq48SH-28x6 to complete the two-piece module. The bq4802Y/ bq4802LY is ideal for fax machines, copiers, industrial control systems, point-of-sale terminals...
PAE and PAF flags can be programmed independently to switch at any point in memory. Programmable offsets mark the location within the internal memory that activates the PAE and PAF flags and can only be programmed serially. To program the offsets, set SEN active and data can be loaded via the Serial Input (SI) pin at the rising edge of SCLK. To read out the offset registers serially, set SREN active and dat...
Vendor:FPackage Cooled:DIP16陶瓷D/C:84+
Vendor:NSPackage Cooled:DIPD/C:8716
The GS82032 is an SCD (Single Cycle Deselect) pipelined synchronous SRAM. DCD (Dual Cycle Deselect) versions are also available. SCD SRAMs pipeline deselect commands one stage less than read commands. SCD RAMs begin turning off their outputs immediately after the deselect command has been captured in the input registers.
Vendor:NSCD/C:98
Vendor:N/APackage Cooled:DIPD/C:07+
Specifications Outline Dimensions Pin Connections and Short Descriptions Pin Descriptions Power Supply Pins Analog Audio Pins Other Pins Pin Configuration Pin Circuits Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions Characteristics
After application of the VCC supply, an initial pause of 200 µs is required followed by a minimum of eight initialization cycles (any combination of cycles contain- ing a RAS signal). During power-on, it is recommended that RAS track with VCC or be held at a valid VIH to avoid current surges.
Vendor:STPackage Cooled:SOP
Vendor:STPackage Cooled:SOP
HUSH LITTLE BABY LITTLE STAR LONDON BRIDGE DREAM OF HOME AND MOTHER CHRISTMAS CAROL ARE YOU SLEEPING THE FARMAER IN THE DELL IN A PERSIAN MARKET A LITTLE LAMB LONG LONG AGO SANTA LUCIA LITTLE BROWN JUG BUTTERFLY THE TRAIN IS RUNNING FAST CLOSE ENCOUNTERS OF THIRD KIND
Vendor:PHIPackage Cooled:DIP52D/C:07+
Vendor:PHIPackage Cooled:DIP52D/C:07+
Vendor:PHIPackage Cooled:DIP52D/C:07+
Vendor:PHIPackage Cooled:DIP52D/C:07+
Vendor:PHIPackage Cooled:DIP52D/C:07+
Vendor:STPackage Cooled:05+D/C:SOP-24
Vendor:STPackage Cooled:SOPD/C:06+
between the two supply inputs is + 8.0 volts while the minimum voltage difference is +4.5 volts. All input levels are referenced to the negative supply input, CV. The volt- age applied to any Dallastat terminal must not exceed the negative supply voltage (CV ) by C0.5 or the positive sup- ply voltage (+V) by + 0.5 volts. The minimum logic high level must be +2.4 volts with reference to the CV supply v...
Vendor:NSPackage Cooled:SMD
Vendor:FSCPackage Cooled:7827+D/C:DIP-14磁丰
D/C:1829
† All typical values are at VCC = 5 V, TA = 25C. ‡ Applies only to the -1 version and only if VCC is between 4.75 V and 5.25 V For I/O ports, the parameters IIH and IIL include the off-state output current. ¶ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
D/C:1829
† All typical values are at VCC = 5 V, TA = 25C. ‡ Applies only to the -1 version and only if VCC is between 4.75 V and 5.25 V For I/O ports, the parameters IIH and IIL include the off-state output current. ¶ The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
Vendor:ONPackage Cooled:DIPD/C:06+
Vendor:InfineonPackage Cooled:SIP—TAB7D/C:07+
A Hysteresis with 30% PWM duty cycle (when THRESHOLD = 0) is introduced to maintain constant cooling when the thermistor cools from 10K (approx. 25 C) to down 15K (approx. 20 C). This reduces on/off cycling for small temperature fluctuation.
Vendor:InfineonPackage Cooled:SIP—TAB7D/C:07+
A Hysteresis with 30% PWM duty cycle (when THRESHOLD = 0) is introduced to maintain constant cooling when the thermistor cools from 10K (approx. 25 C) to down 15K (approx. 20 C). This reduces on/off cycling for small temperature fluctuation.
Vendor:0Package Cooled:07+D/C:5000
Package Cooled:07+D/C:800
Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representa...
Vendor:NSPackage Cooled:SOP-14D/C:9842/SX
Vendor:NSPackage Cooled:SOICD/C:06+
a watchdog timer (except for STM704/795/806) as well as a power-fail comparator (except for STM795) to provide the system with an early warning of impending power failure. These devices are available in a standard 8-pin SOIC package or a space-saving 8-pin TSSOP package.
Vendor:NSPackage Cooled:SOICD/C:06+
a watchdog timer (except for STM704/795/806) as well as a power-fail comparator (except for STM795) to provide the system with an early warning of impending power failure. These devices are available in a standard 8-pin SOIC package or a space-saving 8-pin TSSOP package.
Vendor:N/APackage Cooled:N/AD/C:08+09+
• Surface Mount SOT-23/ SOT-143 Package • High Detection Sensitivity: up to 50 mV/µW at 915 MHz up to 35 mV/µW at 2.45 GHz up to 25 mV/µW at 5.80 GHz • Low Flicker Noise: -162 dBV/Hz at 100 Hz • Low FIT (Failure in Time) Rate* • Tape and Reel Options Available
Vendor:STPackage Cooled:SOP14D/C:06+
TXCLK is a clock output used to receive the data on the TXD from the MAC or network processor to the HSP3824, synchronously. Transmit data on the TXD bus is clocked into the HSP3824 on the falling edge. The clocking edge is also programmable to be on either phase of the clock. The rate of the clock will be depending upon the modulation type and data rate that is programmed in the signalling field of ...
Vendor:MICROCHIPPackage Cooled:32D/C:N/A
Limits in standard typeface are for TJ = 25˚C and limits in boldface type apply over the full Operating Temperature Range. Unless otherwise specified, C1 = CIN = CHOLD = 1 µF, VIN = 3.6V, VDIODE = 3.6V, RSET = 332Ω, BRGT pin = 0V.
Vendor:MICROCHIPPackage Cooled:32D/C:N/A
Power supply voltage Power supply current (including analog outputs)1 Power supply current (including analog outputs)2 Input clock frequency SCL clock frequency Analog video output load DAC gain resistor Ambient operating temperature
Vendor:n/aPackage Cooled:QFP132D/C:06+
Vendor:AMIPackage Cooled:SOP28D/C:03+04
BURST CONFIGURATION COMMAND: The Program Burst Configuration Register command is used to program the burst configuration register. The burst configuration register determines several parameters that control the read operation of the device. Bit B15 determines whether synchronous burst reads are enabled or asynchronous reads are enabled. Since the page read operation is an asynchronous operation, bit B15 mu...
Vendor:AMIPackage Cooled:SOP28D/C:03+04
BURST CONFIGURATION COMMAND: The Program Burst Configuration Register command is used to program the burst configuration register. The burst configuration register determines several parameters that control the read operation of the device. Bit B15 determines whether synchronous burst reads are enabled or asynchronous reads are enabled. Since the page read operation is an asynchronous operation, bit B15 mu...
Vendor:MOTPackage Cooled:32D/C:N/A
BuiltCin interface for PC/XT™/AT® or compatible busses Interface to serial EEPROM for Node ID and configura- tion storage allows construction of jumperless, electroni- callyCconfigurable adapters Automatic polarity correction on twistedCpair 10BASECT receive twistedCpair cable
Vendor:NORTECPackage Cooled:QFP
The 24XX128 supports a bidirectional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter and a device receiving data as a receiver. The bus must be controlled by a master device which generates the serial clock (SCL), controls the bus access and generates the Start and Stop conditions while the 24XX128 works as a slave. Both master and slave ca...
Vendor:MOTOROLAPackage Cooled:SMD24D/C:06+
After a power-on reset, the output is inactive for half an oscillator cycle. During this time, the supply voltage capacitor can be charged so that current limitation is guaranteed in the event of a short-circuit when the IC is switched on for the first time.
Vendor:MOTPackage Cooled:SOP28WD/C:2007+
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC.
Vendor:STPackage Cooled:SMD16D/C:06+
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
Vendor:MICPackage Cooled:SOP-8
The following charts show measured performance of the PA module in low-power mode (Vmode = +2.0V) at +16dBm output power and over a range of supply voltages from 3.4V nominal down to 1.2V. Power-added efficiency is more than doubled from 9.5 percent to nearly 25 percent (Vcc = 1.2V) while maintaining a typical ACPR1 of C52dBc and ACPR2 of less than C61dBc.
Vendor:MICPackage Cooled:SOP-8
The following charts show measured performance of the PA module in low-power mode (Vmode = +2.0V) at +16dBm output power and over a range of supply voltages from 3.4V nominal down to 1.2V. Power-added efficiency is more than doubled from 9.5 percent to nearly 25 percent (Vcc = 1.2V) while maintaining a typical ACPR1 of C52dBc and ACPR2 of less than C61dBc.
Vendor:ITTPackage Cooled:DIP14陶瓷D/C:70+
Requiring 15V and +5V supplies, the ADS-930 typically dissipates 3.5 Watts. The unit is offered with a bipolar input range of 5V or a unipolar input range of 0 to C10V. Models are available for use in either commercial (0 to +70C) or military (C55 to +125C) operating temperature ranges. Typical applications include radar, sonar, medical/graphic imaging, and FFT spectrum analysis.
Vendor:InfineonD/C:02-03+
Package Cooled:04+D/C:SOP
Package Cooled:04+D/C:SOP
Package Cooled:99+
CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures. UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation. SABER© is a Copyright of Analogy Inc. http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
Vendor:MOTOROLAD/C:O9+
Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 34mH, IAS = 6.4A, VDD = 50V, RG = 25 Ω, Starting TJ = 25C 3. ISD 6.0A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature
Vendor:MOTOROLAD/C:O9+
Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 34mH, IAS = 6.4A, VDD = 50V, RG = 25 Ω, Starting TJ = 25C 3. ISD 6.0A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature
Vendor:MICROCHIPackage Cooled:SOP8D/C:06+
Vendor:0Package Cooled:07+D/C:2888
Vendor:N/APackage Cooled:220D/C:N/A
The MAX2338 receiver RF front-end IC is designed for dual-band CDMA cellular phones and can also be used in dual-band TDMA, GSM, or EDGE cellular phones. Thanks to the MAX2338s on-chip low-power LO divider, the cellular VCO module can be eliminated. The MAX2338 includes a low-noise amplifier (LNA) with an adjustable high-input third-order intercept point (IIP3) to minimize intermodulation and cross-modulatio...
Vendor:N/APackage Cooled:220D/C:N/A
The MAX2338 receiver RF front-end IC is designed for dual-band CDMA cellular phones and can also be used in dual-band TDMA, GSM, or EDGE cellular phones. Thanks to the MAX2338s on-chip low-power LO divider, the cellular VCO module can be eliminated. The MAX2338 includes a low-noise amplifier (LNA) with an adjustable high-input third-order intercept point (IIP3) to minimize intermodulation and cross-modulatio...
Vendor:FPackage Cooled:DIP/16
Port 3: Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. Port 3 pins that have 1s written to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally pulled low will source current because of the internal pull-ups. Port 3 also serves the special features of the 80C51 family, as listed below.
Vendor:MOTOROLAPackage Cooled:TSSOP14D/C:98+
On receipt of PWM signal start instruction, turn-on signal for forced commutation (commutation irrespective of the motors rotor position) is driven onto pins 15 to 17 and pins 19 to 21, and the motor starts to rotate. The motors rotation causes induced voltage on winding wire pin for each phase. When signals indicating positive or negative for pin voltage (including induced voltage) for each phase are app...
Package Cooled:99+
Macrovision Rev 1.0 (525 p/625 p)* CGMS-A (525 p) Standard Definition Programmable Features 8 Oversampling (108 MHz) Internal Test Pattern Generator (Color Bars, Black Bar) Controlled Edge Rates for Sync, Active Video Individual Y and UV Output Delay Gamma Correction Digital Noise Reduction Multiple Chroma and Luma Filters Luma-SSAF™ Filter with Programmable Gain/ Attenuation UV SSA...
Vendor:n/aPackage Cooled:PLCC52D/C:06+
Vendor:MOTPackage Cooled:30D/C:N/A
The AD581 can also be used in a two-terminal mode to develop a positive reference. VIN and VOUT are tied together and to the positive supply through an appropriate supply resistor. The per- formance characteristics will be similar to those of the negative two-terminal connection. The only advantage of this connection over the standard three-terminal connection is that a lower pri- mary supply can be used...
Vendor:MOTPackage Cooled:30D/C:N/A
The AD581 can also be used in a two-terminal mode to develop a positive reference. VIN and VOUT are tied together and to the positive supply through an appropriate supply resistor. The per- formance characteristics will be similar to those of the negative two-terminal connection. The only advantage of this connection over the standard three-terminal connection is that a lower pri- mary supply can be used...