AT49BV8192AT-70TI

Vendor:ATD/C:01+

to the class H requirement, but does not include element evaluation. Both grades are tested to meet the complete group A test specification over the full military temperature range with no derating. Variations in electrical, mechanical and screen requirements can be accommodated. Contact Advanced Analog for special require- ments.

AT49BV8192AT-90CI

Vendor:ATMELD/C:06+

Hynix HYMD232726(L)8-K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous opera- tions referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipel...

AT49BV8192AT-90TI

Vendor:ATMELPackage Cooled:TSOP-48D/C:2004

• HIGH PERFORMANCE E2CMOS® TECHNOLOGY fmax = 200 MHz Maximum Operating Frequency tpd = 4.0 ns Propagation Delay TTL Compatible Inputs and Outputs Electrically Erasable and Reprogrammable Non-Volatile 100% Tested at Time of Manufacture Unused Product Term Shutdown Saves Power • IN-SYSTEM PROGRAMMABLE Increased Manufacturing Yields, Reduced Time-to- Market and Improved Product Qu...

AT49BV8192T-11RC

AT49BV8192T-12RI

AT49BV8192T-12TC

Vendor:ATMELPackage Cooled:TSSOP48D/C:99+

Minimum Breakdown Voltage: The minimum voltage the device will exhibit at a specified current Working Peak Reverse Voltage: The maximum peak voltage that can be applied over the operating temperature range Average Rectified Output Current: Output Current Averaged over a full cycle with a 50 Hz or 60 Hz sine-wave input and a 180 degree conduction angle Maximum Forward Voltage: The maximum forward voltage the...

AT49BV8192T-12TC

Vendor:ATMELPackage Cooled:TSSOP48D/C:99+

Minimum Breakdown Voltage: The minimum voltage the device will exhibit at a specified current Working Peak Reverse Voltage: The maximum peak voltage that can be applied over the operating temperature range Average Rectified Output Current: Output Current Averaged over a full cycle with a 50 Hz or 60 Hz sine-wave input and a 180 degree conduction angle Maximum Forward Voltage: The maximum forward voltage the...

AT49BV8192T12TI

Vendor:ATPackage Cooled:1000D/C:00+

AT49BV8192T-12TI

The HYS 64V8301 is an industry standard 168-pin 8-byte Dual in-line Memory Module (DIMM) which is organized as 8M 64 in an one bank high speed memory arrays designed with 128 Mbit Synchronous DRAMs for non-parity applications. The DIMMs use -7.5 speed sorted 4M 16 SDRAM devices in TSOP54 packages to meet the PC133-333 requirements and -8 parts for the standard PC100 applications. Decoupling capacitors a...

AT49BV8192T-70TI

AT49BV8192T-90I

AT49BV8194A

Buffered Clock Output This pin provides a buffered output of the 14.31818 MHz crystal input frequency for other devices and remains active at all times (including power-down). The output can also be selected to be other frequencies (see Registers and Programming).

AT49BV8194A

Buffered Clock Output This pin provides a buffered output of the 14.31818 MHz crystal input frequency for other devices and remains active at all times (including power-down). The output can also be selected to be other frequencies (see Registers and Programming).

AT49C010A-90JI

Vendor:ATMELD/C:07+

AT49DB081B-CNU

Vendor:ATMEL

AT49DB081B-CNU

Vendor:ATMEL

AT49F/BV512

Adjustage of stand-by SW (1) Since VCC can directly be controlled to on or off by the microcomputer, the switching relay can be omitted. (2) Since the control current is microscopic, the switching relay of small current capacity is satisfactory for switching

AT49F001-12JC

Vendor:ATMELPackage Cooled:PLCC32D/C:08+

All signals are TTL levels, including programming sig- nals. Bit locations may be programmed singly, in blocks, or at random. The Am27C256 supports AMDs Flashrite programming algorithm (100 µs pulses) resulting in typi- cal programming time of 4 seconds.

AT49F001-12JI

Vendor:ATMELPackage Cooled:PLCC32D/C:01+

DAC full scale current control. A resistor connected between this pin and GND sets the magnitude of the video output current. An internal loop amplifier controls a reference current flowing through this resistor so that the voltage across it is equal to the Vref voltage. This reference current has a weighting equal to 20.8 LSBs.

AT49F001-55JC

Vendor:ATMELPackage Cooled:PLCC32D/C:01+

The manufacturer and device codes can be accessed by software or hardware operation. In the software access mode, a six-byte command sequence can be used to access the product ID. A read from address 0000H outputs the manufacturer code (DAh). A read from address 0001H outputs the device code (C8h). The product ID operation can be terminated by a three-byte command sequence.

AT49F001-55JI

Vendor:ATMELPackage Cooled:PLCC32D/C:01+

In a given application, the magnitude of peak-to-peak jitter at the phase detector will usually increase as the R divider is increased. If the LOL pin will be used to detect an unusual clock condition, or a clock fault, the MR_SEL1:0 pins should be set to provide a phase detector frequency of 5MHz or greater (the phase detector frequency is equal to Fin divided by the R divider). Otherwise, false LOL ...

AT49F001-55PC

Vendor:ATMELPackage Cooled:DIP-32D/C:1998

• Changed DC current. • Changed of CL2 tSAC from 6ns to 7ns and CL3 tSAC from 6.5ns to 7ns for -75 part. • Changed of CL2 tSAC from 6.5ns to 8ns and CL1 tSAC from 18ns to 20ns for -1L part. • Changed of tOH from 3ns to 2.5ns. • Changed of tSS from 2.5ns to 2.0ns for -75 part and from 3.0ns to 2.5ns for -1L part. • Integration of VDDQ 1.8V device and 2.5V device. • ...

AT49F001-55PC

Vendor:ATMELPackage Cooled:DIP-32D/C:1998

• Changed DC current. • Changed of CL2 tSAC from 6ns to 7ns and CL3 tSAC from 6.5ns to 7ns for -75 part. • Changed of CL2 tSAC from 6.5ns to 8ns and CL1 tSAC from 18ns to 20ns for -1L part. • Changed of tOH from 3ns to 2.5ns. • Changed of tSS from 2.5ns to 2.0ns for -75 part and from 3.0ns to 2.5ns for -1L part. • Integration of VDDQ 1.8V device and 2.5V device. • ...

AT49F001-55PI

Vendor:ATMELPackage Cooled:DIP32D/C:03+

Applications include transducer amplifiers, dc amplification blocks, and all the conventional operational amplifier circuits that now can be implemented more easily in single-supply-voltage systems. For example, these devices can be operated directly from the standard 5-V supply used in digital systems and easily provide the required interface electronics without additional 5-V supplies.

AT49F001-55TI

Several register bits (bit 0 to bit 93) are used to control circuit operation and to adapt certain circuit parameters to the specific application. The control bits are organized in two 8-bit and three 24-bit registers that can be programmed by the 3-wire bus protocol. The bus protocol and the bit-to-register mapping is described in the section 3-wire Bus Description on page 20. The meaning of the control b...

AT49F001-55VI

Vendor:ATMELPackage Cooled:VSOP-32D/C:2001

When asserted, the multiphy enable signal converts the UTOPIA interface to be fully compliant with the UTOPIA level-2 specification. In this mode, the TXADDR[1:0] and RXADDR[1:0] bits determine the address of the device to be addressed. The default operation of the chip is in single-phy UTOPIA level-1 mode. MPHYEN pin has an integral pull- down resistor. Pin #: 49

AT49F001-70JI

Vendor:ATMELPackage Cooled:PLCC32D/C:01+

NOTES: 1. Dimensions are in inches. 2. Metric equivalents are given for general information only. 3. Unless otherwise specified, tolerance is .005 inch (0.13 mm). 4. The physical characteristics of the die are: Thickness: .008 inch (0.20 mm) minimum, .012 inch (0.30 mm) maximum. Top metal: Aluminum 25,000 Å nominal. Back metal: Gold 2,500 Å minimum, 3,000 Å nominal. Back side: C...

AT49F001-70JI

Vendor:ATMELPackage Cooled:PLCC32D/C:01+

NOTES: 1. Dimensions are in inches. 2. Metric equivalents are given for general information only. 3. Unless otherwise specified, tolerance is .005 inch (0.13 mm). 4. The physical characteristics of the die are: Thickness: .008 inch (0.20 mm) minimum, .012 inch (0.30 mm) maximum. Top metal: Aluminum 25,000 Å nominal. Back metal: Gold 2,500 Å minimum, 3,000 Å nominal. Back side: C...

AT49F001-70PC

Vendor:ATMELPackage Cooled:DIP32D/C:02+

The CM2009 connects between a video graphics con- troller embedded in a PC, graphics adapter card or set top box and the VGA or DVI-I port connector. The CM2009 incorporates ESD protection for all signals, level shifting for the DDC signals and buffering for the SYNC signals. ESD protection for the video, DDC and SYNC lines is implemented with low-capacitance cur- rent steering diodes.

AT49F001-70PI

Vendor:ATMELPackage Cooled:DIP32D/C:02+

Each device includes a voltage regulator for operation with supply voltages of 4.5 voltas to 24 volts, reverse battery protection diode, quadratic Hall-voltage generator, temperature compensation circuitry, small-signal amplifier, Schmitt trigger, and an open-collector output to sink up to 25 mA. With suitable output pull up, they can be used with bipolar or CMOS logic circuits. The 3121 is an improved repla...

AT49F001-70PI

Vendor:ATMELPackage Cooled:DIP32D/C:02+

Each device includes a voltage regulator for operation with supply voltages of 4.5 voltas to 24 volts, reverse battery protection diode, quadratic Hall-voltage generator, temperature compensation circuitry, small-signal amplifier, Schmitt trigger, and an open-collector output to sink up to 25 mA. With suitable output pull up, they can be used with bipolar or CMOS logic circuits. The 3121 is an improved repla...

AT49F001-90PC

Vendor:ATMELPackage Cooled:DIP32D/C:03+

HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN), VIL = 0.8V (MAX) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WI...

AT49F001-90PI

Vendor:ATMELPackage Cooled:DIPD/C:N/A

The record path of the TLV320AIC32 contains integrated microphone bias, digitally-controlled stereo-microphone pre-amp, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs.

AT49F001-90PI

Vendor:ATMELPackage Cooled:DIPD/C:N/A

The record path of the TLV320AIC32 contains integrated microphone bias, digitally-controlled stereo-microphone pre-amp, and automatic gain control (AGC), with mix/mux capability among the multiple analog inputs. The playback path includes mix/mux capability from the stereo DAC and selected inputs, through programmable volume controls, to the various outputs.

AT49F001-90TC

Vendor:ATMELPackage Cooled:TSSOP32D/C:03+

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. Derate lin...

AT49F001A-12TI

AT49F001A-55T

Vendor:ATMELPackage Cooled:TSOPD/C:N/A

AT49F001A-90VI

AT49F001AN-45JU

AT49F001AN-45VI

Vendor:ATD/C:08+

NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. The test limit for this parameter is 5µA at TA = C55C.

AT49F001AN-55JI

D/C:07+

Each intersection point predicts the voltage of each reflected wave on the transmission line. Intersection points on the VOH/IOH curve will be waves travelling from the driver to the receiver while intersection points on the VIN/IIN curve will be waves travelling from the receiver to the driver.

AT49F001AN-55JI

D/C:07+

Each intersection point predicts the voltage of each reflected wave on the transmission line. Intersection points on the VOH/IOH curve will be waves travelling from the driver to the receiver while intersection points on the VIN/IIN curve will be waves travelling from the receiver to the driver.

AT49F001AN-55JU

Vendor:ATMELPackage Cooled:PLCC32D/C:2005

The TVS low capacitance device configuration is shown in Figure 2. As a further option for unidirectional applications, an additional low capacitance rectifier diode may be used in parallel in the same polarity direction as the TVS as shown in Figure 3. In applications where random high voltage transients occur, this will prevent reverse transients from damaging the internal low capacitance rectifier diode and...

AT49F001AN-55JU

Vendor:ATMELPackage Cooled:PLCC32D/C:2005

The TVS low capacitance device configuration is shown in Figure 2. As a further option for unidirectional applications, an additional low capacitance rectifier diode may be used in parallel in the same polarity direction as the TVS as shown in Figure 3. In applications where random high voltage transients occur, this will prevent reverse transients from damaging the internal low capacitance rectifier diode and...

AT49F001AN-55VU

Vendor:ATPackage Cooled:07+D/C:4064

AT49F001ANT

Vendor:ATPackage Cooled:SMD/DIPD/C:04+

• High-density mounting is possible • Low forward voltage VF , optimum for low voltage rectification: VF < 0.3 V (at IF = 1 mA) • Optimum for high frequency rectification because of its short reverse recovery time (trr) • SS-Mini type 3-pin package

AT49F001ANT-45JI

New Low Profile TSSOP−8 Package Ultra Low RDS(on) Higher Efficiency Extending Battery Life Logic Level Gate Drive Diode Exhibits High Speed, Soft Recovery Avalanche Energy Specified IDSS and VDS(on) Specified at Elevated Temperatures

AT49F001ANT-45TI

Vendor:ATD/C:08+

Capacitance measurements shall be made by means of polarized capacitance bridge. The polarizing voltage shall be of such magnitude that there shall be no reversal of polarity due to the AC component. The maximum voltage applied to capacitors during measurement shall be 2 volts rms at 120 Hz at + 25C. If the AC voltage applied is less than one- half volt rms, no DC bias is required. Accuracy of the b...

AT49F001ANT-45VI

Vendor:ATD/C:08+

3. Die Attach a. Eutectic Eutectic die attach can be accom- plished by scrubbing the die with/without a preform on the header to combine with the silicon in the die. Temperature is approxi- mately 400C, with heating times of 5-10 seconds. (NoteCtimes and temperature utilized may vary depending on the type, composi- tion, and heat capacity of the header or substrate used.) This method is recomme...

AT49F001ANT-55JI

Vendor:ATMELD/C:05+

AT49F001ANT-55JU

Vendor:ATMELD/C:08+

These three terminal positive regulators are supplied in a hermetically sealed metal package whose outline is similar to the industry standard TO-220 plastic package. All protective features are designed into the circuit, including thermal shutdown, current limiting and safe-area control. With heat sinking, they can deliver over 3.0 amps of output current. These units feature 2% initial voltage tolerance, ...

AT49F001ANT-55TU

AT49F001AT-55VI

Vendor:ATMELPackage Cooled:VSOP-32D/C:2006

The USB descriptors and keyboard matrix can be customized via an optional external 24C08 EEPROM, or directly select the internal 4 different models from internal ROM. This feature makes customization of new projects cost-effective and efficient by only adding an external EEPROM while still using the same mass production chip.

AT49F001IL

Vendor:ATMELPackage Cooled:DIPD/C:98+

AT49F001N

Package Cooled:PLCC

Note 7: Pins G6 and RESET are designed with a high voltage input network. These pins allow input voltages > VCC and the pins will have sink current to VCC when biased at voltages > VCC (the pins do not have source current when biased at a voltage below VCC). The effective resistance to VCC is 750Ω (typical). These two pins will not latch up. The voltage at the pins must be limited to < 14V. W...

AT49F001N-12JC

Vendor:ATMELPackage Cooled:PLCC32D/C:02+

The AT49F001N-12JC and AT49F001N-12JC are a 10-bit Serial- izer and Deserializer chipset designed to transmit data over differential backplanes at clock speeds from 20 to 80 MHz. The chipset is also capable of driving data over Unshielded Twisted Pair (UTP) cable. The chipset has three active states of operation: Initializa- tion, Data Transfer, and Resynchronization; and two passive states: Powerdow...

AT49F001N-12JI

Vendor:ATMELPackage Cooled:07+D/C:1254

ParameterUnitsValue Lamp Type2/32T82/40T12 Input Power[W]6580 Input Current (120VAC)[A]0.550.67 Pre-heat Output Frequency[kHz]6045 Pre-heat Output Voltage[Vp]300300 Pre-heat Time (TTL)[s]1.02.0 Running Output Frequency[kHz]5035 Running Output Voltage[V]100100 Input A.C. Voltage Range[VAC]90..275VAC/50/60Hz Input D.C. Voltage Range[VDC]100..350 Temperature Range[ºC]0..70 Power Factor0.99 Total Ha...

AT49F001N-12PC

Vendor:ATMELPackage Cooled:DIP32D/C:01+

The SD1010A is enhanced version of the SD1000 chip. It is an IC designed for analog-interface XGA TFT LCD monitors. An analog-interface LCD monitor takes analog RGB signals from a graphic card of a personal computer, the exact same input interface as a conventional CRT monitor. This feature makes analog-interface LCD monitor a true replacement of a conventional CRT monitor.

AT49F001N-12PI

AT49F001N-12TC

Package Cooled:SOP32D/C:08+09+

Analog-to-Digital Converters − 24-Bit Linear PCM or 1-Bit Direct Stream Digital (DSD) Output Data − Supports PCM Output Sampling Rates up to 216kHz − Supports 64fS and 128fS DSD Output Data Rates Dynamic Performance: PCM Output − Dynamic Range: 118dB − THD+N: −105dB Dynamic Performance: DSD Output − Dynamic Range: 115dB − THD+N: −103dB Audio Se...

AT49F001N-12TI

AT49F001N-55JI

D/C:07+

Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the characteristic value drift due to the chip junction temperature rise can be ignored. Note 2) Unless otherwise specified, VI = −9V, IO = 40mA, CI = 2µF, CO = 1µF, Tj = 0 to 125C

AT49F001N-55JI

D/C:07+

Note 1) The specified condition Tj = 25C means that the test should be carried out within so short a test time (within 10ms) that the characteristic value drift due to the chip junction temperature rise can be ignored. Note 2) Unless otherwise specified, VI = −9V, IO = 40mA, CI = 2µF, CO = 1µF, Tj = 0 to 125C

AT49F001N-55PC

Vendor:ATMEL

Extremely High Speed: tPD 2.6 ns (typical) at VCC = 5 V Designed for 2.3 V to 5.5 V VCC Operation Over Voltage Tolerant Inputs and Outputs LVTTL Compatible C Interface Capability With 5 V TTL Logic with VCC = 3 V LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current Substantially Reduces System Power Requirements 3CState OE Input is Active HIGH Replacement ...

AT49F001N-55PI

AT49F001N-55TC

AT49F001N-55TI

AT49F001N-55VC

AT49F001N-55VI

Vendor:ATMELPackage Cooled:TSSOP28D/C:03+

1 1 2 Selecting An External ENDEC An option is provided on SONIC to disable the on-chip ENDEC unit and use an external ENDEC The internal IEEE 802 3 ENDEC can be bypassed by connecting the EXT pin to VCC (EXT e 1) In this mode the MAC signals are redirect- ed allowing an external ENDEC to be used See Section 5 2 for the alternate pin definitions

AT49F001N-55VI

Vendor:ATMELPackage Cooled:TSSOP28D/C:03+

1 1 2 Selecting An External ENDEC An option is provided on SONIC to disable the on-chip ENDEC unit and use an external ENDEC The internal IEEE 802 3 ENDEC can be bypassed by connecting the EXT pin to VCC (EXT e 1) In this mode the MAC signals are redirect- ed allowing an external ENDEC to be used See Section 5 2 for the alternate pin definitions

AT49F001N-70PC

Vendor:3500

Dual Synchronous Controller in 24-Pin Package with 1808 out-of-phase operation LDO Controller with Independent Bias Supply Can be configured as 2-Independent or 2-Phase PWM Controller Programmable Current Sharing in 2-Phase Configu- ration Flexible, Same or Separate Supply Operation Operation from 4V to 25V Input Programmable Switching Frequency up to 400KHz Soft-Start controls all outputs Precision Refe...

AT49F001N-70PI

Vendor:ATD/C:03+

Normally, the B port operates at GTLP signal levels. The A-port and control inputs operate at LVTTL logic levels, but are 5-V tolerant and can be directly driven by TTL or 5-V CMOS devices. VREF is the B-port differential input reference voltage.

AT49F001N-70VC

Vendor:ATMELPackage Cooled:VSOP-32D/C:2000

• Low VCE (on) Non Punch Through IGBT Technology. • Low Diode VF. • 10µs Short Circuit Capability. • Square RBSOA. • Ultrasoft Diode Reverse Recovery Characteristics. • Positive VCE (on) Temperature Coefficient. • Super-247 Package.

AT49F001N-70VC

Vendor:ATMELPackage Cooled:VSOP-32D/C:2000

• Low VCE (on) Non Punch Through IGBT Technology. • Low Diode VF. • 10µs Short Circuit Capability. • Square RBSOA. • Ultrasoft Diode Reverse Recovery Characteristics. • Positive VCE (on) Temperature Coefficient. • Super-247 Package.

AT49F001N-70VI

AT49F001N-90JI

Vendor:ATMELPackage Cooled:2003D/C:2878

Standard Space Vector Modulation C 3 outputs version (svmStd3) is a variant of the svmStd function that, in contrary to svmStd, generates only top channel signal of each PWM pair. The bottom channel signal could be derived from the top channel signal by an external hardware. The function set consists of 4 TPU functions:

AT49F001N-90JI

Vendor:ATMELPackage Cooled:2003D/C:2878

Standard Space Vector Modulation C 3 outputs version (svmStd3) is a variant of the svmStd function that, in contrary to svmStd, generates only top channel signal of each PWM pair. The bottom channel signal could be derived from the top channel signal by an external hardware. The function set consists of 4 TPU functions:

AT49F001N-90PC

Vendor:ATD/C:03+

Additional functionality is achieved via download soft- ware (e.g. Micronas SC4 encoder/decoder). SC4 is a proprietary Micronas speech codec technology based on ADPCM. The codec can be downloaded to the MAS 3587F to allow high quality speech recording and playing back at various sampling rates. (Please con- tact your local Micronas Sales Representative about availability of SC4 downloads).

AT49F001N-90PC

Vendor:ATD/C:03+

Additional functionality is achieved via download soft- ware (e.g. Micronas SC4 encoder/decoder). SC4 is a proprietary Micronas speech codec technology based on ADPCM. The codec can be downloaded to the MAS 3587F to allow high quality speech recording and playing back at various sampling rates. (Please con- tact your local Micronas Sales Representative about availability of SC4 downloads).

AT49F001N-90PI

Vendor:ATD/C:03+

Changes or storage to the EEPROM memory cells must allow for a 2 second delay to guarantee that updates will occur. The EEPROM memory cells are specified to accept greater than 80,000 writes before a wearCout condition. If the EEPROM memory cells do reach a wearCout condition, the Dallastat will still function prop- erly while power is applied. However, on powerCup the devices wiper position will be ...

AT49F001N-90TC

The hardware RESET# pin terminates any operation in progress and resets the internal state machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system micropro- cessor to read boot-up firmware from the Flash mem- ory device.

AT49F001N-90TI

Vendor:ATD/C:03+

The TAR5SBxx Series is comprised of general-purpose bipolar single-power-supply devices incorporating a control pin which can be used to turn them ON/OFF. Overtemperature and overcurrent protection circuits are built into the devices output circuit.

AT49F001N-90VC

AT49F001NT

multivibrator can be calculated by : T = 1/2 RX CX for CX > 0.01µF. The min. value of external resistance, RX, is 5KΩ. The max. values of external capacitance, CX, is 100 µF. The output pulse width has variations of 2.5% typically, over the temperature range of -55 C to 125 C for CX=1000pF and R X = 100KΩ . For power supply variation of 5% typically , for V DD = 10V and 1...

AT49F001NT-12DC

Vendor:ATMELPackage Cooled:DIPD/C:06+

The device is compatible with the JEDEC single- power-supply Flash command set standard. Com- mands are written to the command register using standard microprocessor write timings, from where they are routed to an internal state-machine that controls the erase and programming circuits.

AT49F001NT12JC

Vendor:n/aPackage Cooled:PLCCD/C:06+

RON is 4Ω typical Low bit-to-bit skew: 200ps Low crosstalk: C65dB @ 10MHz Low Current Consumption: 20µA Near-Zero propagation delay: 250ps Switching speed: 9ns Channel On-Capacitance: 6pF (typical) VCC Operating Range: +3.0V to +3.6V ESD>2000V . . . Human Body Model High Signal Passing bandwidth (600 MHz) Packaging (Pb-free & Green available): 24-pin QSOP (Q)

AT49F001NT-12JC

Notes: 1. The luminous intensity is measured on the mechanical axis of the lamp package. 2. The optical axis is closely aligned with the package mechanical axis. 3. The dominant wavelength, ëd, is derived from the CIE Chromaticity Diagram and represents the color of the lamp. 4. 1/2 is the off-axis angle where the luminous intensity is one half the on-axis intensity. 5. The intensity of narrow vie...

AT49F001NT-12PI

AT49F001NT-12VI

AT49F001NT-55JC

Vendor:ATMELPackage Cooled:PLCCD/C:05+

ECCP2/P2A are multiplexed with RC1 when CCP2MX is set; with RE7 when CCP2MX is cleared and the device is configured in Microcontroller mode; or with RB3 when CCP2MX is cleared in all other program memory modes. P1B/P1C/P3B/P3C are multiplexed with RE6:RE3 when ECCPMX is set and with RH7:RH4 when ECCPMX is not set. RG5 is multiplexed with MCLR and is only available when the MCLR Resets are disabled.

AT49F001NT-70JI

Vendor:ATMELPackage Cooled:PLCC-32

The RESET and V2FAIL signals remain active until Vcc voltage drops below 1V. RESET remains active until Vcc returns and exceeds VTRIP for 200ms. V2FAIL remains active until immediately after V2MON returns and exceeds its minimum voltage.

AT49F001NT-70PI

Vendor:ATD/C:03+

HY57V561620C is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchro- nized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.

AT49F001NT-70PI

Vendor:ATD/C:03+

HY57V561620C is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchro- nized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.

AT49F001NT-70TC 5V 8BIT 70NS

AT49F001NT-70TI

Vendor:ATD/C:03+

AT49F001NT-90JI

Vendor:ATMELPackage Cooled:PLCC-32

RST 16 RESET-this asynchronous, active low input disables the outputs, chooses 8-bit count mode in the PWM counter, sets the clock to be "divided by 1", clears Lock bit, and sets the dead-time counter to 7. Asserting RESET writes a 01000111 binary to the Control latch. Asserting RESET is the only way in which the Lock bit in the control latch can be cleared. Writes to t...

AT49F001NT-90PC

Vendor:ATMELPackage Cooled:N A

The CS4192 is a monolithic BiCMOS integrated circuit used to translate a digital 10Cbit word from a microprocessor/microcontroller to complementary DC outputs. The DC outputs drive an airCcore meter commonly used in vehicle instrument panels. The 10 bits of data are used to linearly control the quadrature coils of the meter directly with a 0.35 resolution and 1.2 accuracy over the full 360 range of the ...

AT49F001NT-90TC

Vendor:ATD/C:03+

The TL750L and TL751L series are low-dropout positive-voltage regulators specifically designed for battery-powered systems. These devices incorporate overvoltage and current-limiting protection circuitry, along with internal reverse-battery protection circuitry to protect the devices and the regulated system. The series is fully protected against 60-V load-dump and reverse-battery conditions. Extremely lo...

AT49F001NT-90TI

Vendor:ATMELPackage Cooled:TSOP-32D/C:2001

A good compromise for (1) and (2) is to set booster gain from 3 to 10 with total (composite) gain at least a factor of 3 times booster gain. Guideline (3) implies compensating the driver as required in low composite gain configurations. Phase shift within the loop (4) is minimized through use of booster and loop compensation capacitors Cc and Cf when required. Typical values are 5pF to 33pF. Stabili...

AT49F001NT-90TI

Vendor:ATMELPackage Cooled:TSOP-32D/C:2001

A good compromise for (1) and (2) is to set booster gain from 3 to 10 with total (composite) gain at least a factor of 3 times booster gain. Guideline (3) implies compensating the driver as required in low composite gain configurations. Phase shift within the loop (4) is minimized through use of booster and loop compensation capacitors Cc and Cf when required. Typical values are 5pF to 33pF. Stabili...