Index "B"Vendor:PULSED/C:.
The main output Vo1 is a 1.6-MHz fixed frequency PWM boost converter providing the source drive voltage for the LCD display. The device is available in two versions with different internal switch current limits to allow the use of a smaller external inductor when lower output power is required. The B2088T has a typical switch current limit of 2.3 A and the B2088T has a typical switch current limit of...
Vendor:PULSED/C:04+
Figure 1 is a block diagram of the bq4847. The bq4847 is functionally equivalent to the bq4845 except that the bat- tery (20, 24) and crystal (2, 3) pins are not accessible. The pins are connected internally to a coin cell and quartz crystal. The coin cell provides 130mAh of capacity. It is in- ternally isolated from VOUT and CEOUT until the initial application of VCC. Once VCC rises above VPFD, this isola- ...
Vendor:PULSED/C:04+
Figure 1 is a block diagram of the bq4847. The bq4847 is functionally equivalent to the bq4845 except that the bat- tery (20, 24) and crystal (2, 3) pins are not accessible. The pins are connected internally to a coin cell and quartz crystal. The coin cell provides 130mAh of capacity. It is in- ternally isolated from VOUT and CEOUT until the initial application of VCC. Once VCC rises above VPFD, this isola- ...
Vendor:PulsePackage Cooled:50D/C:77
If the A5, A1, A0 address line inputs are LOW then the IDT72V8985 Internal Control Register is addressed (see Table 2). If A5 input line is high, then the remaining address input lines are used to select the 32 possible channels per input or output stream. As explained in the Control Register description, the address input lines and the Stream Address bits (STA) of the Control register give the user the c...
Vendor:PULSED/C:00+
NOTES: (1) Junction temperature = ambient for 25C tested specifications. (2) Junction temperature = ambient at low temperature limit, junction temperature = ambient +7C at high temperature limit for over temperature tested specifications. (3) Test levels: (A) 100% tested at 25C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value on...
Vendor:PULSED/C:00+
NOTES: (1) Junction temperature = ambient for 25C tested specifications. (2) Junction temperature = ambient at low temperature limit, junction temperature = ambient +7C at high temperature limit for over temperature tested specifications. (3) Test levels: (A) 100% tested at 25C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation. (C) Typical value on...
Vendor:n/aPackage Cooled:SOPD/C:06+
Vendor:frbPackage Cooled:frbD/C:dc89+
* Specifications will vary with foreign standards certification ratings. *1 Measurement at same location as "Initial breakdown voltage"section *2 Detection current: 10mA *3 Excluding contact bounce time *4 Half-wave pulse of sine wave: 11ms, detection time: 10µs *5 Half-wave pulse of sine wave: 6ms *6 Detection time: 10µs *7 Refer to 5. Conditions for operation, tran...
These devices consist of four independent voltage comparators that are designed to operate from a single power supply over a wide range of voltages. Operation from dual supplies also is possible as long as the difference between the two supplies is 2 V to 36 V, and VCC is at least 1.5 V more positive than the input common-mode voltage. Current drain is independent of the supply voltage. The outputs...
These devices consist of four independent voltage comparators that are designed to operate from a single power supply over a wide range of voltages. Operation from dual supplies also is possible as long as the difference between the two supplies is 2 V to 36 V, and VCC is at least 1.5 V more positive than the input common-mode voltage. Current drain is independent of the supply voltage. The outputs...
Vendor:N/APackage Cooled:N/AD/C:08+09+
The HA12134A, HA12135A, HA12136A are silicon monolithic bipolar IC series providing dual channel Dolby B-type noise reduction system* in one chip. The circuit is used primarily to reduce the level of background noise introduced during recording and playback of audio signals on magnetic tape.
Vendor:N/APackage Cooled:N/AD/C:08+09+
The HA12134A, HA12135A, HA12136A are silicon monolithic bipolar IC series providing dual channel Dolby B-type noise reduction system* in one chip. The circuit is used primarily to reduce the level of background noise introduced during recording and playback of audio signals on magnetic tape.
Vendor:DIODESD/C:04+/05+
• C compiler optimized architecture: - Optional extended instruction set designed to optimize re-entrant code • 100,000 erase/write cycle Enhanced Flash program memory typical • 1,000,000 erase/write cycle Data EEPROM memory typical • Flash/Data EEPROM Retention: 100 years typical • Self-programmable under software control • Priority levels for interrupts ...
Vendor:PulsePackage Cooled:9944D/C:100
The TO-220 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 watts. The low thermal resistance and low package cost of the TO-220 contribute to its wide acceptance throughout the industry.
Vendor:PULSEPackage Cooled:113D/C:16
Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for...
Vendor:INTELPackage Cooled:DIP22陶瓷D/C:77+
Posistive excursions of input voltage may exceed the power supply level. As long as the other voltage remains within the common-mode range, the comparator will provide a proper output state. The low input voltage state must not be less than -0.3V (or 0.3V bellow the neg- ative power supply, if used).
Vendor:INTELPackage Cooled:DIP22陶瓷D/C:76+
Vendor:INTELPackage Cooled:DIP22陶瓷D/C:76+
Vendor:PULSEPackage Cooled:2000D/C:13000
Data Bus, active High. In word mode, these pins provide a 16-bit data path Inputs/Outputs for read and write operations. In byte mode, DQ[7:0] provide an 8-bit data path Tri-stateand DQ[15]/A[-1] is used as the LSB of the 22-bit byte address input. DQ[14:8] are unused and remain tri-stated in byte mode..
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. DBZ/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
Voltage, current, and temperature measurements are made every 2C2.5 seconds, depending on the bq2060 op- erating mode. Maximum times occur with compensated EDV, mWh mode, and maximum allowable discharge rate. Any AtRate computations requested or scheduled (every 20 seconds) may add up to 0.5 seconds to the time interval.
The 74HC/HCT4094 are 8-stage serial shift registers having a storage latch associated with each stage for strobing data from the serial input (D) to the parallel buffered 3-state outputs (QP0 to QP7). The parallel outputs may be connected directly to common bus lines. Data is shifted on the positive-going clock (CP) transitions.
Vendor:PulseD/C:00+
The M54/74HCT245, HCT640 and HCT643 utilise silicon gate C2MOS technology to achive operating speeds eqivalent to LSTTL devices. Along with the low power dissipation and high noise immunity of standad CMOS integrated circuit, it possesses the capability to drive 15 LSTTL loads. These ICs are intended for two-way asynchronous communication between data buses, and the direction of data trasmission is...
Vendor:PulseD/C:00+
The M54/74HCT245, HCT640 and HCT643 utilise silicon gate C2MOS technology to achive operating speeds eqivalent to LSTTL devices. Along with the low power dissipation and high noise immunity of standad CMOS integrated circuit, it possesses the capability to drive 15 LSTTL loads. These ICs are intended for two-way asynchronous communication between data buses, and the direction of data trasmission is...
The master reset inputs (1MR and 2MR) are active-High asynchronous inputs to each decade counter which oper- ates on the portion of the counter identified by the 1 and 2 prefixes in the pin configuration. A High level on the nMR input overrides the clock and sets the four outputs Low.
Vendor:NECPackage Cooled:DIP
DigitalClarity CMOS Imaging Technology High frame rate Superior low-light performance Low dark current Simple two-wire serial interface Auto black level calibration Support for long integration times 2 x 2 binning Anti-aliasing function Anti-eclipse function Operating modes: snapshot and flash control, high frame rate preview, electronic panning Programmable controls: gain, frame size/rate, exposu...
Vendor:PULSEPackage Cooled:SMD-6PD/C:2003
Functional Description Analog Front End Clamping Matrix YUV Control (on RGB-path only) Delay Adjustment Skew Filter Fast Blank Processing Soft Mixer Fast Blank Monitor FSY Front Sync and AVI Active Video In Digital Input Formats The Chroma Demultiplexers YUVin Interpolator (LPF 4:4:4) YUV Output Low-pass Filter 4:2:2 and 4:1:1 Selectable RGB/YUV Output Formats DIGIT 2000 4:1:1 Output Form...
Vendor:SIEMENSPackage Cooled:PLCCD/C:03+
Vendor:SIEMENSPackage Cooled:PLCCD/C:03+
Vendor:DIODEPackage Cooled:SMBD/C:08+
IDENTIFICATION INPUTS: These four pins are part of the mechanism that allows multiple devices to be attached to the same bus. The strapping of these pins is used to assign an ID to each device. The boot device must have ID[3:0] = 0000, and it is recommended that all subsequent devices should use sequential up-count strapping (e.g., 0001, 0010, 0011, etc.). Values presented on the ID[3:0] pins are only re...
Vendor:DIODESPackage Cooled:DO-214AA(SMB)D/C:06+
The HCPL-7850/7851 is an isolation amplifier that provides accurate, electrically isolated and amplified representations of voltage and current. When used with a shunt resistor to monitor the motor phase current in a high speed motor drive, the device will offer superior reliability compared with the traditional solutions such as current transformers and Hall-effect sensors. The HCPL-7850/7...
Vendor:STPackage Cooled:QFPD/C:01+
As shown in Figure 2, the three internal memory RAM blocks reside in memory page 0. The entire DSP memory map consists of 256 pages (pages 0 to 255), and each page is 64K words long. External memory space consists of four memory banks (banks3C0) and supports a wide variety of memory devices. Each bank is selectable using unique memory select lines (MS3C0) and has configurable page boundaries, wait stat...
Vendor:DIODESPackage Cooled:255000D/C:07+
Transmitter Section The transmitter section includes the Transmitter Optical Sub- assembly (TOSA) and laser driver circuitry. The TOSA, containing an 850 nm VCSEL (Vertical Cavity Surface Emitting Laser) light source, is located at the optical interface and mates with the LC optical connector. The TOSA is driven by a custom IC, which converts differential logic signals into an analog laser d...
Vendor:PULSEPackage Cooled:2005D/C:20000
This single-ended, TTL/CMOS-compatible input functions as a synchronous output enable. The synchronous enable ensures that enable/disable will only occur when the outputs are in a logic LOW state. Note that this input is internally connected to a 25kΩ pull-up resistor and will default to logic HIGH state (enable) if left open.
Vendor:N/APackage Cooled:498D/C:N/A
Voltage Referenced to GND V+ IN, COM, NO, NC (Note 1) Continuous Current (any terminal) Peak Current, COM, NO, NC (pulsed at 1ms, 10% duty cycle) Operating Temperature Range Storage Temperature Range Lead Temperature (soldering, 10s) Continuous Power Dissipation (TA = +70C) 6-Pin SC70 6-Pin SOT23 Derates above +70C 6-Pin SC70 6-Pin SOT23
Vendor:STD/C:PLCC
When the BLANKING input is high, the output source drivers are disabled (OFF); the pnp active pull-down sink drivers are ON. The information stored in the latches is not affected by the BLANKING input. With the BLANKING input low, the outputs are controlled by the state of their respective latches.
D/C:DIP
Vendor:STPackage Cooled:TO-263D/C:1
BlueCore4-ROM Plug-n-Go has the same pinout and electrical characteristics as available in BlueCore4-Flash Plug-n-Go to enable development of custom code before committing to ROM. It also has the same pinout as BlueCore2-ROM Plug-n-Go and BlueCore2-Flash Plug-n-Go to keep compatibility.
Vendor:PANASONICPackage Cooled:01+D/C:N/A
Vendor:DIODESPackage Cooled:SMB(DO-214AA)D/C:2009+
Within the logic allocator, product terms are allocated to macrocells in product term clusters. Each product term cluster is associated with a macrocell. The cluster size for the ispMACH 4000 family is 4+1 (total 5) product terms. The software automatically considers the availability and distribution of product term clusters as it fits the functions within a GLB. The logic allocator is designed to p...
Vendor:GSPackage Cooled:SMAD/C:05+
Data bus (bi-directional). These pins are the 8-bit, 3-state data bus for transferring information to or from the controlling CPU. D0 is the least significant bit and the first data bit in a transmit or receive serial data stream.
Vendor:STPackage Cooled:DO214ACD/C:08+
TC9208M handles an 8K address-lookup table with searching, self-learning, and automatic aging, at very high speed and excellent address space coverage. Forwarding rules are implemented according to IEEE 802.1D specifications. Filtering capabilities for bad packets and packets with Reserved Group Address DA are also provided.
Vendor:VISHAYPackage Cooled:DO-214AC (SMA)D/C:06+PBF
Any and all SANYO products described or contained herein do not have specifications that can handle applications that require extremely high levels of reliability, such as life-support systems, aircrafts control systems, or other applications whose failure can be reasonably expected to result in serious physical and/or material damage. Consult with your SANYO representative nearest you before using any ...
Vendor:DIODESPackage Cooled:SMDD/C:08+
The LVT574 and LVTH574 consist of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the cont...
Vendor:STPackage Cooled:DO214AAD/C:08+
The OPA341 series rail-to-rail CMOS operational amplifiers are designed for low-cost, miniature applications. They are optimized for low-voltage, single-supply operation. Rail-to-rail input and output and high-speed operation make them ideal for driving sampling Analog-to-Digital (A/D) converters. The power-saving shutdown feature makes the OPA341 ideal for portable low-power applications. The OPA341 ...
Youre probably having trouble keeping the constant voltage across RA and RB really constant. The pulse output on pin 9 puts a moderate load on both supplies as it switches current on and off. Changes in the supply reflect as variations in charging current, hence non-linearity. Decoupling both power supply pins to ground right at the device pins is a good idea. Also, pins 7 and 8 are susceptible to pick...
Package Cooled:MODULED/C:N/A
Digital multiplexed output data bus. ADC output data (d15:d0) is available in two multiplexed formats as shown, under the control of register MUXOP [1:0] See Output Formats description in Device Description section for further details.
Vendor:DIODES美台Package Cooled:N/AD/C:08+
Packaged in a metal-sealed, ceramic, 24-pin DDIP, the functionally complete ADS-119 contains a fast-settling sample/ hold amplifier, a subranging (two-pass) A/D converter, a precise voltage reference, timing/control logic, and error- correction circuitry. All timing and control logic operates from the rising edge of a single start convert pulse. Digital input and output levels are TTL.
Vendor:MORNSUNPackage Cooled:DIPD/C:09+
Chapter 6, "SAM88RCRI Instruction Set," describes the features and conventions of the instruction set used for all S3C9-series microcontrollers. Several summary tables are presented for orientation and reference. Detailed descriptions of each ins truction are presented in a standard format. Each instruction description includes one or more practical examples of how to use the instruction when writin...
Vendor:MORNSUNPackage Cooled:SIPD/C:06+
Vendor:MORNSUNPackage Cooled:SIPD/C:09+
DIGITAL INPUTS DFS, Input Logic 1 Voltage DFS, Input Logic 0 Voltage DFS, Input Logic 1 Current DFS, Input Logic 0 Current I/P Input Logic 1 Current1 I/P Input Logic 0 Current1 ENCODE, ENCODE Differential Input Voltage ENCODE, ENCODE Differential Input Resistance ENCODE, ENCODE Common-Mode Input Voltage2 DS, DS Differential Input Voltage DS, DS Common-Mode Input Voltage Digital Input Pin Capacitance
Vendor:MORNSUNPackage Cooled:DIPD/C:09+
• Real Time Clock/Calendar Tracks time in Hours, Minutes, Seconds and Hundredths of a Second Day of the Week, Day, Month, and Year • 2 Polled Alarms (Non-volatile) Settable on the Second, Minute, Hour, Day of the Week, Day, or Month Repeat Mode (periodic interrupts) • Oscillator Compensation on chip Internal feedback resistor and compensation capacitors 64 position ...
Vendor:MORNSUNPackage Cooled:ORG PACKINGD/C:08+
Vendor:STPackage Cooled:DO214ACD/C:08+
• Designed for under the hood applications • Plastic package has Underwriters Laboratory Flammability Classification 94V-0 • Exclusive patented PAR® oxide passivated chip construction • 600W peak pulse power surge capability with a 10/1000ms waveform repetition rate (duty cycle): 0.01% • Excellent clamping capability • Low incremental surge resistance ...
Vendor:90000Package Cooled:DIODESD/C:2008
Vendor:MORNSUNPackage Cooled:DIPD/C:09+
Using the 1-byte REF (Reference) instruction, you can reference instructions stored in addresses 0020H-007FH of program memory (the REF instruction look-up table). The location referenced by REF may contain either two 1- byte instructions or a single 2-byte instruction. The starting address of the instruction being referenced must always be an even number.
Vendor:MORNSUNPackage Cooled:DIPD/C:09+
The integrated receiver is intended to be used as a single-conversion FSK/OOK receiver. It consists of a low noise amplifier, mixer, limiter, FM/FSK demodulator with an external LC tank circuit or ceramic resonator, LPF amplifier, and a data slicer with clock recovery and an integrated data bit synchronizer. The received strength signal indicator (RSSI) can also be used for fast carrier sense on/off keyin...
Vendor:TOKOPackage Cooled:2003D/C:9
Signal Processors (DSPs) − TMS320C62x − 5-, 4-, 3.33-ns Instruction Cycle Time − 200-, 250-, 300-MHz Clock Rate − Eight 32-Bit Instructions/Cycle − 1600, 2000, 2400 MIPS C6202 and C6203B GLS Ball Grid Array (BGA) Packages are Pin-Compatible With the C6204 GLW BGA Package† C6202B and C6203B GNZ and GNY Packages are Pin-Compatible VelociTI Advanced Very-Lo...
Vendor:TOKOPackage Cooled:2003D/C:9
Signal Processors (DSPs) − TMS320C62x − 5-, 4-, 3.33-ns Instruction Cycle Time − 200-, 250-, 300-MHz Clock Rate − Eight 32-Bit Instructions/Cycle − 1600, 2000, 2400 MIPS C6202 and C6203B GLS Ball Grid Array (BGA) Packages are Pin-Compatible With the C6204 GLW BGA Package† C6202B and C6203B GNZ and GNY Packages are Pin-Compatible VelociTI Advanced Very-Lo...
Vendor:SAVAGEPackage Cooled:N/AD/C:1
Vendor:SAVAGEPackage Cooled:N/AD/C:1