Index "D"Vendor:FSC/TEONPackage Cooled:1000D/C:07+
The circuit of the TSOP22..YA1 is designed in that way that unexpected output pulses due to noise or disturbance signals are avoided. A bandpassfilter, an integrator stage and an automatic gain control are used to suppress such disturbances. The distinguishing mark between data signal and disturbance signal are carrier frequency, burst length and duty cycle.
Vendor:FSC/TEONPackage Cooled:1000D/C:07+
The circuit of the TSOP22..YA1 is designed in that way that unexpected output pulses due to noise or disturbance signals are avoided. A bandpassfilter, an integrator stage and an automatic gain control are used to suppress such disturbances. The distinguishing mark between data signal and disturbance signal are carrier frequency, burst length and duty cycle.
Vendor:DIODESPackage Cooled:大桥仔D/C:05+
Notes: 1: VC1 2.4 ,VC2 2.4, VM 2.4, VC1 5.0, VC2 5.0, VC3 5.0, VM13 5.0, VM2 5.0 = 3.3 Volts, T=25C, PA is constantly biased, 50Ω system. VL adjusted for either 2.4 or 5 GHz operation. 2: Percentage includes system noise floor of EVM=0.8%. 3: Not measured 100% in production. 4: POUT measured at PIN corresponding to power detection threshold. 5: Measured at PIN at which Spectral Mask Compliance is s...
Vendor:TIPackage Cooled:DIP4D/C:06+
Vendor:VISHAYD/C:08+
The NCV8505 is a family of precision micropower voltage regulators. Their output current capability is 400 mA. The family has output voltage options for Adjustable, 2.5 V, 3.3 V and 5.0 V. The output voltage is accurate within 2.0% with a maximum dropout voltage of 0.6 V at 400 mA. Low quiescent current is a feature drawing less than 1.0 µA with ENABLE = 0 V. With ENABLE = 5.0 V, the part only d...
Vendor:VISHAYD/C:08+
The NCV8505 is a family of precision micropower voltage regulators. Their output current capability is 400 mA. The family has output voltage options for Adjustable, 2.5 V, 3.3 V and 5.0 V. The output voltage is accurate within 2.0% with a maximum dropout voltage of 0.6 V at 400 mA. Low quiescent current is a feature drawing less than 1.0 µA with ENABLE = 0 V. With ENABLE = 5.0 V, the part only d...
Vendor:DIODESPackage Cooled:SOTD/C:05+
N otes: 1. D Q -to-I/O wiring is shown as recom m ended but m ay be changed 2. D Q /D Q S/D M /C KE /S relationships m ust be m aintained as shown 3. D Q , D Q S, D M /D Q S resistors : 22O hm s+ /-5% 4. V D D ID strap connections (for m em ory dev ice V D D , V D D Q ) : S trap out :(open) : VD D = VD D Q S trap In (V ss) : V D D = V D D Q
Vendor:VISHAY
Automatic erase-before-write operation Word/chip erase and write operation Write operation with built-in timer Software controlled write protection 10-year data retention after 100K rewrite cycles 6 10 rewrite cycles per word Commercial temperature range (0C to +70C) 8-pin DIP/SOP package
2. Short-circuits from the output to VCC can cause excessive heating if VCC > 15V. The maximum output current is approximately 40mA independent of the magnitude of VCC. Destructive dissipation can result from simultaneous short-circuit on all amplifiers.
Package Cooled:IGBT
Vendor:SAN REXPCKD/C:04+
Vendor:SanRex
TOUT C This pin is the buffered output of the temperature sensor. The analog voltage at TOUT is an indication of the die temperature. This voltage is useful as a differential measurement of temperature from ambient and not as an absolute measurement of temperature. After correlating the voltage at TOUT to 25C ambient, the change in this voltage due to changes in the ambient temperature can be used to c...
Package Cooled:IGBT
Description Spread Spectrum Enable 0 = Spread Off, 1 = Spread On This is a Read and Write control bit. Reserved 3V66_1/VCH frequency Select 0 = 66M selected, 1 = 48M selected This is a Read and Write control bit. CPU_STP#. Reflects the current value of the external CPU_STP# (pin 53) This bit is Read Only.
Package Cooled:IGBT
Description Spread Spectrum Enable 0 = Spread Off, 1 = Spread On This is a Read and Write control bit. Reserved 3V66_1/VCH frequency Select 0 = 66M selected, 1 = 48M selected This is a Read and Write control bit. CPU_STP#. Reflects the current value of the external CPU_STP# (pin 53) This bit is Read Only.
Package Cooled:IGBT
CA/CB/CC High-side connections for the bootstrap capaci- tors, positive supply for high-side gate drive. The bootstrap capacitor is charged to approximately VCCOUT when the associated output SA/SB/SC terminal is low. When the output swings high, the voltage on this terminal rises with the output to provide the boosted gate voltage needed for n-channel power FETs.
These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
Vendor:38Package Cooled:N/A
Sector Protection C Any combination of sectors may be locked to prevent program or erase operations within those sectors Temporary Sector Unprotect C Allows changes in locked sectors (requires high voltage on RESET# pin) Internal Erase Algorithm C Automatically erases a sector, any combination of sectors, or the entire chip Internal Programming Algorithm C Automatically programs and verifies da...
Vendor:SANREX
This circuit uses a darlington pair topology with resistive feedback for broadband performance as well as stability over its entire temperature range. Internally matched to 50 ohm impedance, the SGA-6586 requires only DC blocking and bypass capacitors for external components.
The ZL5011x is capable of assembling user-defined packets of TDM traffic from the TDM interface and transmitting them out the packet interfaces using a variety of protocols. The ZL5011x supports a range of different packet switched networks, including Ethernet VLANs, IP (both versions 4 and 6) and MPLS. The devices also supports four different classes of service on packet egress, allowing priority treatment ...
+15V - is the low voltage supply for all the internal logic and isolated supplies which provide power to the gate drivers. A 0.1µF ceramic capacitor in parallel with a 22µF tantalum capaci- tor is recommended for bypassing the low voltage supply to GND.
D/C:N/A
Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices....
D/C:N/A
Rev. A Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices....
Vendor:DFPackage Cooled:TO220D/C:05/
Vendor:DFPackage Cooled:TO220D/C:05/
Vendor:TIDEPackage Cooled:TO263D/C:07+
for each channel of each device listed in this data sheet, absolute maximum ratings, recommended operating conditions, electrical specifications, and performance characteristics shown in the figures are similar for all parts except as noted. Additionally, the same package assembly processes and materials are used in all devices. These similarities justify the use of a common data base for d...
Vendor:SANREXPackage Cooled:MODULED/C:06+
Package Cooled:08+D/C:2000
3A Switch in a Thermally Enhanced 16-Lead TSSOP or 8-Lead SO Package Constant 1.25MHz Switching Frequency Wide Operating Voltage Range: 3V to 25V High Efficiency 0.09Ω Switch 1.2V Feedback Reference Voltage Uses Low Profile Surface Mount Components Low Shutdown Current: 15µA Synchronizable to 2MHz Current Mode Loop Control Constant Maximum Switch Current Rating at All Duty Cycles*
Vendor:SHINDENGENPackage Cooled:TO252D/C:06+
By integrating a rich set of industry leading system peripherals and memory, Blackfin processors are the platform of choice for next generation applications that require RISC-like programma- bility, multimedia support, and leading edge signal processing in one integrated package.
Package Cooled:TOD/C:07+
s Generic processor interface (nonmultiplexed and variable latency) with a configurable 32-bit or 16-bit external data bus; the processor interface can be defined as variable-latency or SRAM type (memory mapping) s Slave DMA support for reducing the load of the host system CPU during the data transfer to or from the memory s Integrated phase-locked loop (PLL) with a 12 MHz crystal or an exte...
Package Cooled:SOT-252D/C:08+
Note 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and the functional operation of the device under these or any other conditions above those indicated in the operation of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect reliablity.
Vendor:VISHAYPackage Cooled:SMDD/C:04++
PROTECTION FEATURES During normal operation, the Input pin is electrically connected to the gate of the internal power MOSFET. The device then behaves like a standard power MOSFET and can be used as a switch from DC to 50 KHz. The only difference from the users standpoint is that a small DC current (Iiss) flows into the Input pin in order to supply the internal circuitry. The device integrates: C...
The FAN1086 and FAN1086-2.5, -2.85, -3.3 and -5 are low dropout three-terminal regulators with 1.5A output current capability. These devices have been optimized for low voltage where transient response and minimum input voltage are critical. The 2.85V version is designed specifically to be used in Active Terminators for SCSI bus.
Vendor:vishayPackage Cooled:vishayD/C:dc05
The LW025 Single-Output-Series Power Modules are low-profile dc-dc converters that operate over an input voltage range of 36 Vdc to 75 Vdc and provide precisely regulated outputs. The output is isolated from the input, allowing versatile polarity configurations and grounding connections. The module has a maximum power rating of 25 W at a typical full-load efficiency of 79%.
Vendor:vishayPackage Cooled:vishayD/C:dc05
The LW025 Single-Output-Series Power Modules are low-profile dc-dc converters that operate over an input voltage range of 36 Vdc to 75 Vdc and provide precisely regulated outputs. The output is isolated from the input, allowing versatile polarity configurations and grounding connections. The module has a maximum power rating of 25 W at a typical full-load efficiency of 79%.
Vendor:SHINDENGENPackage Cooled:SOT-263D/C:04+
Max. UnitsConditions CCCVVGS = 0V, ID = 250µA CCC V/C Reference to 25C, ID = 1mA 0.065VGS = 10V, ID = 3.1A R mΩ 0.080VGS = 5.0V, ID = 2.5A R 2.0VVDS = VGS, ID = 250µA CCCSVDS = 25V, ID = 1.9A 25VDS = 55V, VGS = 0V µA 250VDS = 44V, VGS = 0V, TJ = 125C 100VGS = 16V nA -100VGS = -16V 17ID = 1.9A CCCnC VDS = 44V CCCVGS = 10V CCCVDD = 28V R CCCID = 1.9A ns CCCRG = 24Ω...
Vendor:N/APackage Cooled:N/AD/C:05+
The following charts show measured performance of the PA module in low-power mode (Vmode = +2.0V) at +16dBm output power and over a range of supply voltages from 3.4V nominal down to 1.2V. Power-added efficiency is more than doubled from 9.5 percent to nearly 25 percent (Vcc = 1.2V) while maintaining a typical ACPR1 of C52dBc and ACPR2 of less than C61dBc.
Vendor:N/APackage Cooled:N/AD/C:05+
The following charts show measured performance of the PA module in low-power mode (Vmode = +2.0V) at +16dBm output power and over a range of supply voltages from 3.4V nominal down to 1.2V. Power-added efficiency is more than doubled from 9.5 percent to nearly 25 percent (Vcc = 1.2V) while maintaining a typical ACPR1 of C52dBc and ACPR2 of less than C61dBc.
Vendor:SHINDENGENPackage Cooled:SOT-263D/C:05+
The industry standard ARM7TDMI™ microcontroller with low power consumption is integrated together with ROM memory and SRAM. There are no provisions for external controllers to directly access on-chip data memory. Communication with an external host, for example a PC, GSM or PDA, is handled via the HCI.
Vendor:SHINDENGENPackage Cooled:SOT-263D/C:05+
The industry standard ARM7TDMI™ microcontroller with low power consumption is integrated together with ROM memory and SRAM. There are no provisions for external controllers to directly access on-chip data memory. Communication with an external host, for example a PC, GSM or PDA, is handled via the HCI.
Vendor:TIDEPackage Cooled:SOT223D/C:07+
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to V S0. The VS offset rating is tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figure 54.
Vendor:TIDEPackage Cooled:SOT223D/C:07+
The Input/Output logic timing diagram is shown in Figure 1. For proper operation the device should be used within the recommended conditions. All voltage parameters are absolute voltages referenced to V S0. The VS offset rating is tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in Figure 54.
Vendor:TIDEPackage Cooled:07+D/C:SOT-223
Vendor:TIDEPackage Cooled:07+D/C:SOT-223
3.3 Volt Operation (5V tolerant) Programmable Wakeup Event Interface (IO_PME# Pin) SMI Support (IO_SMI# Pin) GPIOs (14) Two IRQ Input Pins XNOR Chain PC99a, PC2001 ACPI 2.0 Compliant 64-pin STQFP Package Intelligent Auto Power Management Serial Ports
Vendor:TIDEPackage Cooled:SOT223D/C:07+
RS Cycle Time RS Pulse Width(2) RS Set-up Time RS Recovery Time RT Cycle Time RT Pulse Width(2) RT Recovery Time RS to EF and AEF LOW RS to HF and FF HIGH R LOW to EF LOW R HIGH to FF HIGH R Pulse Width After EF HIGH W HIGH to EF HIGH W LOW to EF LOW W LOW to HF LOW R HIGH to HF HIGH W Pulse Width after FF HIGH R HIGH to Transitioning AEF W LOW to Transitioning AEF OE HIGH to High-Z (Disable)(3) ...
Vendor:TIDEPackage Cooled:SOT223D/C:07+
RS Cycle Time RS Pulse Width(2) RS Set-up Time RS Recovery Time RT Cycle Time RT Pulse Width(2) RT Recovery Time RS to EF and AEF LOW RS to HF and FF HIGH R LOW to EF LOW R HIGH to FF HIGH R Pulse Width After EF HIGH W HIGH to EF HIGH W LOW to EF LOW W LOW to HF LOW R HIGH to HF HIGH W Pulse Width after FF HIGH R HIGH to Transitioning AEF W LOW to Transitioning AEF OE HIGH to High-Z (Disable)(3) ...
Vendor:HRSPackage Cooled:08+D/C:20000
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
Vendor:HRSPackage Cooled:08+D/C:3000
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
Low power dissipation (960mW max.) TTL compatible output Diff./Integral nonlinearity (½LSB max.) 1:2 Demultiplexed straight output programmable 2:1 Frequency divided TTL clock output with reset Surface mount package Selectable Input Logic (TTl, ECL, PECL) +5V or 5V Power Supply Operation
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
FEATURES • Dual Channel (LH1540) • Current Limit Protection • l/O Isolation, 5300 VRMS • Typical RON 20 Ω • Load Voltage 350 V • Load Current 120 mA • High Surge Capability • Linear, AC/DC Operation • Clean Bounce Free Switching • Low Power Consumption • SMD Lead Available on Tape and Reel
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
The MAX4649 is a dual-supply, single-pole/double-throw (SPDT) analog switch. On-resistance is 45 max and flat (7 max) over the specified signal range. The MAX4649 can handle Rail-to-Rail® analog signals, and conducts analog or digital signals equally well in either direction. This switch operates from a single +9V to +36V supply, or from 4.5V to 20V dual supplies. The primary application areas are in the s...
Vendor:HIROSED/C:05+
NOTES 1Sample tested during initial release to ensure compliance. All input signals are specified with tR = tF = 5 ns (10% to 90% of V DD) and timed from a voltage level of 1.6 V. 2See Figure 2. 3These numbers are measured with the load circuit of Figure 1 and defined as the time required for the output to cross the VOL or VOH limits. 4SCLK active edge is falling edge of SCLK. 5These numbers are derived from...
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
Propagation delay, clock to modulus control MC Programming Inputs Clock high time, tCH Clock low time, tCL Enable set-up time, tES Enable hold time, tEH Data set-up time, tDS Data hold time, tDH Clock rise and fall times High level threshold Low level threshold Hysteresis Phase Detector Digital phase detector propagation delay Gain programming resistor, RB Hold capacitor, CH Programmi...
Vendor:HRSD/C:.
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
Note 2: The power MOSFETs can run on a separate 1V to 16V rail (Input voltage, VIN). Practical lower limit of VIN depends on selection of the external MOSFET. Note 3: The human body model is a 100pF capacitor discharged through a 1.5k resistor into each pin.
Vendor:HIROSED/C:05+
Vendor:HRSPackage Cooled:08+D/C:460
The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce the supply current to less than 10 µA when a logic high is present on ENx (DF12-20DS-0.5V(81)) or a logic low is present on ENx (DF12-20DS-0.5V(81)). A logic zero input on ENx or logic high on ENx restores bias to the drive and control circuits and turns the power on. The enable input i...
Vendor:HRSPackage Cooled:08+D/C:460
The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce the supply current to less than 10 µA when a logic high is present on ENx (DF12-20DS-0.5V(81)) or a logic low is present on ENx (DF12-20DS-0.5V(81)). A logic zero input on ENx or logic high on ENx restores bias to the drive and control circuits and turns the power on. The enable input i...
Vendor:HIROSED/C:05+
These Precision Optical Perform- ance AlInGaP LEDs provide superior light output for excellent readability in sunlight and are extremely reliable. AlInGaP LED technology provides extremely stable light output over long periods of time. Precision Optical Performance lamps utilize the aluminum indium gallium phos- phide (AlInGaP) technology.
Vendor:HIROSED/C:06+
Vendor:HIROSED/C:05+
26dB small signal gain 26.5dBm output power @ 1dB compression 2.5% EVM at 18dBm modulated output power 3.5% EVM at 19dBm modulated output power 3.3V single positive supply operation Two power saving shutdown options (bias and logic control) Integrated power detector with 20dB dynamic range Low profile 16 pin 3 x 3 x 0.9 mm leadless package Internally matched to 50Ω and DC blocked RF input/ ...
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
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A resistively-coupled lower-power complementary pair offers extremely low crossover current when the output stage uses high-power MOSFETs. The Zener, Z1, and resistors, R1 and R3, act as a level shifter, properly driving the low-power MOSFETs. The Zener may be selected according to the equation
Vendor:HRSPackage Cooled:08+D/C:16000
An exact frequency multiplying ratio ensures better than 100 ppm frequency accuracy using a standard AT crystal with external load capacitors (typically 33pF5% for an 18pF load crystal). Achieving 100 ppm over four years requires the crystal to have a 20 ppm initial accuracy, 30 ppm temperature and 5 ppm/year aging coefficients.
Vendor:HRSPackage Cooled:08+D/C:1000
Vendor:HIROSED/C:05+
Vendor:HIROSED/C:05+
The DF12A-36DS-0.5V(81) is internally compensated for unity-gain stability. This amplifier has a fully symmetrical differential input due to its classical operational amplifier circuit architecture. Its unusual combination of speed, accuracy and low power make it an ideal choice for many portable, multichannel and other high speed applications where power is at a premium.
Vendor:HIROSED/C:04+
Vendor:HIROSED/C:05+
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
Vendor:HIROSED/C:06+
FEAST provides a flexible slave interface for easy connectivity with industry-standard buses. The Bus Interface Unit (BIU) can handle synchronous as well as asynchronous buses, with different signals being used for each one. FEAST's bus interface supports synchronous buses like the VESA local bus, as well as burst mode DMA for EISA environments. Asynchronous bus support for ISA is supported even though ISA c...
Vendor:HIROSED/C:06+
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