Index "D"Vendor:DIALOGPackage Cooled:PLCC28D/C:03+
Vendor:DIALOGD/C:05+
eight CAT24FC02 may be individually addressed by the system. The last bit of the slave address specifies whether a Read or Write operation is to be performed. When this bit is set to 1, a Read operation is selected, and when set to 0, a Write operation is selected.
Ruotare il selettore su FO . Quando lalimentazione a ON e si applica il segnale di start tra i ter- minali A1 e B1, inizia il conteggio e luscita cambia di stato in modo ciclico ON e OFF. Il ciclo si ripete fino a quando viene tolta lalimen- tazione.
Vendor:DIALOGPackage Cooled:08+D/C:15000
Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road Tsim Sha Tsui, Kowloon, Hong Kong Tel : <852>-(2)-735-9218 Fax : <852>-(2)-730-0281 URL : http://semiconductor.hitachi.com.hk
The ATLV Series CMOS gate arrays employ 1.0 µ-drawn, double-level metal, Si-gate, CMOS technology processed in Atmel's U.S.-based, advanced manufacturing facility. The arrays utilize an enhanced channelless architecture which results in greater than 50 percent usable gates.
Vendor:SECPackage Cooled:04+D/C:QFP
Vendor:SECPackage Cooled:04+D/C:QFP
Vendor:TAITIEN ?Package Cooled:03+?D/C:1000
Vendor:56Package Cooled:NECD/C:N/A
Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr.) CPD * VCC * fIN I CC/4 (per gate).
Vendor:DiaIog
Package Cooled:08+D/C:15000
Write. A low on this input informs the 73K322L that data or status information has been shifted in through the DATA pin and is available for writing to an internal register. The normal procedure for a write is to shift in data LSB first on the DATA pin for eight consecutive falling edges of EXCLK and then to pulse WR low. Data is written on the rising edge of WR.
Vendor:DIALOGPackage Cooled:04+D/C:BGA
Vendor:DIAPackage Cooled:07+D/C:10000
NOTES: 1. VIN specifies the allowable DC excursion of each different output. 2. VID is the magnitude of the difference between the input level on CLK and the input level on CLK. The CLK and CLK VIH and VIL limits are used to define the DC LOW and HIGH levels for the power down mode. 3. VOD is the magnitude of the difference between the true output level and the complementary level. 4. All Outputs are left...
NOTES: 1. VIN specifies the allowable DC excursion of each different output. 2. VID is the magnitude of the difference between the input level on CLK and the input level on CLK. The CLK and CLK VIH and VIL limits are used to define the DC LOW and HIGH levels for the power down mode. 3. VOD is the magnitude of the difference between the true output level and the complementary level. 4. All Outputs are left...
Vendor:DDPackage Cooled:TSSOPD/C:06+
These programmable array logic devices feature high speed and functional equivalency when compared with currently available devices. These IMPACT-X™ circuits combine the latest Advanced Low-Power Schottky technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for conventional TTL logic. Their easy programmability allows for quick design of custom functions ...
Vendor:DIALOGD/C:05+
If the I/O is configured as an output, then either Q1 or Q2 is enabled, depending on the state of the output port register. Care should be exercised if an external voltage is applied to an I/O configured as an output because of the low-impedance paths that exist between the pin and either VDD or VSS.
Vendor:DIALOGD/C:05+
If the I/O is configured as an output, then either Q1 or Q2 is enabled, depending on the state of the output port register. Care should be exercised if an external voltage is applied to an I/O configured as an output because of the low-impedance paths that exist between the pin and either VDD or VSS.
Vendor:DIALOGPackage Cooled:TSSOP38D/C:00+
CURRENT LIMIT PROTECTION The LX8819 includes over current protection. When the output load current exceeds 1.4A (typical) the current limit protection circuit forces the regulator to decrease the output current in order to maintain safe levels.
NOTES: (1) dBFS refers to dB below Full Scale. (2) Percentage accuracies are referred to the internal A/D converter Full-Scale Range of 4Vp-p. (3) Refer to Timing Diagram footnotes for the differential linearity performance conditions for the SO and SSOP packages. (4) IMD is referred to the larger of the two input signals. If referred to the peak envelope signal ( 0dB), the intermodulation products will be 7...
Package Cooled:SOPD/C:2007+
Pins 3 & 7 connected See application schematic See application schematic Over Vin range Per Bellcore TR-332 50 % stress, Ta =40 C, ground benign Per Mil-Std-883D, method 2002.3, 1 ms, half-sine, mounted to a fixture Per Mil-Std-883D, method 2007.2, 20-2000 Hz Suffixes N, A, & C Suffixes R, G & B Suffix H Suffix L Suffix F Materials meet UL 94V-0
VCC - VEE = 2.375V to 5.5V, outputs loaded with 50Ω 1% to VCC - 2V, VIHD - VILD = 0.15V to 1V, fIN 2.5GHz input duty cycle = 50%, input transition time = 125ps (20% to 80%). Typical values are at VCC - VEE = 3.3V, VIHD = VCC - 1V, VILD = VCC - 1.5V, fIN = 622MHz, input duty cycle = 50%, input transition time = 125ps (20% to 80%), unless otherwise noted.) (Note 7)
Vendor:n/aPackage Cooled:BGAD/C:2000
† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input ...
Vendor:SAGEMPackage Cooled:SSOPD/C:2000+
5V operation 2xQ output, Q/2 output, Q output Outputs tri-state while RST low Internal loop filter RC network Low noise TTL level outputs < 500ps output skew, Q0-Q4 PLL disable feature for low frequency testing Balanced Drive Outputs 24mA 132MHz maximum frequency (2xQ output) Functional equivalent to Motorola MC88915 ESD > 2000V Latch-up > C300mA Available in QSOP and PLCC packages
The Samsung M464S1724CT1 is a 16M bit x 64 Synchronous Dynamic RAM high density memory module. The Samsung M464S1724CT1 consists of eight CMOS 8M x 16 bit with 4banks Synchronous DRAMs in TSOP-II 400mil package and a 2K EEPROM in 8-pin TSSOP package on a 144-pin glass-epoxy substrate. Three 0.1uF decoupling capacitors are mounted on the printed circuit board in parallel for each SDRAM. The M464S1724CT1 is ...
Vendor:DIALOGPackage Cooled:TSSOPD/C:N/A
V.253 commands V.80 (H.324 software-stack -compatible) Buzzer generator feature generates oscillation on handshaking Caller ID Data/fax/voice call discrimination Worldwide homologation Compliance with ACPI 1.0 and PCI Power Management Interface 1.0, supporting the D3cold wake-on-ring
Vendor:DIALOGPackage Cooled:N/AD/C:00+
Vendor:LialogPackage Cooled:SSOPD/C:00+
Power247™ PowerEdge™ PowerSaver™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ µSerDes SILENT SWITCHER® SMART START™ SPM™
Vendor:SSOPD/C:2005+
The SOA curve should be interpreted as an absolute maxi- mum rating. Operation at any point on the thermal limit portion of the curve produces the maximum allowable junc- tion temperaturea condition not advised for long-term operation. Although operation on the second-breakdown portion of the curve produces lower temperature, this line is still an absolute maximum. Operation below this limit will prov...
Vendor:NECD/C:05+
When the asynchronous-Preset product term is as- serted (HIGH) the register or latch will immediately be loaded with a HIGH, independent of the clock. When the asynchronous-Reset product term is asserted (HIGH) the register or latch will be immediately loaded with a LOW, independent of the clock. The actual output state will depend on the macrocell polarity selection. The latches must be in latched m...
Vendor:DIAOG
All communications must be terminated by a stop condi- tion. The stop condition is a LOW to HIGH transition of SDA when SCL is HIGH. The stop condition is also used to reset the device during a command or data input sequence and will leave the device in the standby power mode. As with starts, stops are inhibited when outputting data and while a write is in progress.
may be accessed by hardware or software operation. The hardware operation mode can be used by an external pro- grammer to identify the correct programming algorithm for the Atmel product. For details, see Operating Modes (for hardware operation) or Software Product Identification. The manufacturer and device code is the same for both modes. DATA POLLING: The AT49BV16X4(T) features DATA polling to in...
may be accessed by hardware or software operation. The hardware operation mode can be used by an external pro- grammer to identify the correct programming algorithm for the Atmel product. For details, see Operating Modes (for hardware operation) or Software Product Identification. The manufacturer and device code is the same for both modes. DATA POLLING: The AT49BV16X4(T) features DATA polling to in...
Vendor:DIALOGPackage Cooled:02+D/C:BGA
FEATURES High Performance Member of Pin-Compatible TxDAC Product Family 125 MSPS Update Rate 12-Bit Resolution Excellent Spurious Free Dynamic Range Performance SFDR to Nyquist @ 5 MHz Output: 79 dBc Differential Current Outputs: 2 mA to 20 mA Power Dissipation: 185 mW @ 5 V Power-Down Mode: 20 mW @ 5 V On-Chip 1.20 V Reference CMOS-Compatible +2.7 V to +5.5 V Digital Interface Package: 28-Lead SO...
Vendor:DIALOGPackage Cooled:BGA0808D/C:03+
FEATURES High-Performance Member of Pin-Compatible TxDAC Product Family Excellent Spurious-Free Dynamic Range and Noise Performance Twos Complement or Straight Binary Data Format Differential Current Outputs: 2 mA to 20 mA Power Dissipation: 135 mW @ 3.3 V Power-Down Mode: 15 mW @ 3.3 V On-Chip 1.20 V Reference CMOS-Compatible Digital Interface Package: 32-Lead Leadframe Chip Scale Package (LFCS...
Vendor:***Package Cooled:DIP
The MAX8550/MAX8551 integrate a synchronous-buck PWM controller to generate VDDQ, a sourcing and sinking LDO linear regulator to generate VTT, and a 10mA refer- ence output buffer to generate VTTR. The buck controller drives two external N-channel MOSFETs to generate out- put voltages down to 0.7V from a 2V to 28V input with out- put currents up to 15A. The LDO can sink or source up to 1.5A continuous and 3A...
Vendor:BOSCHPackage Cooled:SOP-8D/C:06+
Vendor:BOSCH
During the Program operation, the only valid reads are Data# Polling and Toggle Bit. During the internal Program operation, the host is free to perform additional tasks. Any command issued during the internal Program operation is ignored.
Vendor:FUJIPackage Cooled:TO-3P
Vendor:M/ST/HAS
Vendor:M/ST/HAS
Package Cooled:08+D/C:800
Notes a. Surface Mounted on 1 x 1 FR4 Board. b. Junction-to-foot thermal impedance represents the effective thermal impedance of all heat carrying leads in parallel and is intended for use in conjunction with the thermal impedance of the PC board pads to ambient (RthJA = RthJF + RthPCB-A). It can also be used to estimate chip temperature if power dissipation and the lead temperature of a heat carrying (...
Vendor:DIALOGPackage Cooled:BGAD/C:08+
The MC10/100LVEP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single−ended CLK input operation is limited to a VCC w 3.0 V in PECL mode, or VEE v −3.0 V in NECL mode. The 100 Series contains temperature compensation.
Vendor:BOSCHPackage Cooled:QFP-44D/C:06+
Notes: 7. Full device operation requires linear VCC ramp from VDR to VCC(min.) > 100 µs or stable at VCC(min.) > 100 µs. . 8. BHE BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.
Vendor:BOSCHPackage Cooled:QFP-44D/C:06+
Notes: 7. Full device operation requires linear VCC ramp from VDR to VCC(min.) > 100 µs or stable at VCC(min.) > 100 µs. . 8. BHE BLE is the AND of both BHE and BLE. Chip can be deselected by either disabling the chip enable signals or by disabling both BHE and BLE.
The AD581 can also be used in a two-terminal mode to develop a positive reference. VIN and VOUT are tied together and to the positive supply through an appropriate supply resistor. The per- formance characteristics will be similar to those of the negative two-terminal connection. The only advantage of this connection over the standard three-terminal connection is that a lower pri- mary supply can be used...
Vendor:M/ST/HAS
When battery charging is initiated, the charger enters the prequalification state. In this state, the batteries are charged at 1/20 of the programmed current limit while the charger measures the battery to determine if it can be charged. If the battery voltage is above 2.5V per cell, charging begins. At this time, the batteries are charged at a constant current (Fast Charge state) and a constant voltage (Ful...
Vendor:FCID/C:07+
The Flash program memory supports both parallel programming and in serial In-System Programming (ISP). Parallel programming mode offers gang-programming at high speed, reducing programming costs and time to market. ISP allows a device to be reprogrammed in the end product under software control. The capability to field/update the application firmware makes a wide range of applications possible.
Vendor:FCID/C:07+
Isolated plastic package has Underwriters Laboratory Flammability Classifications 94V-0 Metal to silicon rectifier, majority carrier conduction Low power loss, high efficiency High current capability, low forward voltage drop High surge capability For use in low voltage, high frequency inverters, free wheeling, and polarity protection applications Guardring for overvoltage protection High...
128 x 1 Sensor-Element Organization (1 Not Connected, 1 dummy, 128 real, 1 dummy and 1 Dark Pixel) 385 Dots-Per-Inch (DPI) Sensor Pitch High Linearity and Uniformity for 256 Gray-Scale (8-Bit) Applications High Sensitivity: 1.7V @ 10µW/cm² @ 0.7ms integration time Special Gain Compensation for use with single LED light source Output Referenced to Ground Low Image Lag Single 5V Supply Replacemen...
Parameter VDD to GND RFB, ROFS, R1, RCOM, and VREF to GND Logic Inputs to GND V(IOUT) to GND Input Current to Any Pin except Supplies Thermal Resistance (JA)1 Maximum Junction Temperature (TJ MAX) Operating Temperature Range Storage Temperature Range Lead Temperature Vapor Phase, 60 s Infrared, 15 s
Vendor:FCIPackage Cooled:08+D/C:10000
Vendor:FCID/C:07+
NOTES: 1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations. 2. The termination resistors are excluded from these measurements. 3. If the differential input interface is used, the true input is held LOW and the complementary input is held HIGH.
The IRU1015-33 is a low dropout three terminal fixed 3.3V output regulator with minimum of 1.5A output cur- rent capability. This product is specifically designed to provide well regulated supply for low voltage IC applica- tions requiring 3.3V output. The IRU1015-33 is guaran- teed to have <1.3V dropout at full load current making it ideal to provide well regulated output with supply voltage as low as 4....
Vendor:SOP-5PD/C:03+
The TLH.44.. series was developed for standard applications like general indicating and lighting pur- poses. It is housed in a 3 mm tinted diffused plastic package. The wide viewing angle of these devices provides a high on-off contrast. Several selection types with different luminous inten- sities are offered. All LEDs are categorized in lumi- nous intensity groups. The green and yellow LEDs are c...
Vendor:INFINEONPackage Cooled:SSOP16D/C:06+
Measuring range limited to 180 A max The result of the coercive field of the magnetic circuit With a di/dt of 100 A/µs The primary conductor is best filling the through-hole and/or the return of the primary conductor is above the top of the transducer A list of corresponding tests is available
Vendor:INFINEONPackage Cooled:SSOP16D/C:06+
Measuring range limited to 180 A max The result of the coercive field of the magnetic circuit With a di/dt of 100 A/µs The primary conductor is best filling the through-hole and/or the return of the primary conductor is above the top of the transducer A list of corresponding tests is available
Vendor:N/APackage Cooled:SSOPD/C:98+
The output voltage ripple of the MSK 5115 series voltage regu- lators can be minimized by placing a filter capacitor from the output to ground. The optimum value for this capacitor may vary from one application to the next, but a minimum of 10µF is recommended for optimum performance. Transient load re- sponse can also be improved by placing a capacitor directly across the load.
Vendor:N/AD/C:98+
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not im- plied, damage may occur and reliability may be affected.
Vendor:SMDPackage Cooled:DALLASD/C:2005+
GENERAL DESCRIPTION The MXD2020E/F is an ultra low noise and low cost, dual axis accelerometer built on a standard, submicron CMOS process. The MXD2020E/F measures acceleration with a full-scale range of 1 g. (The MEMSIC accelerometer product line extends from 1 g to 200 g with custom versions available above 10 g.) It can measure both dynamic acceleration (e.g., vibration) and static acceleration ...
Vendor:TSSOP8Package Cooled:800
F0o/RCK Frame Pulse Out/Receive Bit Rate Clock output (Digital). In DN mode a 244 ns wide negative pulse indicating the end of the active channel times of the device to allow daisy chaining. In MOD mode provides the receive bit rate clock to the system.
Vendor:TSSOP8Package Cooled:800
F0o/RCK Frame Pulse Out/Receive Bit Rate Clock output (Digital). In DN mode a 244 ns wide negative pulse indicating the end of the active channel times of the device to allow daisy chaining. In MOD mode provides the receive bit rate clock to the system.
Vendor:N/AD/C:05+
Vendor:N/AD/C:05+
Vendor:POINTPackage Cooled:00+D/C:N/A
Note : 1.All voltages are referenced to VSS = 0V 2.VDD/VDDQ(min) is 3.15V for HY5V22GF-H/P 3.VIH (max) is acceptable 5.6V AC pulse width with 3ns of duration with no input clamp diodes 4.VIL (min) is acceptable -2.0V AC pulse width with 3ns of duration with no input clamp diodes
Vendor:SMLPackage Cooled:00+D/C:N/A
The UCC1800/1/2/3/4/5 family offers a variety of package options, tem- perature range options, choice of maximum duty cycle, and choice of critical voltage levels. Lower reference parts such as the UCC1803 and UCC1805 fit best into battery operated systems, while the higher refer- ence and the higher UVLO hysteresis of the UCC1802 and UCC1804 make these ideal choices for use in off-line power supplies.
Package Cooled:BGA
The Reference Designs section of the Cypress web site provides additional tools for typical USB 2.0 applications. Each reference design comes complete with firmware source and object code, schematics, and documentation. Please visit http://www.cypress.com for more information.
Vendor:SEMELABPackage Cooled:(LX)high-frequency
Low voltage operation Low saturation voltage (<500mV, if IC at 1A current) Brake function Spark killer diodes built in Small and light Small motor driver circuits used in other electronics equipment
Vendor:NECPackage Cooled:小D/C:N/A
Vendor:POINTPackage Cooled:00+D/C:N/A
Note: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) Absolute linearity is utilitzed to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a potentiometer. (3) Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer...
Vendor:1600
• For high reliability transient voltage suppression in low profile surface mount locations requiring easy placement and strain relief • Light weight for airborne or satellite applications • Superior surge quality to protect from ESD and EFT transients per IEC61000-4-2 and -4-4 • Lightning surge protection per IEC61000-4-5 for Class 1 and 2 with source impedance of 42 Ohms ...
Vendor:INFINEOND/C:09+
Vendor:POINTPackage Cooled:00+D/C:N/A
The S52xxM is a u-cap 150mA linear voltage regulator in the SOT-25 package. This regulator has very low dropout voltage and very low ground current. It is designed especially for hand-sets, battery-powered devices and can be controlled by a CMOS or TTL. When the S52xxM is disabled, power consumption drops to nearly zero.
Vendor:SMLPackage Cooled:(LX)high-frequency
Ring Detection. Referring to the block diagram in Figure 1, incoming ring detection is performed by the CH1817 and the RI pin is set Low during the 2 second (typical) ring period and is restored to High for the 4 seconds (typical) between rings. During incoming ring signal activity, the RI output is pulsed at the same frequency as the ringing signal, typically 20Hz. Figure 2 contains additional external circ...
Vendor:POINTPackage Cooled:00+D/C:N/A
(3) Static Electricity Static electricity or surge voltage damages the LEDs. It is recommended that a wrist band or an anti-electrostatic glove be used when handling the LEDs. All devices, equipment and machinery must be properly grounded. It is recommended that measures be taken against surge voltage to the equipment that mounts the LEDs. When inspecting the final products in which LEDs were assemb...
Vendor:SEMELABPackage Cooled:(LX)high-frequency
The 24XX128 supports a bidirectional 2-wire bus and data transmission protocol. A device that sends data onto the bus is defined as a transmitter and a device receiving data as a receiver. The bus must be controlled by a master device which generates the serial clock (SCL), controls the bus access and generates the Start and Stop conditions while the 24XX128 works as a slave. Both master and slave ca...
Vendor:N/APackage Cooled:60D/C:N/A
If the CVBS input signal is to be decoded using an analog color decoder for the PIP, the analog/ digital interface for the inset picture (3 A/D Converter, SDA 9187-2X) performs the conversion of the Y, U, V components into digital signals as well as the generation of the inset clocks BLNI and LL3I.
Vendor:NECD/C:袋装
Vendor:EPCOSPackage Cooled:03+D/C:2524
• Digital Audio Interface that includes two precision clock generators (PCG), an input data port (IDP), an S/PDIF receiver/transmitter, eight channels asynchronous sample rate converters, DTCP cipher, six serial ports, eight serial interfaces, a 20-bit parallel input port, 10 interrupts, six flag outputs, six flag inputs, three timers, and a flexible signal routing unit (SRU) buses
Vendor:EPCOSPackage Cooled:03+D/C:2524
• Digital Audio Interface that includes two precision clock generators (PCG), an input data port (IDP), an S/PDIF receiver/transmitter, eight channels asynchronous sample rate converters, DTCP cipher, six serial ports, eight serial interfaces, a 20-bit parallel input port, 10 interrupts, six flag outputs, six flag inputs, three timers, and a flexible signal routing unit (SRU) buses
Vendor:RAYTHEONPackage Cooled:TQFP32D/C:04+
The external crystal must be connected as close to the chip as possible and should be on the same side of the PCB as the ICS728. There should be no vias between the crystal pins and the X1 and X2 device pins. There should be no signal traces underneath or close to the crystal.
Vendor:RAYTHEONPackage Cooled:TQFP32D/C:04+
The external crystal must be connected as close to the chip as possible and should be on the same side of the PCB as the ICS728. There should be no vias between the crystal pins and the X1 and X2 device pins. There should be no signal traces underneath or close to the crystal.
Vendor:RAYTHEONPackage Cooled:DIPD/C:1995
The 12CWQ10G surface mount, center tap, Schottky rectifier series has been designed for applications requiring low for- ward drop and small foot prints on PC board. Typical applica- tions are in disk drives, switching power supplies, converters, free-wheeling diodes, battery charging, and reverse battery protection.
Vendor:EPCOSPackage Cooled:503D/C:2067
Multi-standard VBI data slicer decoding World Standard Teletext (WST), North-American Broadcast Text System (NABTS), Closed Caption (CC), Wide Screen Signalling (WSS), Video Programming System (VPS), Vertical Interval Time Code (VITC) variants (EBU/SMPTE) etc.
Vendor:NECPackage Cooled:DIP/16D/C:80+
If ISEL is high, then the I2C interface is active. Default values for the I2C registers can be found in the I2C register descriptions section. If ISEL is low, then I2C is disabled and the chip configuration is specified by the configuration pins (BSEL, DSEL, EDGE, VREF) and state pins (PD, DKEN). If ISEL is brought low and then back high, the I2C state machine is reset. The register values are changed t...
Vendor:SEMELABPackage Cooled:(LX)high-frequency
The LPV511 is a micropower operational amplifier that op- erates from a voltage supply range as wide as 2.7V to 12V with guaranteed specifications at 3V, 5V and 12V. The LPV511 exhibits an excellent speed to power ratio, drawing only 880 nA of supply current with a bandwidth of 27 kHz. These specifications make the LPV511 an ideal choice for battery powered systems that require long life through low s...
Vendor:SEMELABPackage Cooled:(LX)high-frequency
The LPV511 is a micropower operational amplifier that op- erates from a voltage supply range as wide as 2.7V to 12V with guaranteed specifications at 3V, 5V and 12V. The LPV511 exhibits an excellent speed to power ratio, drawing only 880 nA of supply current with a bandwidth of 27 kHz. These specifications make the LPV511 an ideal choice for battery powered systems that require long life through low s...