Index "D"Vendor:HITACHIPackage Cooled:N/AD/C:03+
Vendor:RENESASPackage Cooled:SOPD/C:07+
Notes: 7. Tested initially and after any design or process changes that may affect these parameters. 8. Measured with 16-bit counter programmed into each logic block. 9. CI/O for dedicated Inputs, and I/Os with JTAG functionality is 12 pF Max., and for ISREN is 15 pF Max. 10. tER measured with 5-pF AC Test Load and tEA measured with 35-pF AC Test Load.
Vendor:PENESASPackage Cooled:N/AD/C:04+
The receiver is designed for maxi- mum sensitivity to IrDA signals and minimum sensitivity to signals outside the IrDA optical wavelength and frequency modulation of interest. A receiver lens magnifies the effective area of the PIN diode to enhance sensitivity. The lens is integral with the molded package and contains a dye which absorbs visible light. Receiver outputs pulse low when the IR s...
Vendor:HITPackage Cooled:SMD-14
The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100 Ω. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment,...
Vendor:HITACHIPackage Cooled:02+D/C:2035
Tantalum Characteristics Tantalum capacitors with a minimum 10-V rating are recommended on the output bus, but only the AVX TPS Series, Sprague 594/595 Series, or Kemet T495/T510 Series. These AVX, Sprague, and Kemet capacitors are specified over other types due to their higher surge current, excellent power dissipation and ripple current ratings. As a caution, the TAJ Series by AVX is not recommended...
Vendor:HITACHIPackage Cooled:02+D/C:2035
Pulled-high, this pin is a Schmitt trigger input structure. Active low. Applying a nega- tive going pulse to HFI can toggle the HFO once and hence control the hand-free function. The pull-high resistance of HFI is about 200kW typ. An external RC net- work is recommended for input debouncing.
Vendor:HITACHIPackage Cooled:N/AD/C:99+
Vendor:RENESASPackage Cooled:N/AD/C:03+
Vendor:HITD/C:00+
Vendor:HITD/C:00+
Vendor:HITACHIPackage Cooled:N/AD/C:03+
cant bits of this captured value (01) are required by IEEE Std 1149.1. The upper six bits are unique to the SCAN18541T device. SCAN CMOS Test Access Logic devices do not include the IEEE 1149.1 optional identifica- tion register. Therefore, this unique captured value can be used as a pseudo ID code to confirm that the correct device is placed in the appropriate location in the boundary scan chain.
Vendor:HITPackage Cooled:SMD-14
SUMMARY DESCRIPTION The M41ST85Y/W Serial TIMEKEEPER®/Con- troller SRAM is a low power 512-bit, static CMOS SRAM organized as 64 words by 8 bits. A built-in 32.768 kHz oscillator (external crystal controlled) and 8 bytes of the SRAM (see Table 8, page 18) are used for the clock/calendar function and are configured in binary coded decimal (BCD) format. An additional 12 bytes of RAM provide status...
Vendor:RENESASPackage Cooled:DIP16D/C:2003
Data input for AUI interface. This differential signal is coupled through the transformer. An external bias of 2.5V should be applied to these 2 pins. UTP receiving input. This differential signal is connected to the UTP receiving pair through the isolation transformer. An external bias of 2.5V should be applied to these 2 pins.
Vendor:HITACHIPackage Cooled:N/AD/C:04+
Vendor:RENESASPackage Cooled:SOPD/C:03+
A cyclic redundancy check (CRC) error occurs when the FPGA detects corruption in the configuration data. This corruption could be a result of noise coupling on the board such as poor signal integrity on the configuration signals. When this error is signaled by the FPGA (by driving the nSTATUS line low), the controller stops configuration. If the Auto-Restart Configuration After Error option is enabled i...
Vendor:DAEWOOPackage Cooled:N/AD/C:92
3) Two-stage power-fail warning: A separate low-line comparator compares VCC to a preset threshold 120mV above the reset threshold; the low-line and reset thresholds can be programmed externally. 4) Watchdog fault output: Assertion of WDO if the watch- dog input is not toggled within a preset timeout period.
Measuring Diode Linear Parameters The measurement of the five elements which make up the equivalent circuit for a packaged Schottky diode (see Figure 10) is a complex task. Various techniques are used for each element. The task begins with the elements of the diode chip itself.
Vendor:JAPENPackage Cooled:06+D/C:DIP-64
Bank Select Address (BA0 and BA1) defines which bank the ACTIVE, READ, WRITE or PRECHARGE command is being applied. CAS, in conjunction with the RAS and WE, forms the device command. See the Command Truth Table for details on device commands.
Vendor:DIP64D/C:92+
AMDs products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMDs product could create a situation where personal injury, death, or severe property or environmental damage may occur. AMD reserves the right to disc...
Package Cooled:SOP32WD/C:2007+
Vendor:AERPDEVPackage Cooled:EML滤波器D/C:09+
Vendor:AERPDEVPackage Cooled:EML滤波器D/C:09+
Vendor:AERPDEVPackage Cooled:EML滤波器D/C:09+
Vendor:N/APackage Cooled:N/AD/C:08+09+
Vendor:AERODEVPackage Cooled:N/AD/C:4
The two voltage-controlled amplifiers are full Class A current in/current out devices with complementary dB/V gain control ports. The control sensitivities are +6 mV/dB and C6 mV/dB. A resistor divider (attenuator) is used to adapt the sensitivity of an external control voltage to the range of the control port. It is best to use 200 Ω or less for the attenuator resistor to ground.
Vendor:MICAD/C:05+
Vendor:MICAD/C:05+
Vendor:MOTOROLAD/C:07+
The M48T128Y/V TIMEKEEPER® RAM is a 128Kb x 8 non-volatile static RAM and real time clock. The special DIP package provides a fully in- tegrated battery back-up memory and real time clock solution. The M48T128Y/V directly replaces industry standard 128Kb x 8 SRAM.
Vendor:AERPDEVPackage Cooled:EML滤波器D/C:09+
Vendor:AERPDEVPackage Cooled:EML滤波器D/C:09+
Vendor:AERPDEVPackage Cooled:EML滤波器D/C:09+
Vendor:AERPDEVPackage Cooled:EML滤波器D/C:09+
Vendor:AERPDEVPackage Cooled:EML滤波器D/C:09+
Vendor:AERPDEVPackage Cooled:EML滤波器D/C:09+
Vendor:AERPDEVPackage Cooled:EML滤波器D/C:09+
Vendor:N/APackage Cooled:N/AD/C:N/A
Vendor:.D/C:07+
Vendor:STANLEYD/C:C510
Vendor:.D/C:07+
The aperture delay time is the interval between the leading edge transition of the clock input and the instant when the input signal was equal to the held value. It is the difference in time between the digital hold switch delay and the analog signal propagation time.
Package Cooled:CAN
Package Cooled:CAN
Package Cooled:CAN
Vendor:DATANETPackage Cooled:N/AD/C:89
The MAXQ3120 microcontroller is a high-performance, 16-bit microcontroller that incorporates dual, true-differen- tial, 16-bit sigma-delta analog-to-digital converters (ADCs), a liquid-crystal display (LCD) interface that can drive up to 112 segments, and a real-time clock (RTC) module with a dedicated battery-backup supply. The MAXQ3120 is uniquely suited for the single-phase elec- tricity metering market, ...
Vendor:SHARPPackage Cooled:QFP
* Metal of silicon rectifier, majority carrier conducton * Guard ring for transient protection * Low power loss, high efficiency * High current capability, low VF * High surge capacity * Plastic package has UL flammability classification 94V-0 * For use in low voltage, high frequency inverters, free whelling, and polarity protection applications
Vendor:NSPackage Cooled:DIPD/C:02+
The DN-YD11 will drive the data bus when /OE is asserted to a low state. If /OE is asserted after the memory access time has been satisfied, the data bus will be driven with valid data. If /OE is asserted prior to completion of the memory access, the data bus will be driven when valid data is available. This feature minimizes supply current in the system by eliminating transients due to invalid data....
Vendor:SILICONID/C:07+
Vendor:SILICONID/C:07+
Vendor:AMIS/CERBERUSPackage Cooled:04+D/C:SOP-20P
The CD54AC163/3A and CD54ACT163/3A are synchronous presettable binary counters that utilize the Harris Advanced CMOS Logic technology. The CD54AC163/3A and CD54ACT163/3A are reset synchronously with the clock. Counting and parallel presetting are both accomplished syn- chronously with the negative-to-positive transition of the clock.
D/C:07+
respective output channel will be enabled after OE /SW is pulled down to low. Mode selection input terminal: in the Mode Switching phase, LE/MOD/CA couldnt strobe serial data but its level is used for determining the next mode to which MBI5170 is going to switch. When LE/MOD/CA is high, the next mode is the Current Adjust Mode; when low, the next mode is the Normal Mode. Configuration data strobe input ter...
D/C:45000
READY/BUSY: Indicates status of the internal WSM. When low, it indicates that the WSM is busy performing an operation. RY/BY# high indicates that the WSM is ready for new operations (or WSM has completed all pending operations), or Erase is Suspended, or the device is in deep power-down mode. This output is always active (i.e., not floated to tri-state off when OE » or CE »0, CE »1 are hi...
D/C:07+
The CD4085B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
Vendor:USAD/C:08+
Note b: ICC and ICC are dependent on output loading and cycle rate. The specified values are obtained with outputs unloaded.13 Note c: ICC is the average current required for the duration of the STORE cycle (tSTORE ) .2 Note d: E VIH will not produce standby current levels until any nonvolatile cycle in progress has timed out.
D/C:07+
Since the chip includes an internal tuning capacitor, only the addition of an external coil antenna is required to form the complete tag or card. The chip includes an array of read/write EEPROM, of which 224 bits are available for user defined purposes. All necessary power generation, regulation and data modulation/demodulation circuitry is on the chip. The communication details are programmable.
D/C:1500
Vendor:COILCRAFTD/C:06+
This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low side synchronous rectifier operation, providing an extremely low RDS(ON) in a small package.
Vendor:COILCRAFTD/C:06+
This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low side synchronous rectifier operation, providing an extremely low RDS(ON) in a small package.
D/C:27680
The HYM71V653201 H-Series are Dual In-line Memory Modules suitable for easy interchange and addition of 256Mbytes memory. The HYM71V653201 H-Series are offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.
D/C:27680
The HYM71V653201 H-Series are Dual In-line Memory Modules suitable for easy interchange and addition of 256Mbytes memory. The HYM71V653201 H-Series are offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.
D/C:2500
D/C:2500
Vendor:COILCRAFT/线艺Package Cooled:/D/C:02+
Vendor:USAD/C:08+
Unless otherwise noted TC = 25C, CC = 18pF, RC = 2.2KΩ. DC input specifications are value given. Power supply voltage is typical rating. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF. Derate maximum supply voltage .5 V/C below case temperature of 25C. No derating is needed above TC = 25C. Sampl...
D/C:668
D/C:07+
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warrant...
D/C:07+
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warrant...
Vendor:COILCRAFTD/C:06+
Up to 630 Mbps Simplex (Point-to-Point) and Half-Duplex (Multipoint) Interface Typical Differential Output Voltage of 340 mV Into a 50-Ω Load Integrated 110-Ω Line Termination on LVDM1677 Product Propagation Delay Time: − Driver: 2.5 ns Typ − Receiver: 3 ns Typ Recommended Maximum Transfer Rate: − Driver: 650 M-Transfers/s − Receiver: 350 M-Transfers/s Driver is High...
Vendor:3-4daysD/C:06+
Vendor:COID/C:06+
Vendor:coincraftPackage Cooled:82805D/C:25594
to 30 Mbps Bus-Pin ESD Protection Exceeds 12 kV HBM Compatible With ANSI Standard TIA/EIA-485-A and ISO 8482:1987(E) Low Skew Designed for Multipoint Transmission on Long Bus Lines in Noisy Environments Very Low Disabled Supply-Current Requirements . . . 700 µA Maximum Common Mode Voltage Range of −7 V to 12 V Thermal-Shutdown Protection Driver Positive and Negative Current Limiting Open-...
D/C:07+
TAOperating free-air temperature−55125−4085C NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
D/C:07+
Vendor:COILCRAFTD/C:06+
Non-inverting 3-state outputs 2-way asynchronous data bus communication Low-power dissipation Complies with JEDEC standard no. 7A ESD protection: x HBM EIA/JESD22-A114-B exceeds 2000 V x MM EIA/JESD22-A115-A exceeds 200 V. s Multiple package options s Specified from −40 C to +80 C and from −40 C to +125 C.
D/C:61250
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2004. All Rights Reserved All other trademarks mentioned are the property of their respective owners.
Vendor:COILCRAFTD/C:07+环保
Vendor:CoilcraftPackage Cooled:N/AD/C:94
Typical values at 25C, min, max values are across the full temperature range TMIN = C40C to TMAX = 85C, AVDD = DRVDD = 3.3 V, sampling rate = 170 MSPS, 50% clock duty cycle, C1 dBFS differential analog input, internal reference mode, LVDS data output (unless otherwise noted)
D/C:07+
• Register interlock functions: Facilitating coding in assemblers • On-chip multiplier supported at the instruction level. Signed 32-bit multiplication: 5 cycles. Signed 16-bit multiplication: 3 cycles • Interrupt (PC, PS save): 6 cycles, 16 priority levels • Harvard architecture allowing program access and data access to be executed simultaneously • FR family instructio...
Vendor:coilcPackage Cooled:coilcD/C:dc99
AIC1742 is a low noise, low dropout linear regulator, and is housed in a small SOT-23-5 package. The device is in the ON state when the SHDN pin is set to logic high level. A low dropout voltage of 90mV at 50mA load current is performed. It offers high precision output voltage of 2%. The quality of low quiescent current and low dropout voltage makes this device ideal for battery power applications. The in...
D/C:07+
Caution: The BiCMOS inherent to this design of this component increases the components suscep- tibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
D/C:07+
Caution: The BiCMOS inherent to this design of this component increases the components suscep- tibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.