DTI2260G

Vendor:HITPackage Cooled:04+D/C:PLCC44

DTI2551

DTIC-3A

Vendor:DALLASPackage Cooled:PLCC

Input voltage range: 2.25V to 5.5V Ultra-low IQ: Only 16µA operating current Stable with ceramic output capacitor Low dropout voltage of 45mV @ 100mA High output accuracy - 1.0% initial accuracy - 2.0% over temperature • Thermal Shutdown Protection • Current Limit Protection

DTIC-3A

Vendor:DALLASPackage Cooled:PLCC

Input voltage range: 2.25V to 5.5V Ultra-low IQ: Only 16µA operating current Stable with ceramic output capacitor Low dropout voltage of 45mV @ 100mA High output accuracy - 1.0% initial accuracy - 2.0% over temperature • Thermal Shutdown Protection • Current Limit Protection

DTL100AA120

out-of-lock with the input reference. The LOL condition is also used by the AutoSwitch circuit to detect a lost reference, as described in following sections. LOL is also used by the Hitless Switching and Phase Build-out functions (optional device features). To ensure reliable operation of LOL and guard against false out-of-lock indications, the following conditions should be met:

DTL340408

Isolated Power Supply: Dual regulated supplies, completely isolated from the input power terminals (2500V dc isolation), provides the capability to excite floating signal conditioners, front end buffer amplifiers as well as remote transducers such as thermistors or bridges.

DTM10D(N)

DTM10G(N)

DTM12C(N)

DTM1716

D/C:08+/09+

The SCAN926260 integrates six 10-bit deserializer devices into a single chip. The SCAN926260 can simultaneously deserialize up to six data streams that have been serialized by National Semiconductors 10-bit Bus LVDS serializers. In addition, the SCAN926260 is compliant with IEEE standard 1149.1 and also features an At-Speed Built-In Self Test (BIST). For more details, please see the sections titled &qu...

DTM1717

Vendor:ADPackage Cooled:模块18

DTM1717

Vendor:ADPackage Cooled:模块18

DTM6C(N)

DTM6G(N)

DTM8F(N)

DTML007APB

DTML012

DTN-ACU096S 550

Vendor:菱庆Package Cooled:2008D/C:1,500

DTN-M502J3G

Time taken for PLL lock voltage to achieve 90% transition point of the control signal and the VCO frequency to achieve within 470kHz of the final frequency. The time taken to acquire PLL acquisition is governed by the PLL loop filter (C12, C1 and R2) and the crystal oscillator components (XTAL1, C13 and C14). The dominant term for PLL aquistion is the start- up time of the crystal oscillator circuit, prov...

DTN-T202G300JS-T

Vendor:MITSUBISHI MATERIALSPackage Cooled:N/AD/C:08+

Addresses and data needed for the programming and erase operations are internally latched during write cycles. The host system can detect comple- tion of a program or erase operation by observing the RY/BY# pin or by reading the DQ[7] (Data# Polling) and DQ[6] (Toggle) status bits. Hardware data protection measures include a low VCC de- tector that automatically inhibits write operations during powe...

DTN-T202I500JS-T

D/C:4000

n One CD-ROM containing summary and full datasheets, datasheets with electrical and mechanical characteristics, application notes and getting started documents for all development boards and AT91 microcontrollers. An AT91 software package with C and assembly listings is also provided. This allows the user to begin evaluating the AT91 ARM® Thumb® 32-bit microcontroller quickly.

DTN-T203C471LS-T

Vendor:HITACHIPackage Cooled:/D/C:03+

the device has a Sector Group Protect function which hardware write protects selected sector groups. The sector group protect and unprotect features can be enabled in a PROM programmer. Temporary Sector Unprotect, which requires a high voltage, allows in-system erasure and code changes in previously protected sectors.

DTN-T203C471LS-T

Vendor:HITACHIPackage Cooled:/D/C:03+

the device has a Sector Group Protect function which hardware write protects selected sector groups. The sector group protect and unprotect features can be enabled in a PROM programmer. Temporary Sector Unprotect, which requires a high voltage, allows in-system erasure and code changes in previously protected sectors.

DTR-03-S

Vendor:TRANSCLPackage Cooled:303D/C:10

The HT812L0 is a single chip PCM voice and sound effect synthesizer. It provides 2.8 seconds of voice capacity at a 6kHz sampling rate (FSR=6kHz) and 32 sections of sound ef- fects/simple melodies. A maximum of 8 keys or 44 MATRIX are available. Of the 8 keys or 44

DTR-03-S

Vendor:TRANSCLPackage Cooled:303D/C:10

The HT812L0 is a single chip PCM voice and sound effect synthesizer. It provides 2.8 seconds of voice capacity at a 6kHz sampling rate (FSR=6kHz) and 32 sections of sound ef- fects/simple melodies. A maximum of 8 keys or 44 MATRIX are available. Of the 8 keys or 44

DTR1062MM

DTR125033MMTB

DTR-1250-MM

Package Cooled:(LX)high-frequency

The DTR-1250-MM is a monolithic phase-locked loop (PLL) system especially designed for data communications applications. It is particularly suited for FSK modem applications. It operates over a wide supply voltage range of 4.5 to 20V and a wide frequency range of 0.01Hz to 300kHz. It can accommodate analog signals between 10mV and 3V, and can interface with conventional DTL, TTL, and ECL logic famili...

DTR-1250-MM

Package Cooled:(LX)high-frequency

The DTR-1250-MM is a monolithic phase-locked loop (PLL) system especially designed for data communications applications. It is particularly suited for FSK modem applications. It operates over a wide supply voltage range of 4.5 to 20V and a wide frequency range of 0.01Hz to 300kHz. It can accommodate analog signals between 10mV and 3V, and can interface with conventional DTL, TTL, and ECL logic famili...

DTR1250MMGB

DTR1250MMLSCACMS1ALC

DTR-1250-SM-GB-H5-IR2-HW

Vendor:OCPD/C:N/A

The read operation of the W29EE512 is controlled by #CE and #OE, both of which have to be low for the host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip is de-selected and only standby power will be consumed. #OE is the output control and is used to gate data from the output pins. The data bus is in high impedance state when either #CE or #OE is high. Refer to...

DTR1250SMLCL2M

DTR-1250-SM-LS-H7-M

Vendor:OCPD/C:na

The three transmitter operating modes C transmit ASK, transmit OOK, and power-down (sleep), are controlled by the Modulation & Bias Control function, and are selected with the CNTRL1 and CNTRL0 control pins. Setting CNTRL1 high and CNTRL0 low place the unit in the ASK transmit mode. Setting CNTRL1 low and CNTRL0 high place the unit in the OOK transmit mode. Setting CNTRL1 and CNTRL0 both low place the uni...

DTR125SM

DTR156-3.3

DTR15633

DTR15633A

DTR15633SM2AL0LR1

DTR15633SML0LRI

DTR156LCAME

DTR156SM

DTR156SM2L0IR

DTR156SMFCL0LR1

DTR-156-SM-L0-LR1

DTR156SML3IR

DTR-156-SM-LS-L0-LR1-ME

DTR156SMLSL31RMSE

DTR156SMLSL3IRMEVAL

DTR62233SM2STAL3IR

DTR622SMAHPLR2

DTR622SMEHL3IR

DTR-622-SM-LC-L3-IR-M

DTR622SMLSAL3IRM

DTR807-003

DTR826-003

DTS1010

DTS123JUA

DTS2.3

Reading from the device is accomplished by taking Chip Enable 1 (CE1) LOW and Chip Enable 2 (CE2) HIGH and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O8 to I/O15. See the truth table...

DTS-23F

DTS-4

DTS401

Vendor:SPackage Cooled:金属帽D/C:8244

Ground referenced outputs High PSRR Available in space-saving TSSOP package Ultra low current shutdown mode Improved pop & click circuitry eliminates noises during turn-on and turn-off transitions n 1.4 C 3.6V operation n No output coupling capacitors, snubber networks, bootstrap capacitors n Shutdown either channel independently

DTS403

DTS4061

DTS4066

Vendor:WPackage Cooled:金属帽D/C:422

The Read Manufacturer ID and Read Device ID operations read the JEDEC assigned manufacturer identification and the manufacturer assigned device identification codes. These codes may be used to determine the actual device resident in the system.

DTS4074

DTS409

DTS410

Vendor:SPackage Cooled:金属帽D/C:8907

Stapleford™ is a highly integrated, single- chip Ethernet switch with 24 non-blocking ports. High performance with easy migration paths and comprehensive System Solutions enableing ultra-short time-to-market and market leading system cost.

DTS411

Vendor:WPackage Cooled:金属帽D/C:411

WP#/ACC input accelerates programming time (when high voltage is applied) for greater throughput during system production. Protects first or last sector regardless of sector protection settings Hardware reset input (RESET#) resets device Ready/Busy# output (RY/BY#) detects program or erase cycle completion

DTS413

DTS423

DTS424

DTS425

An on-chip RF oscillator is provided to reduce laser mode hopping noise during read mode. Swing can be set independently for the two selectable outputs with two different resistors. Oscillation is enabled by a high signal at the ENOSC pin. Complete output current and oscillator switch-off is achieved by a low signal at the ENABLE input.

DTS430

D/C:06+

DTS430

D/C:06+

DTS-4W

DTS519

DTS-6

Vendor:MKKD/C:93

DTS-61N-V

DTS701

Vendor:SPackage Cooled:298

The ULx2803A, ULx2803LW, ULx2823A, and ULN2823LW have series input resistors selected for operation directly with 5 V TTL or CMOS. These devices will handle numerous interface needs particularly those beyond the capabilities of standard logic buffers.

DTS702

DTS710

DTS801

DTS-801

DTSA-61R-V

DTSA-62N-V

Vendor:DIPTRONICSD/C:PUSHBUTTONR/ADTSA-62N-VH=3.85mmDIP4

Output Capacitors (Optional) For applications with load transients (sudden changes in load current), regulator response will benefit from an external output capacitance. The recommended output capacitance of 330 µF will allow the module to meet its transient response specification (see product data sheet). For most applications, a high quality computer-grade aluminum electrolytic capacitor is ad...

DTSA-644K-V

DTSD0703-101

DTSD0703-150

D/C:07+

DTSD0703-151

D/C:07+

The 74LVC(H)16244A is a high-performance, low power, low voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 Volt. These features allow the use of these devices as a mixed 3.3 and 5 V environment.

DTSD0703-221

D/C:07+

This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

DTSD0703-330

D/C:07+

Keep the output leads as short as possible. In the video frequency range, even a few inches of wire have significant inductance, raising the interconnection impedance and limit- ing the output current slew rate. Furthermore, the skin effect increases the resistance of heavy wires at high frequencies. Multistrand Litz Wire is recommended to carry large video currents with low losses.

DTSD1205-330

D/C:07+

DESCRIPTION This high performance Transil series has been de- signed to fit high temperature environment such as automotive applications, using surface mount technology. These devices are using high reliabil- ity planar technology resulting in high performanc- es in voltage regulation mode and low leakage current at high temperature.

DTS-EXAC

Vendor:SOP28Package Cooled:DAEWOOD/C:04+

DTSF-61N-V(ROHS)

DTSM-63R-V

DTSM644N

DTT120UB

D/C:07+

Limited range ADC : VDD > Vref > Vgnd, Vgnd=VDD/2. For power saving one might connect the Vgnd and the Vref resistor divider chain onto a port B output to VSS. This output should be driving VDD during the conversion and driving Vss or high impedance in the ADC off state.

DTT140UB

D/C:07+

Flexible mapping of MUXselx to MUXx allows the user to change the MUX select assignment after the ispGDXVA device has been soldered to the board. Figure 1 shows that the I/O cell can accept (by programming the appro- priate fuses) inputs from the MUX outputs of four adjacent I/O cells, two above and two below. This enables cascad- ing of the MUXes to enable wider (up to 16:1) MUX implementations.

DTT140UB

D/C:07+

Flexible mapping of MUXselx to MUXx allows the user to change the MUX select assignment after the ispGDXVA device has been soldered to the board. Figure 1 shows that the I/O cell can accept (by programming the appro- priate fuses) inputs from the MUX outputs of four adjacent I/O cells, two above and two below. This enables cascad- ing of the MUXes to enable wider (up to 16:1) MUX implementations.