Index "D"I. Introduction In portable communication equipment, such as cellular phones and digital cordless phones, manufacturers are trying to replace as many discrete devices as possible with high-density ICs to be competitive in size, weight, power dissipation, and price. In a number of recent papers low power LNAs for S-band have been described [1,2,3]. These LNAs were fabricated using some sophisticated GaAs fu...
NOTES : 1. In case of 40MHz Frequency, CL1 can be supported. 2. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life is potentially at stake. Please contact to the memory marketing team in samsung electronics when considering the use of a product contained herein for any specific pur pose, such as medical, aerospace, nuclear, military, ...
The output voltage of the PT6440 Series ISRs may be adjusted higher or lower than the factory trimmed pre- set voltage with the addition of a single external resistor. Table 1 gives the allowable adjustment range for each model for either series as Va (min) and Va (max).
During initial startup, the VCC voltage rise is monitored and gate drives are held low until a typical VCC rising threshold of 9.9V is reached. Once the rising VCC threshold is exceeded, the PWM input signal takes control of the gate drives. If VCC drops below a typical VCC falling threshold of 9.1V during operation, then both gate drives are again held low. This condition persists until the VCC voltag...
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG2000 series - Hermetic - with -55C TA 125C and SG2000 series - Plastic - with 0C TA 70C. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.)
Vendor:NECPackage Cooled:DIP42
The read operation of the W29EE512 is controlled by #CE and #OE, both of which have to be low for the host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip is de-selected and only standby power will be consumed. #OE is the output control and is used to gate data from the output pins. The data bus is in high impedance state when either #CE or #OE is high. Refer to...
Vendor:NECPackage Cooled:DIP42
The read operation of the W29EE512 is controlled by #CE and #OE, both of which have to be low for the host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip is de-selected and only standby power will be consumed. #OE is the output control and is used to gate data from the output pins. The data bus is in high impedance state when either #CE or #OE is high. Refer to...
Vendor:NECPackage Cooled:DIP
Perpendicular Recording Drive R W Head and Pre-Erase Head PC87334 Composite Serial Data Reciever FIFO Trigger Level EPP 1 7 Address Write EPP 1 7 Address Read EPP Write with ZWS EPP 1 9 Address Write EPP 1 9 Address Read ECP (Forward) Write Cycle ECP (Backward) Read Cycle IDE Interface Signal Equations (Non-DMA) Clock Timing Microprocessor Read Timing Microprocessor Write Timing Baud Out Timing Tran...
D/C:95
The D56104C allows designers to easily integrate phone functions with other audio functions such as MP3 playback and voice recording. Mono inputs and outputs are provided to connect to an external voice codec. The on-chip headphone driver can distinguish between a stereo headphone and mono headset, and route the signals accordingly.
Lead Pull: 5 pounds (2.3 kilograms) for one minute. No physical damage. Lead Bend: After three complete consecutive bends, no damage. Marking: Sprague® trademark, type or part number, capacitance and voltage. DC Life Test: 125% of rated voltage for 250 hours @ + 85C. No open or short circuits. No visible damage. Maximum ∆ CAP = 10%. Minimum IR = 50% of initial limit. Maximum DF = 1.25%. Humid...
Notes: 1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 1.3V, input pulse levels of 0.4V to 2.2V and output loading specified in Figure 1. 2. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100% tested.
Vendor:OKI
The KM23C4100D(E)T is a fully static mask programmable ROM fabricated using silicon gate CMOS process technology, and is organized either as 524,288 x 8 bit(byte mode) or as 262,144 x 16 bit(word mode) depending on BHE voltage level.(See mode selection table) This device operates with a 5V single power supply, and all inputs and outputs are TTL compatible. Because of its asynchronous operation, it requires n...
Vendor:OKIPackage Cooled:BGAD/C:2
Note 1: The deviation parameters, Vref(dev) and Iref(dev) are defined as the differences between the maximum and the minimum values obtained over the rated tem- perature range. The average full range temperature coef- ficient of the reference input voltage is defined as:
Vendor:OKIPackage Cooled:TSOP
Vendor:NATPackage Cooled:01+D/C:N/A
Vendor:OKIPackage Cooled:TSOPD/C:99+
Development Kits are available from the following distributors: Digi-Key, Avnet, Arrow, and Future. The Cypress Online Store at http://www.onfulfillment.com/cypressstore/ contains develop- ment kits, C compilers, and all accessories for PSoC develop- ment. Click on PSoC (Programmable System-on-Chip) to view a current list of available items.
Vendor:N/APackage Cooled:N/AD/C:08+09+
Vendor:N/APackage Cooled:N/AD/C:08+09+
Vendor:NECPackage Cooled:TSOPD/C:00+
Timer Timer 0 : 16-bit timer/counter With 2-bit prescaler + 8-bit programmable prescaler Mode 0 : Two 8-bit timers with a programmable prescaler Mode 1 : 8-bit timer with a programmable prescaler + 8-bit counter Mode 2 : 16-bit timer with a programmable prescaler Mode 3 : 16-bit counter The resolution of timer is 1 tCYC. Base timer Generate every 500ms overflow for a clock appli...
Vendor:NECPackage Cooled:TSOPD/C:00+
Timer Timer 0 : 16-bit timer/counter With 2-bit prescaler + 8-bit programmable prescaler Mode 0 : Two 8-bit timers with a programmable prescaler Mode 1 : 8-bit timer with a programmable prescaler + 8-bit counter Mode 2 : 16-bit timer with a programmable prescaler Mode 3 : 16-bit counter The resolution of timer is 1 tCYC. Base timer Generate every 500ms overflow for a clock appli...
Vendor:NECPackage Cooled:TSOPD/C:00+
Serial-test information is conveyed by means of a 4-wire test bus or TAP that conforms to IEEE Standard 1149.1-1990. Test instructions, test data, and test control signals all are passed along this serial-test bus. The TAP controller monitors two signals from the test bus, TCK and TMS. The TAP controller extracts the synchronization (TCK) and state control (TMS) signals from the test bus and generates the...
Vendor:NECPackage Cooled:TSOPD/C:00+
Serial-test information is conveyed by means of a 4-wire test bus or TAP that conforms to IEEE Standard 1149.1-1990. Test instructions, test data, and test control signals all are passed along this serial-test bus. The TAP controller monitors two signals from the test bus, TCK and TMS. The TAP controller extracts the synchronization (TCK) and state control (TMS) signals from the test bus and generates the...
Vendor:PHILPackage Cooled:01+D/C:TO-3
The XC2164 series are high frequency, low current consumption CMOS ICs with built-in crystal oscillator and divider circuits. For fundamental oscillation, output is selectable from any one of the following values for f0 : f0/1, f0/2, f0/4, f0/8. With oscillation capacitors and a feedback resistor built-in, it is possible to configure a stable fundamental oscillator or 3rd overtone oscillator using only an ex...
Vendor:PHILPackage Cooled:01+D/C:TO-3
The XC2164 series are high frequency, low current consumption CMOS ICs with built-in crystal oscillator and divider circuits. For fundamental oscillation, output is selectable from any one of the following values for f0 : f0/1, f0/2, f0/4, f0/8. With oscillation capacitors and a feedback resistor built-in, it is possible to configure a stable fundamental oscillator or 3rd overtone oscillator using only an ex...
Vendor:PHILPackage Cooled:01+D/C:TO-3
If the centering error is less than 25 ppm, no adjustment is needed. If the centering error is more than 25ppm negative, the PC board has excessive stray capacitance and a new PCB layout should be considered to reduce stray capacitance. (Alternately, the crystal may be re-specified to a higher load capacitance. Contact ICS MicroClock for details.) If the centering error is more than 25 ppm positive, ...
Vendor:PHILPackage Cooled:01+D/C:TO-3
If the centering error is less than 25 ppm, no adjustment is needed. If the centering error is more than 25ppm negative, the PC board has excessive stray capacitance and a new PCB layout should be considered to reduce stray capacitance. (Alternately, the crystal may be re-specified to a higher load capacitance. Contact ICS MicroClock for details.) If the centering error is more than 25 ppm positive, ...
D/C:02+
Output current rating may be restricted to a value determined by system concerns and factors. These include: system duty cycle and timing, ambient temperature, and use of any heatsinking and/or forced cooling. For reliable operation, the specified maximum junction temperature should not be exceeded.
D/C:02+
Output current rating may be restricted to a value determined by system concerns and factors. These include: system duty cycle and timing, ambient temperature, and use of any heatsinking and/or forced cooling. For reliable operation, the specified maximum junction temperature should not be exceeded.
Vendor:NECD/C:CCD现货
Vendor:FAIPackage Cooled:TO220-3D/C:99+
Detect voltage range: 0.8V (N-ch open drain) Operating voltage range : 0.7V ~ 6.0V Detect voltage temperature characteristics : TYP 100ppm/C Output configuration: N-channel open drain Ultra small package: SOT-23 (150mW) mini-mold : SOT-89 (500mW) mini-mold : TO-92 (300mW)
Vendor:in stockPackage Cooled:EupecD/C:08+
The Intel 87C51 80C51BH 80C31BH is a single-chip control-oriented microcontroller which is fabricated on Intels reliable CHMOS III-E technology Being a member of the MCS 51 controller family the 87C51 80C51BH 80C31BH uses the same powerful instruction set has the same architecture and is pin-for- pin compatible with the existing MCS 51 controller family of products
Vendor:NECD/C:05+
Integral Nonlinearity (INL) 1, 2 Integral Nonlinearity (INL)2 Offset Error (Unipolar, Bipolar)3 Offset Drift vs. Temperature1 Gain Error3 Gain Drift vs. Temperature1 Positive Full-Scale Error3 Positive Full-Scale Drift vs. Temp.1 Bipolar Negative Full-Scale Error4 Power Supply Sensitivity Channel-to-Channel Isolation ADC PERFORMANCE CHOPPING DISABLED Conversion Time Rate No Missing Cod...
Vendor:NECD/C:05+
Integral Nonlinearity (INL) 1, 2 Integral Nonlinearity (INL)2 Offset Error (Unipolar, Bipolar)3 Offset Drift vs. Temperature1 Gain Error3 Gain Drift vs. Temperature1 Positive Full-Scale Error3 Positive Full-Scale Drift vs. Temp.1 Bipolar Negative Full-Scale Error4 Power Supply Sensitivity Channel-to-Channel Isolation ADC PERFORMANCE CHOPPING DISABLED Conversion Time Rate No Missing Cod...
Vendor:DIPPackage Cooled:NSD/C:04+
Drain-to-Source Breakdown Voltage Gate Threshold Voltage Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Zero Gate Voltage Drain Current Static Drain-to-Source" ➃ On-State Resistance (TO-3) Static Drain-to-Source" ➃ On-State Resistance (TO-254AA) Diode Forward Voltage" ➃
STANDARD DEFINITION MODE Hue Accuracy Color Saturation Accuracy Chroma Nonlinear Gain Chroma Nonlinear Phase Chroma/Luma Intermodulation Chroma/Luma Gain Inequality Chroma/Luma Delay Inequality Luminance Nonlinearity Chroma AM Noise Chroma PM Noise Differential Gain Differential Phase SNR SNR SNR
Vendor:N/APackage Cooled:550
Vendor:STPackage Cooled:TO-23
Conversion Time Acquisition Time CLOCK Period CLOCK HIGH Time CLOCK LOW Time CONVST LOW to CLOCK HIGH CONVST LOW Time CONVST LOW to BUSY HIGH CS LOW to CONVST LOW CONVST HIGH CLOCK HIGH to BUSY LOW CS HIGH CS LOW to RD LOW RD HIGH to CS HIGH RD LOW Time RD LOW to Data Valid Data Hold from RD HIGH BYTE Change to RD LOW(3) RD HIGH Time
Vendor:DENSOPackage Cooled:DIP64D/C:97+
properties. Used for insulation and protection of cables, harnesses, and electrical and electronic components in enclosed spaces, such as in marine applications, mass transit systems, and offshore installations, to reduce toxicity risks, or where equipment would be irreparably damaged by corrosive products of combustion.
Vendor:NSPackage Cooled:CDIP8D/C:9820
COMPLETE TELETEXT DECODER INCLUD- ING ON-CHIP 8 PAGES MEMORY, REDUC- ING EMC RADIATIONS UPWARD SOFTWARE AND HARDWARE COMPATIBLE WITH PREVIOUS SGS-THOM- SONs DECODER SDA5243 DIRECT INTERFACE TO AN EXTERNAL STATIC RAM OF 8kBYTES FOR UP TO 16 PAGES APPLICATION AUTOMATIC SELECTION OF UP TO SIX NA- TIONAL LANGUAGES FOUR SIMULTANEOUS PAGE REQUESTS DISPLAY OF THE 25TH STATUS ROW MICROPROCESSOR CONT...
Vendor:NSPackage Cooled:CDIP8D/C:9820
COMPLETE TELETEXT DECODER INCLUD- ING ON-CHIP 8 PAGES MEMORY, REDUC- ING EMC RADIATIONS UPWARD SOFTWARE AND HARDWARE COMPATIBLE WITH PREVIOUS SGS-THOM- SONs DECODER SDA5243 DIRECT INTERFACE TO AN EXTERNAL STATIC RAM OF 8kBYTES FOR UP TO 16 PAGES APPLICATION AUTOMATIC SELECTION OF UP TO SIX NA- TIONAL LANGUAGES FOUR SIMULTANEOUS PAGE REQUESTS DISPLAY OF THE 25TH STATUS ROW MICROPROCESSOR CONT...
Package Cooled:PLCC28D/C:08+
The AV9155 is designed to accept a 14.318 MHz crystal as the input reference. With some external changes, it is possible to use a crystal oscillator or clock input. Please see application note AN04 for details on driving the AV9155 with a clock.
Package Cooled:PLCC28D/C:08+
The AV9155 is designed to accept a 14.318 MHz crystal as the input reference. With some external changes, it is possible to use a crystal oscillator or clock input. Please see application note AN04 for details on driving the AV9155 with a clock.
Vendor:105D/C:N/A
This new generation of high density MOSFETs from Zetex utilises a unique structure that combines the benefits of low on-resistance with fast switching speed. This makes them ideal for high efficiency, low voltage, power management applications.
Vendor:INTELD/C:DIP
The MC623 is a 3V solidCstate, programmable temperature sensor designed for use in thermal management applications. It features dual thermal interrupt outputs (LOW LIMIT and HIGH LIMIT) each of which program with a single external resistor. The HIGH LIMIT and LOW LIMIT outputs are driven active (high) when measured temperature exceeds the userCprogrammed limits. The CONTROL output is driven active (hig...
Vendor:INSTELD/C:00+
The 16K EEPROM devices require an 8-bit device ad- dress word following a start condition to enable the chip for a read or write operation. The device address word consist of a mandatory one, zero sequence for the first four most significant bits (refer to the diagram showing the Device Address). This is common to all the EEPROM device.
Vendor:INSTELD/C:00+
The 16K EEPROM devices require an 8-bit device ad- dress word following a start condition to enable the chip for a read or write operation. The device address word consist of a mandatory one, zero sequence for the first four most significant bits (refer to the diagram showing the Device Address). This is common to all the EEPROM device.
Vendor:INTELPackage Cooled:FCDIP24D/C:0240+
Fixed Output Voltages of 2.048 V, 2.5 V, 3 V, 4.096 V, 5 V, and 10 V Tight Output Tolerances and Low Temperature Coefficient C Max 0.1%, 100 ppm/C C A Grade C Max 0.2%, 100 ppm/C C B Grade C Max 0.5%, 100 ppm/C C C Grade C Max 1.0%, 150 ppm/C C D Grade Low Output Noise35 µVRMS Typ Wide Operating Current Range45 µA Typ to 15 mA Stable With All Capacitive Loads; No Output Capacitor Required A...