E3-ES

Vendor:InfineonD/C:07+

E3GF-GA

Vendor:NSD/C:84

E3ICT32L

Vendor:TAIWANPackage Cooled:TO92

Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) IEEE 1284 Compliant Enhanced Capabilities Port (ECP) ChiProtect Circuitry for Protection Against Damage Due to Printer Power- On 480 Address, Up to 15 IRQ and Three DMA Options

E3MIO2135211 01

E3MT041202B12

E3MT050752R1 C02

E3MT05086281

E3MT050862R1 02

E3MT0713521

E3MT080903H11

E3MT09124281

E3MT11124X1 G1

E3MT12110211

E3N303

Vendor:MOTPackage Cooled:06+D/C:500

E3N303

Vendor:MOTPackage Cooled:06+D/C:500

E3P02

Vendor:MOTPackage Cooled:06+D/C:500

The HIP6601B drives the lower gate in a synchronous rectifier to 12V, while the upper gate can be independently driven over a range from 5V to 12V. The HIP6603B drives both upper and lower gates over a range of 5V to 12V. This drive-voltage flexibility provides the advantage of optimizing applications involving trade-offs between switching losses and conduction losses. The HIP6604B can be configured as...

E3P102

Vendor:MOTD/C:05+

Electrical & Optical Specifications Specifications (Min. and Max. values) hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions may be within the operating range. All typical values (Typ.) are at 25C with VCC and IOVCC set to 3.0 V unless otherwise noted.

E3P303

The E3P303 is designed to operate in a manner very similar to other 2-wire interface memory products. The major differences result from the higher performance write capability of FRAM technology. These improvements result in some differences between the E3P303 and a similar configuration EEPROM during writes. The complete operation for both writes and reads is explained below.

E3S-AT61

Vendor:OMRON

(6) When designing your equipment, comply with the guaranteed values, in particular those of maximum rating, the range of operating power supply voltage, and heat radiation characteristics. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failu...

E3S-DS5E2

E3S-VS1E1

Vendor:OMRON

When READ is LOW, data can be read from the RAM array sequentially, independent of WRITE. In order for READ to be active, EF must be HIGH. When the FIFO is empty (EF-LOW), the internal READ operation is blocked. The three-state output buffer is controlled by the read signal and the external output control (OE).

E3T-SL22-2M

E3WCDA12-32.768K

E3X-A11

Vendor:OMRON

Each device includes a voltage regulator for operation with supply voltages of 4.5 to 24 volts, reverse battery protection diode, quadratic Hall-voltage generator, temperature compensation circuitry, small- signal amplifier, Schmitt trigger, and an open-collector output to sink up to 25 mA. With suitable output pull up, they can be used with bipolar or CMOS logic circuits. The A3141C and A3142C are im- ...

E40.000

E4001

Vendor:PULSEPackage Cooled:08+D/C:1500

This is a dual function pin. In the IDT Standard mode, the FF function is selected. FF indicates whether or not the FIFO memory is full. In the FWFT mode, the IR function is selected. IR indicates whether or not there is space available for writing to the FIFO memory. FF/IR is synchronized to the LOW-to-HIGH transition of CLKA.

E4003B2612906155

E4003B3216906155

E4003B3220106154

E4003B4216906155

E40900H

Package Cooled:SOP8SD/C:2007+

E40NA50

E40NC60

Vendor:76D/C:N/A

. . . employing the Schottky Barrier principle in a large area metal-to-silicon power diode. State-of-the-art geometry features epitaxial construction with oxide passivation and metal overlap contact. Ideally suited for use as rectifiers in low- voltage, high- frequency inverters, free wheeling diodes, and polarity protection diodes.

E40NC60

Vendor:76D/C:N/A

. . . employing the Schottky Barrier principle in a large area metal-to-silicon power diode. State-of-the-art geometry features epitaxial construction with oxide passivation and metal overlap contact. Ideally suited for use as rectifiers in low- voltage, high- frequency inverters, free wheeling diodes, and polarity protection diodes.

E40S6-300-3-N-24

E4103B1810906155

E4103B231290815

E4103B2320106155

E411-4

Vendor:PHIPackage Cooled:SOP28WD/C:2007+

E413105741

Package Cooled:06+D/C:PLCC-28

Synchronizer and Baud Rate Selection Linear Receive Strength Signal Indicator (RSSI) Flexible 3-Wire Serial Interface Minimal Number of External Components Required 48-Pin Low-Profile Plastic Quad Flat Package (PQFP) Programmable XTAL Trimming Lock Detect Indicator Programmable Training Sequence Recognition Pin Compatible to the TRF6901

E413105741

Package Cooled:06+D/C:PLCC-28

Synchronizer and Baud Rate Selection Linear Receive Strength Signal Indicator (RSSI) Flexible 3-Wire Serial Interface Minimal Number of External Components Required 48-Pin Low-Profile Plastic Quad Flat Package (PQFP) Programmable XTAL Trimming Lock Detect Indicator Programmable Training Sequence Recognition Pin Compatible to the TRF6901

E4257ALP

Vendor:SEMTECHPackage Cooled:06+D/C:QFN-64

Purchase of licensed I2C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.

E4334

Vendor:CSPackage Cooled:SMD

The user has the flexibility of using these devices at either GTL (VTT = 1.2 V and VREF = 0.8 V) or the preferred higher noise margin GTL+ (VTT = 1.5 V and VREF = 1 V) signal levels. GTL+ is the Texas Instruments derivative of the Gunning transceiver logic (GTL) JEDEC standard JESD 8-3. The B port normally operates at GTL or GTL+ signal levels, while the A-port and control inputs are compatible with LVTTL...

E4383A

E4483A

E4525T101

Vendor:TOKINPackage Cooled:2512D/C:05+

For best performance, keep the timing capacitor lead to GND as short as possible, the timing resistor lead from VDD as short as possible, and the leads between timing components and RC as short as possible. Separate ground and VDD traces to the external timing network are encouraged.

E4525T300

Vendor:TOKIND/C:08+

No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property lose.

E4525T300

Vendor:TOKIND/C:08+

No products described or contained herein are intended for use in surgical implants, life-support systems, aerospace equipment, nuclear power control systems, vehicles, disaster/crime-prevention equipment and the like, the failure of which may directly or indirectly cause injury, death or property lose.

E4525T500

Vendor:TOKIND/C:2000

1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 2. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with direct attach features. JC, the case temp is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379.

E4532C682

D/C:07+

Internal Sample-and-Hold Single +1.9V 0.1V Operation Choice of SDR or DDR output clocking Interleave Mode for 2x Sampling Rate Multiple ADC Synchronization Capability Guaranteed No Missing Codes Serial Interface for Extended Control Fine Adjustment of Input Full-Scale Range and Offset Duty Cycle Corrected Sample Clock

E45N50D

E45N50D

E47/9810

Vendor:AMIPackage Cooled:800

Selects Positive or Negative Edge Control and High or Low output drive strength. When LOW/HIGH the outputs are synchronized with the negative/positive edge of the reference clock, respectively. When at MID level, the output drive strength is increased and the outputs synchronize with the positive edge of the reference clock (see Table 6).

E47F-FA

Package Cooled:三极带铁底

The HY29F080 can be programmed and erased in-system with a single 5-volt VCC supply. Inter- nally generated and regulated voltages are pro- vided for program and erase operations, so that the device does not require a high voltage power supply to perform those functions. The device can also be programmed in standard EPROM pro- grammers. Access times as fast as 70ns over the full operating voltage r...

E48N50

Vendor:335D/C:N/A

The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have any questions, please contact the SAMSUNG branch office near you.

E48N50

Vendor:335D/C:N/A

The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have any questions, please contact the SAMSUNG branch office near you.

E48NM50

Vendor:STPackage Cooled:08+D/C:2000

E48NM50

Vendor:STPackage Cooled:08+D/C:2000

E49643.1R

Vendor:MOTPackage Cooled:50D/C:N/A

E4DC5-000

Package Cooled:00D/C:2640

(1) The DC specifications refer to the condition where the LVDS outputs are not switching, but are permanently at a valid logic level 0 or 1. (2) VOS refers to the common-mode of OUTP and OUTN. (3) Output capacitance inside the device, from either OUTP or OUTN to ground. (4) Refer to the LVDS application note (SBAA118) for a description of data setup and hold times. (5) Setup and hold time specifications ...

E4K212B7104KD-T

Vendor:TAIYOYUDENPackage Cooled:SMDD/C:09+

E4MT052202B12

E4MT062201B12

E4MT131323H12

E4N01

Vendor:ONSEMIPackage Cooled:00+D/C:SOP-8

This option provides four choices for each group in frequency which implies it is possible to have four different sampling rates in one chip or one sample rate with a different playback frequency. As a matter of fact, the available choices are also dependent on the pullup resistor value at the OSC pin. For example, if the fundamental frequency choice is F, it can provide choices in x1, x1-1/2, x2, x3.

E4N03

Vendor:MOTOROLAPackage Cooled:SOP-8

Limits in standard typeface are for TJ = 25˚C, bold typeface applies over the −40˚C to +125˚C temperature range. Limits are guaranteed by production testing or correlation techniques using standard Statistical Quality Control (SQC) methods. Un- less otherwise noted: VIN = 6V, IL = 1 mA, CL = 2.2 µF.

E4P025267-109

Vendor:NECPackage Cooled:DIP-40

CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures. UltraFET® is a registered trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation. SABER™ is a trademark of Analogy, Inc. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corpora...

E5002

Vendor:PULSED/C:08+

At the end of the phase 1, the voltage across the capacitor C reaches the avalanche threshold of the zener. Then a current flows through the gate of the thyristor Th which fires. The firing of the thyristor causes an alternating current to flow through the capacitor C. The positive parts of this current flow through C, Th and the primary of the HV transformer. The negative parts of the current flow...

E5002T

Vendor:PulsePackage Cooled:00+D/C:48750

Frame sync signal : - input in slave modes, except when sync is extracted from YCrCb data - output in master mode and when sync is extracted from YCrCb data - synchronous to rising edge of CKREF - ODDEVEN default polarity : odd (not-top) field : LOW level even (bottom) field : HIGH level

E5011P

E5012

Vendor:DELCOPackage Cooled:800

E5012

Vendor:DELCOPackage Cooled:800

E5014163EE

Vendor:INTELD/C:95

The Hynix HYM72V32M636T6M Series are Dual In-line Memory Modules suitable for easy interchange and addition of 256Mbytes memory. The Hynix HYM72V32M636T6M Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

E50152R

Vendor:semitecPackage Cooled:semitecD/C:dc00

Note The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaran- teed The device should not be operated at these limits The parametric values defined in the Electrical Characteristics table are not guaranteed at the absolute maximum ratings The Recommended Operating Conditions table will define the conditions for actual operation

E5017

Vendor:PULSED/C:SMD16

Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the de- vice. This is a stress rating only and functional opera- tion of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

E5017T

Vendor:PULSED/C:00+

The VSP2272 device is a complete mixed-signal processing IC for digital cameras providing signal conditioning and analog-to-digital conversion for the output of a charge-coupled device (CCD) array. The primary CCD channel provides correlated double sampling (CDS) to extract the video information from the pixels, C6-dB to 42-dB gain range with digital control for varying illumination conditions, and b...

E5017T

Vendor:PULSED/C:00+

The VSP2272 device is a complete mixed-signal processing IC for digital cameras providing signal conditioning and analog-to-digital conversion for the output of a charge-coupled device (CCD) array. The primary CCD channel provides correlated double sampling (CDS) to extract the video information from the pixels, C6-dB to 42-dB gain range with digital control for varying illumination conditions, and b...

E5021

Vendor:N/APackage Cooled:SOPD/C:02+

TIE Circuit Reset (Input). A logic low at this input resets the Time Interval Error (TIE) correction circuit resulting in a realignment of input phase with output phase as shown in Figure 13. The TCLR pin should be held low for a minimum of 300 ns. This pin is internally pulled down to VSS.

E5021T

Vendor:PULSEPackage Cooled:N/AD/C:03+

The CM3016-48 is fully protected, offering both overload current limiting and high temperature thermal shutdown. To reduce board cost and layout size, the CM3016 was designed to be stable with or without an output capacitor. This includes tiny, low ESR ceramic capacitors.

E5026J

Vendor:PULSEPackage Cooled:SOP

When testing with test product for evaluation, check the differences between the product and a product to be used actually. Pay attention to the following points: • The E5026J has no built-in ROM. However, a special-purpose development tool allows the operations as those of one with built-in ROM. ROM capacity depends on settings on a development tool. • On E5026J, an image from FF4000H to FFF...

E5026T

Vendor:PUISEPackage Cooled:SOP/40/模块D/C:04+

Features 1) Infrared LED, PIN photo diode, LED driver and receiver frequency formation circuit built in. Improvement of EMI noise protection because of Shield Case. 2) Applied to SIR (2.4k to 115.2kbps) and MIR (0.576,1.152Mbps). 3) Surface mounting type. 4) Power down function built in. 5) Adjustable transmission distance by LED load resistance value.

E5066-0005

Vendor:32D/C:N/A

The time-domain maximum slope argument can be appropriate for non-sinusoidal inputs, such as those encountered in instrumentation. If the rms error, ∆V, in the maximum slope region, slope FSR/(rise time), is used to define an effective number of bits, n, then the jitter simply needs to fulfill:

E507642-003

E507658-001

E50DB607840

E50N50

• Two Channel Quadrature Output with Optional Index Pulse • Quick and Easy Assembly • No Signal Adjustment Required • External Mounting Ears Available • Low Cost • Resolutions Up to 1024 Counts Per Revolution • Small Size • -40C to 100C Operating Temperature • TTL Compatible • Single 5 V Supply

E5112

Vendor:LMIPackage Cooled:SOP-16D/C:6+

Notes: * Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals. ‡ This is the increase in supply current for control input. † All typical values are at VCC = 3.3V, TA = 25C.

E5114007216-00E

D/C:05+/06+

E5116AB4AE

E5116AB-4A-E

Package Cooled:N/AD/C:08+

The 5B Series modules and backplanes are approved by Factory Mutual (FM) and the 5B Series modules are approved by the Canadian Standards Association (CSA) for use in Class 1, Division 2, Groups A, B, C, and D locations. These approvals certify that the 5B Series is suitable for use in locations where a hazardous concentration of flammable gas may exist only under fault conditions of operation. Equipme...

E5116AB-5C-E

Vendor:TIPackage Cooled:06+D/C:800

E5116AF-5C-E

Vendor:ELPIDAPackage Cooled:BGAD/C:08+09+

There are four (4) high-impedance physical tamper detect input pins, 2 normally set to High (NH) and 2 normally set to Low (NL). Each input is designed with a glitch immunity. These inputs can be connected externally to several types of actua- tor devices (e.g., switches, wire mesh). A tamper on any one of the four inputs that causes its state to change will trigger the security alarm (SAL) and driv...

E51-50E

Vendor:CHERRYD/C:415

E521G1401

Package Cooled:SMD-8D/C:08+

SQW may output a programmable fre- quency square-wave signal during normal (VCC valid) system operation. Any one of the 13 specific frequencies may be selected through register A. This pin is held low when the square-wave enable bit (SQWE) in register B is 0 (see the Control/Status Registers section).

E52818PD439

Vendor:ESSPackage Cooled:SOP28WD/C:07+

E52HA7.5A-A

DESCRIPTION The M74HCT138 is an high speed CMOS 3 TO 8 LINE DECODER fabricated with silicon gate C2MOS technology. If the device is enabled, 3 binary select inputs (A, B, and C) determine which one of the outputs will go low. If enable input G1 is held low or either G2A or G2B is held high, the decoding function is inhibited and all the 8 outputs go high. Three

E5310YBDIT

E531AZQ

E5341539V

E5388-EH05Y2-L