EPM7160SQC160-20

Vendor:ALTERAPackage Cooled:QFPD/C:08+

The EPM7160SQC160-20 consists of 4 independent low noise, low current inverting operational amplifiers utilizing Gennum's low voltage bipolar JFET technology. Each amplifier has a minimum open loop gain of 46 dB with the closed loop gain set by the ratio of a feedback (RF) resistor to the source impedance (RS) . For a well controlled gain tolerance from amplifier to amplifier, it is recommended that the close...

EPM7160SQI160-10

The DC/DC converter is a programmable topology synchronized Boost converter for todays continuous changing portable electronic market. The DC/DC converter provides flexibility of utilizing various battery configurations and chemistries such as NiCd, NiMH, or Li+ with an input voltage range of 2.5V to 6V. An additional flexibility is provided with topology programmability to power multiple loads such ...

EPM7160SQI160-15

Vendor:ALTERAD/C:07+

Similar To Industry Standard LT1033 Approved To DESC Standardized Military Drawing Number 5962-8774101 Adjustable Output Voltage Built In Thermal Overload Protection Short Circuit Current Limiting Maximum Output Voltage Tolerance is Guaranteed To 1% Guaranteed Dropout Voltage At Multiple Current Levels TO-257 Available in Isolated and Non-Isolated Packages

EPM7160ST1100-10

Vendor:ALTERAPackage Cooled:TQFP-M100PD/C:07+

Please provide the part number and revision number (located in upper right-hand corner of the cover) and the title of the document. When referring to items in the manual, please ref- erence by the page number, paragraph number, figure number, table number, and line num- ber if needed.

EPM7160STC10010

D/C:0043/0049

These PIN/NIP diode chips are specifically designed for hybrid applications requiring thermo- sonic or thermocompression bonding techniques. The top metallization is a layer of gold for a tarnish free surface that allows either thermosonic or thermocompression bonding techniques. The bottom metalli- zation is also gold, suitable for epoxy or eutectic die attach method.

EPM7160STC10010N

Vth can be expressed as voltage between gate and source when low operating current value is ID = -100 mA for this product. For normal switching operation, VGS (ON) requires higher voltage than Vth and VGS (off) requires lower voltage than Vth. (Relationship can be established as follows: VGS (off) < Vth < VGS (ON)) Please take this into consideration for using the device. VGS recommended voltage ...

EPM7160STC100-6

Vendor:127Package Cooled:ALTERAD/C:N/A

Matching to the Receiver Antenna High Sensitivity, Especially at Low Data Rates Sensitivity Reduction Possible Even While Receiving Fully Integrated VCO Low Power Consumption Due to Configurable Self Polling with a Programmable Time Frame Check Single-ended RF Input for Easy Matching to l/4 Antenna or Printed Antenna on PCB Low-cost Solution Due to High Integration Level ESD Protection According to MIL-ST...

EPM7160STC100-6F

Vendor:ALTERAD/C:07+

The nominal value of the RF choke L1 is 100 nH. At frequencies below 100 MHz this value should be increased to 220 nH. At frequencies above 1 GHz a much lower value must be used (e.g. 10 nH) to improve return losses. For optimal results, a good quality chip inductor such as the TDK MLG 1608 (0603), or a wire-wound SMD type should be chosen.

EPM7160STC100-6F

Vendor:ALTERAD/C:07+

The nominal value of the RF choke L1 is 100 nH. At frequencies below 100 MHz this value should be increased to 220 nH. At frequencies above 1 GHz a much lower value must be used (e.g. 10 nH) to improve return losses. For optimal results, a good quality chip inductor such as the TDK MLG 1608 (0603), or a wire-wound SMD type should be chosen.

EPM7160STC100-6N

Vendor:ALTERAPackage Cooled:QFP

Turn-On Propagation Delay Turn-Off Propagation Delay Turn-On Rise Time Turn-Off Fall Time ITRIP to Output Shutdown Prop. Delay ITRIP Blanking Time ITRIP to FAULT Indication Delay Input Filter Time (All Six Inputs) LIN1,2,3 to FAULT Clear Time Deadtime Operational Amplifier Slew Rate (+) Operational Amplifier Slew Rate (-)

EPM7160STC100-7F

UCC381-3 and UCC381-5 versions have on-chip resistor networks preset to regulate either 3.3V or 5.0V, respectively. Furthermore, remote sensing of the load voltage is possible by connecting the VOUTS pin directly at the load. The output voltage is then regulated to 1.5% at room temperature and better than 2.5% over temperature. The UCC381-ADJ version has a regu- lated output voltage programmed by an exte...

EPM7160STC1007N

C Two 64-voice RISC DSP Cores C Two High-speed CISC Control Processors C Versatile Programmable Digital Audio Routing Between the Two DSPs Voices Can Be Allocated for Synthesis and/or Effects and/or Audio Processing Maximum Single-shot PCM Wavesize of 4M Samples (93 Seconds @ 44.1 kHz) Samples Can Be Stored in 16-bit Floating Point Format (20-bit Dynamic), 16-bit Linear, 8-bit Linear Standard Audio Pro...

EPM7160STC100-7N

Vendor:ALTERAPackage Cooled:QFP

Xilinx offers the HW-120 programmer for use during prototyping as well as support from major third party programmer companies. For production volumes, Xilinx and their licensed distributors offer factory programming of the XC7336 devices.

EPM7160STC144-10

Vendor:ALTERAPackage Cooled:TQFP-144

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage ...

EPM7160STI10010

Vendor:ALTERAPackage Cooled:10000

Over Vin range Surface temperature of module, case or pins Per Bellcore TR-332 50% stress, Ta =40C, ground benign Per Mil-Std-883D, method 2002.3, 1 mS, half-sine, mounted to a fixture Per Mil-Std-883D, method 2007.2, 20-2000 Hz, soldered in a PC board Materials meet UL 94V-0

EPM7160STI10010

Vendor:ALTERAPackage Cooled:10000

Over Vin range Surface temperature of module, case or pins Per Bellcore TR-332 50% stress, Ta =40C, ground benign Per Mil-Std-883D, method 2002.3, 1 mS, half-sine, mounted to a fixture Per Mil-Std-883D, method 2007.2, 20-2000 Hz, soldered in a PC board Materials meet UL 94V-0

EPM7160STI100-10

Tachyon TS provides the highest levels of concurrency via numerous independent functional blocks providing parallel processing of data, control, and commands. In addition, these blocks process at hardware speeds versus firmware speeds, and automate the entire SCSI I/O in hardware. The result is minimized latency and I/O overhead, coupled with the highest levels of parallel- ism to provide m...

EPM7160STI100-10N

Vendor:ALTERAPackage Cooled:QFP

If the output three-state register has been enabled (logic "0" applied to pin 9), data from the first conversion will appear at the output of the ADS-930. Attempting to write a 17th word to a full FIFO will result in that data, and any subsequent conversion data, being lost.

EPM7160STI100-6

Vendor:ALTERAD/C:07+

Careful design of the output regulator amplifier assures loop stability over a wide range of ESR values in the external output capacitor. A wide range of values and types can be accomodated, allowing the user to select a capacitor meeting his space, cost, and performance requirements, and enjoy reliable operation over temperature, load, and tolerance variations.

EPM7160STI100-7

Vendor:ALTERAPackage Cooled:TQFP100D/C:07+

FEATURES lOptions :- 10mm lead spread - add G after part no. Surface mount - add SM after part no. Tape&reel - add SMT&R after part no. lHigh BVCEO (90V min) lHigh Isolation Voltage (5.3kVRMS ,7.5kVPK ) lAll electrical parameters 100% tested lCustom electrical selections available APPLICATIONS lDC motor controllers lIndustrial systems controllers lMeasuring instruments lSignal transmis...

EPM7160STI100-7

Vendor:ALTERAPackage Cooled:TQFP100D/C:07+

FEATURES lOptions :- 10mm lead spread - add G after part no. Surface mount - add SM after part no. Tape&reel - add SMT&R after part no. lHigh BVCEO (90V min) lHigh Isolation Voltage (5.3kVRMS ,7.5kVPK ) lAll electrical parameters 100% tested lCustom electrical selections available APPLICATIONS lDC motor controllers lIndustrial systems controllers lMeasuring instruments lSignal transmis...

EPM7164C8-7

Vendor:ALTERAPackage Cooled:PLCC

EPM7168EQC100-12

Vendor:ALTERAPackage Cooled:QFP-100D/C:06+

The data output is sequential, with the data from address n followed by the data from address n+1, ... etc. The address counter increments by one automatically, allowing the entire memory contents to be serially read during sequential read operation. When the memory address boundary (2047 for IS24C16-2 and IS24C16-3; 1023 for IS24C08-2 and IS24C08-3) is reached, the address counter rolls over to addr...

EPM7192

Hynix HYMD264726A(L)8-M/K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipe...

EPM71922SQC160-10

Vendor:AlTERAPackage Cooled:QFP-160D/C:06+

The DDU4C relies on a stable power supply to produce repeatable delays within the stated tolerances. A 0.1uf capacitor from VDD to GND, located as close as possible to the VDD pin, is recommended. A wide VDD trace and a clean ground plane should be used.

EPM71922SQC160-10

Vendor:AlTERAPackage Cooled:QFP-160D/C:06+

The DDU4C relies on a stable power supply to produce repeatable delays within the stated tolerances. A 0.1uf capacitor from VDD to GND, located as close as possible to the VDD pin, is recommended. A wide VDD trace and a clean ground plane should be used.

EPM7192BGC160-12ME

EPM7192EGC

Vendor:PLCCPackage Cooled:ALTERAD/C:2004+

NEW Fully Plastic TO-220 for HIGH VOLTAGE APPLICATIONS NEW SERIES, ENHANCED PERFORMANCE INTEGRATED FREE WHEELING DIODE HIGH VOLTAGE CAPABILITY ( > 1500 V ) HIGH SWITCHING SPEED TIGTHER hfe CONTROL IMPROVED RUGGEDNESS FULLY INSULATED PACKAGE (U.L. COMPLIANT) FOR EASY MOUNTING CREEPAGE DISTANCE PATH > 4 mm

EPM7192EGC160

Vendor:ALTERAPackage Cooled:PGAD/C:N/A

The S3067 transceiver implements SONET/SDH and WDM serialization/deserialization, and transmis- sion functions. The block diagram in Figure 4 shows the basic operation of the chip. This chip can be used to implement the front end of WDM equipment, which consists primarily of the serial transmit inter- face and the serial receive interface. The chip handles all the functions of these two elements, in-...

EPM7192EGC160

Vendor:ALTERAPackage Cooled:PGAD/C:N/A

The S3067 transceiver implements SONET/SDH and WDM serialization/deserialization, and transmis- sion functions. The block diagram in Figure 4 shows the basic operation of the chip. This chip can be used to implement the front end of WDM equipment, which consists primarily of the serial transmit inter- face and the serial receive interface. The chip handles all the functions of these two elements, in-...

EPM7192EGC160-10

Vendor:ALTERAD/C:07+

EPM7192EGC16012

Vendor:ALTERAD/C:P

The XC5200 Field-Programmable Gate Array Family is engineered to deliver low cost. Building on experiences gained with three previous successful SRAM FPGA fami- lies, the XC5200 family brings a robust feature set to pro- grammable logic design. The VersaBlock™ logic module, the VersaRing I/O interface, and a rich hierarchy of inter- connect resources combine to enhance design flexibility and red...

EPM7192EGC-160-12

Package Cooled:ALTERAD/C:07+/08+

EPM7192EGC16015

Vendor:ALTERAPackage Cooled:600D/C:P

Figure 1 shows a typical battery pack application of the bq2050H using the LED display capability as a charge- state indicator. The bq2050H is configured to display capacity in relative display mode. The relative display mode uses the last measured discharge capacity of the battery as the battery full reference. A push-button display feature is available for momentarily enabling the LED display.

EPM7192EGC160-15

Vendor:34D/C:N/A

EPM7192EGC160-15/20

EPM7192EGC160-1EM

Vendor:ALTERA

EPM7192EGC160-2

Vendor:ALTPackage Cooled:PGAD/C:07+

EPM7192EGC192-12

Vendor:805

EPM7192EGI160-10

Vendor:ALTERAD/C:07+

EPM7192EGI160-12

Vendor:ALTERAD/C:07+

EPM7192EGI16020

Vendor:ALTERAD/C:99+

1.Stresses greater than those listed under ABSOLUTE MAXIMUM RATING may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

EPM7192EGI160-20

Vendor:722Package Cooled:ALTERAD/C:N/A

The AWT6135 meets the increasing demands for higher efficiency and linearity in CDMA 1XRTT handsets. The PA module is optimized for VREF = +2.8 V, a requirement for compatibility with the Qualcomm® 6000 chipset. The device is manufactured on an advanced InGaP HBT MMIC technology offering state-of-the-art reliability, temperature stability, and

EPM7192EGI160-20EM

Vendor:ALTERAPackage Cooled:PGAD/C:96+

Wobble: This method picks up the device, places it on the substrate and forms a thermocom- pression bond all in one operation. This is described in MIL-STD-883, Method 2017 and is intended for hard substrates only. Equipment specifically designed for beam lead wobble bonding is available from KULICKE and SOFFA in Horsham, PA.

EPM7192EGM-15

The 73K322L includes the DPSK and FSK modulator/demodulator functions, call progress and handshake tone monitor test modes, and a tone generator capable of producing DTMF, answer, calling and 550 or 1800 Hz guard tone. This device supports V.23, V.22 (except mode v) and V.21 modes of operation, allowing both synchronous and

EPM7192EQ1160-20

EPM7192EQ160-20

Vendor:ALTERAPackage Cooled:07+D/C:QFP

EPM7192EQ160-20

Vendor:ALTERAPackage Cooled:07+D/C:QFP

EPM7192EQC/SQC160

Vendor:ALTERAPackage Cooled:N/AD/C:08+

Room = 25C, Full = as determined by the operating suffix. Typical values are for design aid only, not guaranteed nor subject to production testing. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. Guarantee by design, not subjected to production test. VIN = input voltage to perform proper function. Guaranteed by 12-V leaka...

EPM7192EQC16012

Vendor:altD/C:dc94

Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 41mH, IAS = -1.6A, VDD = -25V, RG = 25 Ω, Starting TJ = 25C 3. ISD -7.0A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature

EPM7192EQC16012

Vendor:altD/C:dc94

Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 41mH, IAS = -1.6A, VDD = -25V, RG = 25 Ω, Starting TJ = 25C 3. ISD -7.0A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature

EPM7192EQC160-12

An applied PWM signal reduces the LED current as a function of the duty cycle of the PWM signal. EN1 and EN2 can be tied together for PWM dimming between 0 mA and the maximum set with ISET. EN1 and EN2 can also be used for digital dimming with 4 steps from 0 mA to the maximum current set with ISET. See the application section for more details.

EPM7192EQC160-12/15

Vendor:ALTERAPackage Cooled:QFPD/C:08+

!IMPORTANT! AC power must be disconnected from TB2 terminals 1 and 2 before making modifications or installing user-supplied components on the DMS-EB-AC/DC board! In many applications, the DMS-EB-AC/DC installation is subject to electrical-code requirements (for example, the NEC in the USA). Fusing, grounding, wire gauges, and leakage currents may be regulated items. Since the DMS-EB-AC/DC is a line- operate...

EPM7192EQC160-12M

Vendor:ALTERAPackage Cooled:2005D/C:800

The 82596 C-Step incorporates several new fea- tures not found in previous steppings The following is a summary of the 82596 C-steps new features The 82596 C-step fixes Errata found in the A1 and B steppings The 82596 C-step has improved AC timings over both the A and B steppings

EPM7192EQC160-12P

Vendor:ALTERAPackage Cooled:QFPD/C:99+

eight CAT34AC02 may be individually addressed by the system. The last bit of the slave address specifies whether a Read or Write operation is to be performed. When this bit is set to 1, a Read operation is selected, and when set to 0, a Write operation is selected.

EPM7192EQC160-15

Vendor:19Package Cooled:ALTERAD/C:N/A

• 100,000 erase/write cycle Enhanced Flash program memory typical • 1,000,000 erase/write cycle Data EEPROM memory typical • Flash/Data EEPROM Retention: > 40 years • Self-programmable under software control • Priority levels for interrupts • 8 x 8 Single-Cycle Hardware Multiplier • Extended Watchdog Timer (WDT): - Programmable period from 41 ms to 131...

EPM7192EQC160-15/20

Vendor:ALTERAPackage Cooled:N/AD/C:08+

EPM7192EQC160-15N

Vendor:ALTERAPackage Cooled:QFP-160D/C:06+

EPM7192EQC160-15W

Vendor:ALTERAPackage Cooled:TSSOP14D/C:06+

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. When surface mounted to an FR−4 board using the 0.5 sq in drai...

EPM7192EQC16015YY

EPM7192EQC160-15YY

EPM7192EQC16020

Vendor:altD/C:dc94

Ground Rail. +3.3 Volt Power Supply. This active LOW output indicates that a data bus transfer is complete. A pull-up resistor is required at this output. Serial data input streams. These streams have 32 channels at data rates of 2.048 Mb/s. This input accepts and automatically identifies frame synchronization signals formatted according to different backplane specifications such as ST-BUS® and GCI. 4...

EPM7192EQI160-10

Vendor:ALTERAPackage Cooled:06+D/C:800

3. Always set IOCC PAGE1 bit 0 = 1 otherwise partial ADC function cannot be used. 4. Please do not switch MCU operation mode from normal mode to sleep mode directly. Before into sleep mode, please switch MCU to green mode. 5. While switching main clock (regardless of high freq to low freq or on the other hand), adding 6 instructions delay (NOP) is required. 6. Offset voltage will effect ADCs result, ple...

EPM7192EQI160-15

Vendor:ALTERAD/C:07+

In Discontinuous mode, when the inductor current drops to zero, the voltage at the SW pin rings, due to the capacitance in the resonant LC circuit formed by the inductor and the capacitance of the switch and the diode. This ringing is low-frequency and is not harmful. It can be damped with a resistor across the inductor, but this reduces efficiency and is not recommended.

EPM7192FGC160-12EM

Hynix HYMD512G726(L)4-K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous oper- ations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipe...

EPM7192GC160-1

The AHC126 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When OE is high, the respective gate passes the data from the A input to its Y output.

EPM7192GC160-1

The AHC126 devices are quadruple bus buffer gates featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. When OE is high, the respective gate passes the data from the A input to its Y output.

EPM7192GC160-15

Note 1: All data listed in the above graphs, except for derating data, has been developed from actual products tested at 25C. This data is considered typical data for the ISR. Note 2: Thermal derating graphs are developed in free air convection cooling of 40-60 LFM soldered in a printed circuit board. (See Thermal Application Notes.)

EPM7192GC1602

Vendor:altPackage Cooled:altD/C:dc93

EPM7192GC160-2

Vendor:ALTERAPackage Cooled:DIP/SMDD/C:05+06+

• Speziell geeignet fr Anwendungen im Bereich von 400 nm bis 1100 nm (BPX 48) und bei 920 nm (BPX 48 F) • Hohe Fotoempfindlichkeit • DIL-Plastikbauform mit hoher Packungsdichte • Doppeldiode mit extrem hoher Gleichmäßigkeit

EPM7192GC160-2

Vendor:ALTERAPackage Cooled:DIP/SMDD/C:05+06+

• Speziell geeignet fr Anwendungen im Bereich von 400 nm bis 1100 nm (BPX 48) und bei 920 nm (BPX 48 F) • Hohe Fotoempfindlichkeit • DIL-Plastikbauform mit hoher Packungsdichte • Doppeldiode mit extrem hoher Gleichmäßigkeit

EPM7192GC1603

Vendor:altPackage Cooled:altD/C:dc93

With reference to Figure 4, assume that VDD is rising slowly from zero to 12 V. The Power Manager produces a Power-On Reset (POR) signal that is routed to every flip-flop and counter in the device. This signal is made active as early as possible in the power-up sequence to ensure that the internal logic is reset and the device powers up in a known state.

EPM7192GC160-3

Vendor:ALTERAPackage Cooled:DIP/SMDD/C:05+06+

During turn-off of the lower MOSFET, the LGATE voltage is monitored until it reaches a 1.0V threshold, at which time the UGATE is released to rise. Adaptive shoot-through circuitry monitors the PHASE voltage during UGATE turn-off. Once PHASE has dropped below a threshold of 0.5V, the LGATE is allowed to rise. PHASE continues to be monitored during the lower gate rise time. If the PHASE voltage exceeds ...

EPM7192GC192-12

Vendor:ALTERAPackage Cooled:PGAD/C:08+

Note 1: RMODSET = 1kΩ. Excludes IOUT+ and IOUT-, TX_DISABLE high or low. Note 2: TC connected to TCMIN. Note 3: VCC = +3.3V, VLED = 1.55V, prebias voltage programmed at 0.625V (nominal), TA = +25C. RMODSET = 1kΩ, (programs approximately 80mA), TC connected to TCNOM. Note 4: The TX_DISABLE pin is internally pulled low. The driver is enabled when TX_DISABLE is left open.

EPM7192GC192-12

Vendor:ALTERAPackage Cooled:PGAD/C:08+

Note 1: RMODSET = 1kΩ. Excludes IOUT+ and IOUT-, TX_DISABLE high or low. Note 2: TC connected to TCMIN. Note 3: VCC = +3.3V, VLED = 1.55V, prebias voltage programmed at 0.625V (nominal), TA = +25C. RMODSET = 1kΩ, (programs approximately 80mA), TC connected to TCNOM. Note 4: The TX_DISABLE pin is internally pulled low. The driver is enabled when TX_DISABLE is left open.

EPM7192QC160-10

Vendor:ALTERPackage Cooled:QFPD/C:98+

EPM7192QC160-12

"Preliminary" product information describes products that are in production, but for which full characterization data is not yet available. Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject to change without notice and is provided "AS IS" without warranty of any...

EPM7192QC16015

Vendor:altD/C:dc94

FEATURES 5 V Stereo Audio System with 3.3 V Tolerant Digital Interface Supports 96 kHz Sample Rates on 6 Channels and 192 kHz on 2 Channels Supports 16-/20-/24-Bit Word Lengths Multibit - Modulators with Perfect Differential Linearity Restoration for Reduced Idle Tones and Noise Floor Data Directed Scrambling DACsLeast Sensitive to Jitter Differential Output for Optimum Performance DACs Signa...

EPM7192QC1602

Vendor:altPackage Cooled:altD/C:dc94

PARAMETER VCC Under-Voltage Lockout Start Threshold Stop Threshold Hysteresis General VCC Supply Current VIDPWR Supply Current VOSNS- Current VRHOT Comparator HOTSET Bias Current Output Voltage VRHOT Leakage Current Threshold Hysteresis

EPM7192QC160-5

Vendor:ALTERAPackage Cooled:QFPD/C:08+09+

2) A single check bit error will cause that particular check bit to go low in the syndrome word 3) A double bit error will cause an even number of bits in the syndrome word to go low The syndrome word will then be the EXCLUSIVE NOR of the two individual syndrome words corresponding to the 2 bits in error The two-bit error is not correctable since the parity tree can only identify single bit error...

EPM7192QI160-12

Vendor:ALTERAD/C:04+

EPM7192SQ460-7

EPM7192SQC-10

Vendor:ALTERAPackage Cooled:QFPD/C:08+

24 bit conversion 107dB dynamic range (A-wt) .003% THD at full scale output linear phase analog outputs 128x over sampling, 5th order 1 bit ∆-Ó modulator 2nd order switched cap filter and 2nd order continuous-time filter on chip sample rate variable 24kHz-55kHz selectable deemphasis (15us/50µs at Fs=44.1kHz) totalpowerconsumption170mW (Fs=48kHz) internal PLL derives all necessary ...

EPM7192SQC100-10

Vendor:ALTERAPackage Cooled:QFP

All Write operations are initiated by first issuing the Soft- ware Data Protect (SDP) entry sequence for Bank, Block, or Sector Erase. Word Program in the selected Flash bank. Word Program and all Erase commands have a fixed dura- tion, that will not vary over the life of the device, i.e., are independent of the number of Erase/Program cycles en- dured.

EPM7192SQC100-15

Vendor:ALTERAPackage Cooled:QFP

EPM7192SQC160

HPCTM family core features 16-bit data bus ALU and registers 64 kbytes of external memory addressing FAST 20 0 MHz system clock Four 16-bit timer counters with WATCHDOGTM logic MICROWIRE PLUSTM serial I O interface CMOS low power with two power save modes

EPM7192SQC16010

Vendor:ALTERA

Input controls are also provided for rounding and format adjustment of the 32-bit product. The Round input (RND) is provided to accommodate rounding of the most significant portion of the product by adding one to the Most Significant Bit (MSB) of the LSP Register. The position of the MSB is dependent on the state of the Format Adjust Control (see Pin Descriptions and Multiplier Input/Output...

EPM7192SQC160-10/7

Vendor:ALTERAPackage Cooled:N/AD/C:08+

The TPS4009x uses fixed frequency, peak current mode control with forced phase current balancing. When compared to voltage mode control, current mode results in a simplified feedback network and reduced input line sensitivity. Phase current is sensed by using either current sense resistors installed in series with output inductors or, for improved efficiency, by using the DCR (direct current resist...

EPM7192SQC160-10F

Description Reset the scratch pad register with current contents of the EEMEM register. Factory defaults midscale before any programming Write Protect Pin. When active low, WP prevents any changes to the present register contents, except PR and cmd 1 and 8 will refresh the RDAC register from EEMEM. Execute a NOP instruction before returning to WP high. Serial Input Register clock pin. Shifts in one bit a...

EPM7192SQC160-10N

Vendor:ALTERAPackage Cooled:QFP

(1) This data was taken using the JEDEC standard High-K test PCB. (2) Power rating is determined with a junction temperature of 125C. This is the point where distortion starts to substantially increase. Thermal management of the final PCB should strive to keep the junction temperature at or below 125C for best performance and long term reliability. (3) The THS4271/5 may incorporate a PowerPAD...

EPM7192SQC160-15(-10)

the improvement in linearity of the transfer characteristic. Reduced input impedance does result from this shunt connection. Similar techniques could be used on the OTA output, but then the output signal would be reduced and the correction circuitry further removed from the source of non linearity. It must be emphasized that the input circuitry is differential.

EPM7192SQC160-15(-10)

the improvement in linearity of the transfer characteristic. Reduced input impedance does result from this shunt connection. Similar techniques could be used on the OTA output, but then the output signal would be reduced and the correction circuitry further removed from the source of non linearity. It must be emphasized that the input circuitry is differential.

EPM7192SQC160-15/N

Vendor:ALTERAPackage Cooled:06+D/C:500

• 256 Resistor Taps • 2-Wire Serial Interface for write, read, and transfer operations of the potentiometer • Wiper Resistance, 100Ω typical @ 5V • 16 Nonvolatile Data Registers for Each Potentiometer • Nonvolatile Storage of Multiple Wiper Positions • Power On Recall. Loads Saved Wiper Position on Power Up. • Standby Current < 5µA Max • VC...

EPM7192SQC1607

Vendor:ALTERAPackage Cooled:800D/C:03+

The SC16C2550B is pin compatible with the ST16C2550. It will power-up to be functionally equivalent to the 16C2450. The SC16C2550B provides enhanced UART functions with 16-byte FIFOs, modem control interface, DMA mode data transfer. The DMA mode data transfer is controlled by the FIFO trigger levels and the TXRDY and RXRDY signals. On-board status registers provide the user with error indications and oper...

EPM7192SQC160-7

Vendor:88Package Cooled:ALTERAD/C:N/A

I A LOW on this pin initializes the FIFO2 read and write pointers to the first location of memory and sets the Port A output register to all zeroes. A LOW-to-HIGH transition on MRS2 toggled simultaneously with MRS1, selects the programming method (serial or parallel) and one of the three flag default offsets for FIFO2. Four LOW-to-HIGH transitions of CLKA and four LOW-to-HIGH transitions of CLKC must ...

EPM7192SQC160-7/10/15

Vendor:ALTERAPackage Cooled:QFPD/C:08+

1.2.3 Electrical Characteristics The values given in the specifications of dedicated functions are generally not applicable for chips. There- fore, only the limits listed below are valid for the product. T = -40 ... +85C, VDD - VSS = 5V unless otherwise specified.

EPM7192SQC160-7/10/15

Vendor:ALTERAPackage Cooled:QFPD/C:08+

1.2.3 Electrical Characteristics The values given in the specifications of dedicated functions are generally not applicable for chips. There- fore, only the limits listed below are valid for the product. T = -40 ... +85C, VDD - VSS = 5V unless otherwise specified.

EPM7192SQC160-7F

characteristics and internal reliability and qualification tests are based on use of dry air as the pressure media. Media other than dry air may have adverse effects on sensor perfor- mance and long term reliability. Contact the factory for in- formation regarding media compatibility in your application.

EPM7192SQC160-7N

Vendor:ALTERAPackage Cooled:QFP

Isolated Hermetic Package, JEDEC TO-257AA Outline Output Voltages: -5V, -12V, -15V (Other Voltages Available) Output Voltages Set Internally To 1% or 2% Built-In Thermal Overload Protection Short Circuit Current Limiting Product Is Available Screened To MIL-STD-883

EPM7192SQC160AC

Vendor:ALTERAPackage Cooled:QFPD/C:08+

Max. UnitsConditions CCCVVGS = 0V, ID = 250µA CCC V/C Reference to 25C, ID = 1mA 14VGS = 10V, ID = 30A „ mΩ 17VGS = 5.0V, ID = 26A „ 3.0VVDS = 10V, ID = 250µA CCCSVDS = 25V, ID = 30A 20VDS = 55V, VGS = 0V µA 250VDS = 55V, VGS = 0V, TJ = 125C 200VGS = 16V nA -200VGS = -16V 92ID = 30A 14nCVDS = 44V 25VGS = 10V„ CCCVDD = 28V ns CCCID = 30A CCCRG = 8.5&#...