Index "E"Vendor:ALTERAPackage Cooled:PGAD/C:N/A
Vendor:ALTERAPackage Cooled:PGAD/C:N/A
Vendor:ALTERAPackage Cooled:PGA
2) Verify that a shunt is installed on jumper JU3 (SYNC). 3) Connect a +2.7VDC to +5.5VDC power supply to the VIN pad. Set the power supply to more than +3.6V. Connect the supply ground to the PGND pad. 4) Connect a voltmeter to the VOUT pad. 5) Connect an external voltage reference or DAC out- put to the reference (REF) BNC connector. The volt- age reference or DAC must have an adjustable range of...
Vendor:ALTPackage Cooled:6125D/C:99+
Registers 3, 5, and 7 contain the Time of Day Alarm Registers. Bits 3, 4, 5, and 6 of Register 7 will always read 0 regardless of how they are written. Bit 7 of Registers 3, 5, and 7 are mask bits (Figure 3). When all of the mask bits are logic 0, a Time of Day Alarm will only occur when Registers 2, 4, and 6 match the values stored in Registers 3, 5, and 7. An alarm will be generated every day when bit 7 of...
Vendor:ALTERAPackage Cooled:PGAD/C:N/A
The amplifier works on any total power supply voltage between 2.7V and 36V (fully specified from 5V to 15V). Output voltage swings to within 55mV of the negative supply and 250mV of the positive supply, which makes the amplifier a good choice for low voltage single supply operation.
Vendor:ALTERAPackage Cooled:PGAD/C:N/A
Vendor:ALTERAPackage Cooled:50
Vendor:ALTERAPackage Cooled:BGAD/C:N/A
Vendor:ALTERAPackage Cooled:BGAD/C:N/A
Vendor:12Package Cooled:ALTERAD/C:N/A
The MAX3275/MAX3277 transimpedance amplifiers provide a compact low-power solution for communica- tion up to 2.125Gbps. They feature 300nA input- referred noise at 2.1GHz bandwidth (BW) with 0.85pF input capacitance. The parts also have 2mA P-P AC input overload.
Vendor:52Package Cooled:ALTERAD/C:N/A
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sec- tions of this specification is not implied. Exposure to absolute maximum rating conditions for external periods may affect device reliability.
Vendor:ALTERAPackage Cooled:PGAD/C:2008+
The bus-powered supply input (BP) serves as the source for the internal 3.3-V LDO and for all logic functions in the device. In bus-powered mode, BP also serves as the source for all the outputs (OUTx). If BP is below the undervoltage threshold, all power switches will turn off and the LDO will be disabled. BP must be connected to a voltage source in order for the device to operate.
Vendor:ALTERAPackage Cooled:QFPD/C:07+
RSENSE B - Is the connection for the bottom of the B half bridge. This can have a sense resistor connection to the V+ return ground for current limit sensing, or can be connected directly to ground. The maximum voltage on this pin is 2 volts with respect to GND.
Package Cooled:QFP
Package Cooled:QFP
Vendor:ALTERAPackage Cooled:QFPD/C:08+
©Atmel Corporation 2004. All rights reserved. Atmel® and combinations thereof, Cache Logic® are the registered trademarks, and FreeRAM ™ and QuickChange ™ are the trademarks of Atmel Corporation or its subsidiaries. Verilog ® and OrCAD ® are the registered trademarks of Cadence Design Systems, Inc. Mentor ® is the registered trademark, and Exemplar ™ is the trademar...
Vendor:ALTERAPackage Cooled:192D/C:00/02+
Position is sensed by the differentially connected photo diodes, a method that negates the time and temperature variations of the optical components. Off center positions produce an error current which is integrated by the op amp circuit, driving the system back to center position. A momen- tary switch contact forces the system out of lock and then the integrating capacitor holds drive level while bot...
Vendor:ALTERAPackage Cooled:QFP
Devices with a date code prior to 0425 (manufactured before week 25 in 2004) are generally affected by this problem unless you receive devices with updated boot loader software from your distributor. Parts marked with date code 0425 or later are not affected by this problem. Please refer to page 2 of this document for details on how to identify the date code.
Vendor:ALTERAPackage Cooled:500
This information is intended to unambiguously characterize the product in order to facilitate the customer's evaluation of the device in the application. The information will help the customer's technical experts determine that the device is
Vendor:ALTERAD/C:07+
Vendor:ALTERAD/C:07+
Vendor:ALTERAPackage Cooled:QFPD/C:08+09+
BiFET operational amplifiers offer the inherently-higher input impedance of the JFET-input transistors, without sacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing with high-impedance sensors or low-level ac signals. They also feature inherently better ac response than bipolar or CMOS devices having comparable power consumption. The TLE206x family...
Vendor:ALTERAPackage Cooled:QFPD/C:08+09+
BiFET operational amplifiers offer the inherently-higher input impedance of the JFET-input transistors, without sacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing with high-impedance sensors or low-level ac signals. They also feature inherently better ac response than bipolar or CMOS devices having comparable power consumption. The TLE206x family...
Vendor:ATLERAPackage Cooled:QFPD/C:08+
An internal 100-kHz charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 4 V and requires very little supply current.
Vendor:ALTERAPackage Cooled:QFPD/C:08+
• Well Defined Spatial Radiation Patterns • Viewing Angles: 6, 15, 23, 30 • High Luminous Output • Colors: 590 nm Amber 605 nm Orange 615 nm Reddish-Orange 626 nm Red • High Operating Temperature: TJ LED = +130C • Superior Resistance to Moisture • Package Options: With or Without Lead Stand- Offs
Vendor:ALTERAPackage Cooled:QFPD/C:08+
• Well Defined Spatial Radiation Patterns • Viewing Angles: 6, 15, 23, 30 • High Luminous Output • Colors: 590 nm Amber 605 nm Orange 615 nm Reddish-Orange 626 nm Red • High Operating Temperature: TJ LED = +130C • Superior Resistance to Moisture • Package Options: With or Without Lead Stand- Offs
Vendor:ALTERAPackage Cooled:QFPD/C:08+
Reference level for the relative attenuation arel of the TFS 1220B is the minimum of the pass band attenuation amin. The minimum of the pass band attenuation amin is defined as the insertion loss ae. The centre frequency fc is the arithmetic mean value of the upper and lower frequencies at the 3 dB filter attenuation level relative to the insertion loss ae. The nominal frequency fN is fixed at 1220,0 MHz witho...
Vendor:ALTERAPackage Cooled:QFPD/C:08+
Reference level for the relative attenuation arel of the TFS 1220B is the minimum of the pass band attenuation amin. The minimum of the pass band attenuation amin is defined as the insertion loss ae. The centre frequency fc is the arithmetic mean value of the upper and lower frequencies at the 3 dB filter attenuation level relative to the insertion loss ae. The nominal frequency fN is fixed at 1220,0 MHz witho...
Vendor:ALTERAD/C:07+
Vendor:ALTERAD/C:07+
n Reduced Swing Differential Signaling (RSDS) digital bus reduces dynamic power, EMI and bus-width from the timing controller n LVDS single pixel input interface system n Input clock range from 25 MHz to 85 MHz n Drives RSDS column drivers at 170 Mb/s with an 85 MHz clock (Max) n BIST Function n CMOS circuitry operates from a 2.25VC2.75V; 0˚CC70˚C n 64 TQFP package with body size 10 mm ...
With its outstanding high-speed performance, the ADS1610 is well-suited for demanding applications in data acquisition, scientific instruments, test and measurement equipment, and communications. The ADS1610 is offered in a TQFP-64 package and is specified from −40C to +85C.
Vendor:ALTERAD/C:07+
(1) VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. (2) Ratings apply for tw = 1 ms. See Figure 1 for ITM c...
Vendor:ALTERAD/C:07+
(1) VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. (2) Ratings apply for tw = 1 ms. See Figure 1 for ITM c...
Vendor:ALTERAD/C:9807
VGC =1.25V (measured to single-ended out- put) VGC =1.95V (measured to single-ended out- put) For a given RX VGC voltage, the measured gain should lie within 3dB of ideal Measured with a DC step from 1.3V to 1.8V to 90% final value (within 1dB) 374MHz 11MHz, relative to gain at 374MHz Measured into the IF VGA pin. 1dB compression of IF strip. Measured at input to RF3002 single-ended. Single-e...
Vendor:ALTERAD/C:9807
VGC =1.25V (measured to single-ended out- put) VGC =1.95V (measured to single-ended out- put) For a given RX VGC voltage, the measured gain should lie within 3dB of ideal Measured with a DC step from 1.3V to 1.8V to 90% final value (within 1dB) 374MHz 11MHz, relative to gain at 374MHz Measured into the IF VGA pin. 1dB compression of IF strip. Measured at input to RF3002 single-ended. Single-e...
Vendor:altPackage Cooled:altD/C:dc97
The amplifier input is optimally matched to 50 ohms by locating capacitor C2 at a distance of 0.138 inches from the package pin. If it is not possible to obtain this separation, adjust the value of inductor L1 to compensate and obtain the desired match.
Vendor:ALTERAPackage Cooled:QFP
Each of these Schottky-clamped data selectors multiplex- ers contains inverters and drivers to supply fully comple- mentary on-chip binary decoding data selection to the AND-OR gates Separate output control inputs are provided for each of the two four-line sections The TRI-STATE outputs can interface directly with data lines of bus-organized systems With all but one of the com- mon outputs disabled (at...
Vendor:ALTERAD/C:97+
The MM74HC74A utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to the equivalent LS-TTL part. It possesses the high noise immu- nity and low power consumption of standard CMOS inte- grated circuits, along with the ability to drive 10 LS-TTL loads.
Vendor:ALTERAPackage Cooled:QFPD/C:03+
Vendor:ALTERAPackage Cooled:QFP
The EPM7256ERI208-20 incorporates internal matching on each RF, IF, and LO port to enhance ease of use and to reduce the number of external components required. The IF and LO ports can be driven differential or single ended. Each broadband port has been designed to minimize perfor- mance degradation while operating into highly reactive components such as EPM7256ERI208-20AW filters.
Vendor:ALTERAPackage Cooled:BGAD/C:08+
Readable in-band and out-of-band flow control status Programmable special character detection Infra-red (IrDA) receiver and transmitter option 5, 6, 7, 8 and 9-bits data framing Detection of bad data in the receiver FIFO Independent channel reset by software Transmitter and receiver can be disabled Transmitter idle interrupt RS-485 buffer enable signals Four byte device ID Sleep mode (low operating cu...
Vendor:9D/C:N/A
Standard CMOS process 1024 x 8 bits EEPROM organization Byte-wise addressing Byte-wise erase/write Irreversible byte-wise write protection Single 5V power supply for read and write/erase Low power operation: C 3 mA typical active current 5 ms programming time 3-wire serial interface 20 KHz serial clock rate Contact configuration and serial interface, ISO standard 7816 (Synchronous Transmiss...
Vendor:ALTERAPackage Cooled:PGAD/C:N/A
System address / data bus high byte. These lines make up the most significant byte (MSByte) of each TI380C2x address word (32-bit address bus) and data word (16-bit data bus). The most significant bit (MSB) is SADH0, and the least significant bit (LSB) is SADH7.
Vendor:ALTERAPackage Cooled:PGAD/C:N/A
System address / data bus high byte. These lines make up the most significant byte (MSByte) of each TI380C2x address word (32-bit address bus) and data word (16-bit data bus). The most significant bit (MSB) is SADH0, and the least significant bit (LSB) is SADH7.
Vendor:ALTERAPackage Cooled:115D/C:P
Vendor:ALTERAPackage Cooled:115D/C:P
Vendor:ALTERAPackage Cooled:N/AD/C:30
Vendor:19Package Cooled:ALTERAD/C:N/A
NOTES: (1) dBFS refers to dB below Full Scale. (2) Percentage accuracies are referred to the internal A/D converter Full-Scale Range of 4Vp-p. (3) Refer to Timing Diagram footnotes for the differential linearity performance conditions for the SO and SSOP packages. (4) IMD is referred to the larger of the two input signals. If referred to the peak envelope signal ( 0dB), the intermodulation products will be 7...
C 5V Read C 5V Reprogramming Fast Read Access Time C 55 ns Internal Program Control and Timer Sector Architecture C One 16K Bytes Boot Block with Programming Lockout C Two 8K Bytes Parameter Blocks C Four Main Memory Blocks (One 32K Bytes, Three 64K Bytes) Fast Erase Cycle Time C 4 Seconds Byte-by-Byte Programming C 20 µs/Byte Typical Hardware Data Protection DATA Polling for End of Program ...
The SN65LVCP40 is a signal conditioner and data multiplexer optimized for backplanes. Input equalization and programmable output preemphasis support data rates up to 4 Gbps. Common applications are redundancy switching, signal buffering, or performance improvements on legacy backplane hardware.
The EPM7256MC208-20 is a high performance integrated signal processor/digitizer for linear CCD image scanners. The EPM7256MC208-20 performs all the analog processing (correlated double sampling for black level and offset compensation, pixel-by-pixel gain adjust, and 8-bit analog-to-digital conver- sion) necessary to maximize the performance of a wide range of linear CCD sensors.
Vendor:ALTERAPackage Cooled:QFPD/C:98
The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations in conjunc- tion with seven addressing modes for source operand and four addressing modes for destina- tion operand.
Vendor:1329
Vendor:ALTERAPackage Cooled:QFPD/C:08+09+
outputs, input capture and output compare functions 1 Communication Interface C SPI synchronous serial interface Interrupt Management C 10 interrupt vectors plus TRAP and RESET C 15 external interrupt lines (on 4 vectors) A/D Converter C 7 input channels C Fixed gain Op-amp C 13-bit resolution for 0 to 430 mV (@ 5V VDD) C 10-bit resolution for 430 mV to 5V (@ 5V VDD) Instruction Set C 8-bit da...
Vendor:ALTERAD/C:07+
Vendor:ALTERAPackage Cooled:QFPD/C:06+
Vendor:ATLERAPackage Cooled:QFPD/C:08+
Unless otherwise stated, VDD = 3.3V 10%, no load on any output, and ambient temperature range TA = 0C to 70C. Parameters denoted with an asterisk ( * ) represent nominal characterization data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are 3 f rom typical.
Vendor:ALTERAD/C:07+
Notes: 1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 5.0V, TA = 25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. Measured by the voltage drop between I and Y pin at indicated current through the swi...
The HYM72V32M636T6 Series are 32Mx64bits Synchronous DRAM Modules. The modules are composed of eight 16Mx16bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 144pin glass-epoxy printed circuit board. Two 0.33uF and one 0.1uF decoupling capacitors per each SDRAM are mounted on the PCB.
Vendor:ALTERAPackage Cooled:QFP-208D/C:05
If the MC623 is used to measure the temperature of another device, it is important that the top surface of the MC623 package be in intimate contact with the measured device. Good thermal conductivity and no air space is critical to accurate temperature measurement in applications of this type.
Vendor:ALTERAPackage Cooled:QFP-208D/C:05
If the MC623 is used to measure the temperature of another device, it is important that the top surface of the MC623 package be in intimate contact with the measured device. Good thermal conductivity and no air space is critical to accurate temperature measurement in applications of this type.
Vendor:ALTERAD/C:07+
Power Management and Signal Level Translators for Two SIM Cards or Smart Cards Independent 1.8V/3V VCC Control for Both Cards Automatic Level Translation ISO7816, ETSI and EMV Compatible Dynamic Pull-Ups Deliver Fast Signal Rise Times* Built-In Fault Protection Circuitry Automatic Activation/Deactivation Sequencing Circuitry Low Operating/Shutdown Current >10kV ESD on SIM Card Pins Compatible with EM...
Vendor:ALTERAD/C:07+
Power Management and Signal Level Translators for Two SIM Cards or Smart Cards Independent 1.8V/3V VCC Control for Both Cards Automatic Level Translation ISO7816, ETSI and EMV Compatible Dynamic Pull-Ups Deliver Fast Signal Rise Times* Built-In Fault Protection Circuitry Automatic Activation/Deactivation Sequencing Circuitry Low Operating/Shutdown Current >10kV ESD on SIM Card Pins Compatible with EM...
• High-speed access times: -- 8, 10, 12, 15 ns • Automatic power-down when chip is deselected • CMOS low power operation -- 345 mW (max.) operating -- 7 mW (max.) CMOS standby • TTL compatible interface levels • Single 3.3V power supply • Fully static operation: no clock or refresh required • Three-state outputs
Vendor:ALTERAD/C:07+
• Very low sleep/standby current (15µA typical) • Baud rate from 10 kBaud up to 125kBauds • Automatic switching to single wire mode in case of bus failures and return to differential mode if bus failures disappear • Supports one wire transmission modes with ground offset up to 1.5V • Internal bus driver slope control function to minimize RFI • Bus line short-circuit...
Vendor:ALTERAD/C:07+
• Very low sleep/standby current (15µA typical) • Baud rate from 10 kBaud up to 125kBauds • Automatic switching to single wire mode in case of bus failures and return to differential mode if bus failures disappear • Supports one wire transmission modes with ground offset up to 1.5V • Internal bus driver slope control function to minimize RFI • Bus line short-circuit...
Vendor:ALTERAPackage Cooled:QFPD/C:08+
The MAX6673 has a push-pull output. The rise and fall times of the MAX6673 output are negligible with respect to the period; therefore, errors caused by capacitive loading are minimized. The output load capacitance should be minimized in MAX6672 applications because the sourcing current is set by the pullup resistor. If the output capacitance becomes too large, unequal rise and fall times distort the pulse ...
Senses motion of ring magnet targets Integrated filter capacitor Wide operating temperature range Operation with frequency of sensed transitions from 20 Hz to 30 kHz EMI-resistant Large working air gaps 4.0 to 26.5 V operating range Output compatible with both TTL and CMOS logic families Reverse battery protection
Shift clock input pin. At the rise of shift clock, input signal from the SI pin is entered into the 16-bit shift register. Entry of low level into the EN pin starts to read data. Putting 16-bit data at high level after input loads the input data to a specified register.
Vendor:ALTERAD/C:N/A
Vendor:ALTERAD/C:07+
Absolute maximum ratings define parameter limits which, if exceeded, may permanently change or damage the device. All inputs and outputs on circuits are highly protected against electrostatic discharges. However, precautions to minimize build-up of electrostatic charges during handling are recommended. The circuits are protected against supply voltage reversal for typically 5 minutes, if the current is lim...
Vendor:ALTERAPackage Cooled:QFP
Normally, capacitor values on the order of several hundred microfarads are used on the output of the regulators to ensure good transient response with heavy load current changes. Output capacitance can increase without limit and larger values of output capacitance further improve the
Vendor:ALTERAPackage Cooled:QFPD/C:08+
The adapter is provided as a low risk solution to a working Bluetooth system based on existing components. The adapter ASIC implementation incorporates, as much as possible, features to come to a complete Bluetooth system, meeting the Bluetooth RF requirements.
Vendor:ALTERAD/C:07+
The CS8920As Ethernet Media Access Control (MAC) engine is fully compliant with the IEEE 802.3 Ethernet standard (ISO/IEC 8802-3, 1993), and supports full-duplex operation. The full-du- plex mode may be entered by a command from the host, or via auto-negotiation using link-pulse signaling.
Vendor:ALTERAPackage Cooled:N/AD/C:08+
Vendor:ALTERAPackage Cooled:08+D/C:780
There are two methods for reading out the signal from an NMOS linear image sensor. One is a current detection method using the load resistance and the other is a current integration method using a charge amplifier. In either readout method, a positive bias must be applied to the video line because photodiode anodes of NMOS linear image sensors are set at 0 V (Vss). Figure 8 shows a typical video bias v...
Vendor:ALTERAPackage Cooled:08+D/C:780
There are two methods for reading out the signal from an NMOS linear image sensor. One is a current detection method using the load resistance and the other is a current integration method using a charge amplifier. In either readout method, a positive bias must be applied to the video line because photodiode anodes of NMOS linear image sensors are set at 0 V (Vss). Figure 8 shows a typical video bias v...
Vendor:ALTERAD/C:04+
Vendor:ALTERAD/C:07+
DTMF/Pulse switchable dialer 32 digits for redial memory Pulse-to-tone (PT) keypad for long distance call operation Break/Make ratio is selectable by pin option Uses 4 4 keyboard Easy operation with redial, flash, pause, and PT keypads Pause, PT (pulse-to-tone) can be stored as a digit in memory Minimum tone output duration: 93 mS Minimum intertone pause: 93 mS On-chip power-on reset Uses 3.579545 MHz cr...
Vendor:ALTERAD/C:07+
DTMF/Pulse switchable dialer 32 digits for redial memory Pulse-to-tone (PT) keypad for long distance call operation Break/Make ratio is selectable by pin option Uses 4 4 keyboard Easy operation with redial, flash, pause, and PT keypads Pause, PT (pulse-to-tone) can be stored as a digit in memory Minimum tone output duration: 93 mS Minimum intertone pause: 93 mS On-chip power-on reset Uses 3.579545 MHz cr...
Vendor:ALTERAD/C:07+
DESCRIPTION This high performance Transil series has been de- signed to fit high temperature environment such as automotive applications, using surface mount technology. These devices are using high reliabil- ity planar technology resulting in high performanc- es in voltage regulation mode and low leakage current at high temperature.
Vendor:ALTERAPackage Cooled:QFP
Vendor:ALTERAD/C:N/A
Vendor:ALTERAD/C:N/A
Vendor:1Package Cooled:ALTERAD/C:N/A
This is the high impedance output of the quadrature phase detector, and is internally connected to the input of lock detector voltage comparator. In tone detection applications, pin 3 is connected to ground through a parallel combination of RD and CD (see Figure 1) to eliminate chatter at the lock detector outputs. If this tone detector section is not used, pin 3 can be left open circuited.
Vendor:ALTERAPackage Cooled:700D/C:00+
NOTES: 1. A nominal 1.25V timing measurement reference level is specified to allow constant, repeatable results in an automatic test equipment (ATE) environment. 2. The input signal edge rate of 2V/ns or greater is to be maintained in the 10% to 90% range of the input waveform.
For the most current specification and package information, refer to the Package Option Addendum located at the end of this datasheet or see the TI website at www.ti.com. Additional output voltages from 1.25V to 4.3V in 100mV increments are available on a quick-turn basis using innovative factory EEPROM programming. Minimum order quantities apply; contact factory for details and availability. For fixed 1...
Vendor:ALTERAPackage Cooled:QFP
Programmable) versions are available (COP8SGx7 Family). Erasable windowed versions are available for use with a range of software and hardware development tools. Family features include an 8-bit memory mapped architec- ture, 10 MHz CKI with 1µs instruction cycle, three multi- function 16-bit timer/counters, full-duplex USART, MICROWIRE/PLUS™ serial I/O, two Analog comparators, two power s...
Write. A low on this input informs the 73K322L that data or status information has been shifted in through the DATA pin and is available for writing to an internal register. The normal procedure for a write is to shift in data LSB first on the DATA pin for eight consecutive falling edges of EXCLK and then to pulse WR low. Data is written on the rising edge of WR.
Vendor:ALTERAD/C:06+
Up to 10.7 Gbps operation Very low power: 670 mW (IBIAS = 40 mA, IMOD = 40 mA) Typical 24 ps rise/fall times Full back-termination of output transmission lines Drives TOSAs with resistances ranging from 5 Ω to 50 Ω PECL-/CML-compatible data inputs Bias current range: 10 mA to 100 mA Differential modulation current range: 10 mA to 80 mA Automatic laser shutdown (ALS) 3.3 V operation Compac...