G65SC22PI-4

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use pro- vided in the labeling, can be reasonably expected to result in a significant injury to the user.

G65SC22PI-5

Vendor:CMDPackage Cooled:1620D/C:DIP40

G65SC23P-2

Vendor:CMDPackage Cooled:DIPO40

Maximum Frequency >1.0 GHz Typical 50 ps Output-to-Output Skew PECL Mode Operating Range: VCC = 3.135 V to 3.8 V with VEE = 0 V ECL Mode Operating Range: VCC = 0 V with VEE = C3.135 V to C3.8 V Open Input Default State Synchronous Enable/Disable Master Reset for Synchronization of Multiple Chips VBB Output LVDS and HSTL Input Compatible 20-Lead Pb-Free Package Available

G65SC23PE2

Vendor:CMLPackage Cooled:PLCC

Clock Enable Input, active LOW. When asserted LOW the Clock signal is recognized by the SRAM. When deasserted HIGH the Clock signal is masked. Since deasserting CEN does not deselect the device, CEN can be used to extend the previous cycle when required.

G65SC23PE-2

Vendor:CMDPackage Cooled:PLCC84

Drain- Source Voltage Continuous Drain Current, VGS @ -4.5V Continuous Drain Current, VGS @ -4.5V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Junction and Storage Temperature Range

G65SC23PEI-2

Vendor:CMDD/C:04+

G65SC32P

Vendor:CMDPackage Cooled:DIP40

For the CDMA driver amplifier applications, the MGA-725M4 provides suitable gain and linear- ity to meet the ACPR requirement when the handset transmits the highest power. When transmitting lower power, the MGA-725M4 can be bypassed, saving the drawing current.

G65SC32P

Vendor:CMDPackage Cooled:DIP40

For the CDMA driver amplifier applications, the MGA-725M4 provides suitable gain and linear- ity to meet the ACPR requirement when the handset transmits the highest power. When transmitting lower power, the MGA-725M4 can be bypassed, saving the drawing current.

G65SC32P-1

Vendor:23D/C:N/A

The DSP block specifications are as follows: Data bus: 24 bits Multiplier/adder: 24 bits 16 bits + 43 bits 43 bits Accumulator: 43 bits (sign extension: 4 bits) Program ROM: 1024 words 32 bits Coefficient RAM: 384 words 16 bits Coefficient ROM: 256 words 16 bits Offset RAM: 16 words 11 bits Data RAM: 256 words 24 bits Interface buffer RAM: 32 words 16 bits Operation speed: 22.5 MIPS (510 step/fs...

G65SC51DI

G65SC51DI-2

Vendor:CMDUPackage Cooled:DIPD/C:06+

During the clamping operation, the input video signal is passed through the device's internal color burst filter. The internal filter attenuates the color burst by typically >15 dB. Figure 1 shows the typical frequency response of the internal color burst filter.

G65SC51P1

Vendor:CMDPackage Cooled:DIPD/C:N/A

WARRANTY / REMEDY Honeywell warrants goods of its manufacture as being free of defective material and faulty workman- ship. Contact your local sales office for warranty infor- mation. If warranted goods are returned to Honeywell during that period of coverage, Honeywell will repair or replace without charge those items it finds defective. The foregoing is Buyers sole remedy and is in lieu of all other warr...

G65SC51P1

Vendor:CMDPackage Cooled:DIPD/C:N/A

WARRANTY / REMEDY Honeywell warrants goods of its manufacture as being free of defective material and faulty workman- ship. Contact your local sales office for warranty infor- mation. If warranted goods are returned to Honeywell during that period of coverage, Honeywell will repair or replace without charge those items it finds defective. The foregoing is Buyers sole remedy and is in lieu of all other warr...

G65SC51P4

Vendor:CMDPackage Cooled:DIP

+5V Analog Supply Voltage Left Voltage Common No Connection Left Current Output (0 to 1.2mA) Servo Decoupling Capacitor Reference Decoupling Capacitor Right Current Output (0 to 1.2mA) No Connection Right Voltage Common Analog Common Digital Common Mode Control 2 Right Data Input Bit Clock System Clock Word Clock Left Data Input Mode Control 3 Mode Control 1 +5V Digital Supply Voltage

G65SC51P-4

D/C:00+

The RC32355 contains an on-chip Ethernet MAC capable of 10 and 100 Mbps line interface with an MII interface. It supports up to 4 MAC addresses. In a SOHO router, the high performance RC32300 CPU core routes the data between the Ethernet and the ATM interface. In other applications, such as high speed modems, the Ethernet interface can be used to connect to the PC.

G65SC51P-4

D/C:00+

The RC32355 contains an on-chip Ethernet MAC capable of 10 and 100 Mbps line interface with an MII interface. It supports up to 4 MAC addresses. In a SOHO router, the high performance RC32300 CPU core routes the data between the Ethernet and the ATM interface. In other applications, such as high speed modems, the Ethernet interface can be used to connect to the PC.

G65SC51PE1-2

G65SC51PE-2

Vendor:CMDPackage Cooled:PLCC

The PLL602-03 is a low cost, high performance and low phase noise XO, providing less than -130dBc at 10kHz offset in the 48MHz to 100MHz operating range. The very low jitter (3ps RMS period jitter) makes this chip ideal for applications requiring clean reference frequency sources. Input crystal can range from 12 to 25MHz (fundamental resonant mode).

G65SC51PE-3

Vendor:CMDPackage Cooled:PLCC28

The ADS5221 is a pipeline, CMOS Analog-to-Digital Con- verter (ADC) that operates from a single +3.3V power supply. This converter provides excellent performance with a single-ended input and can be operated with a differential input for added spurious performance. This high-perfor- mance converter includes a 12-bit quantizer, high bandwidth track-and-hold, and a high accuracy internal reference; it a...

G65SC51PE-3

Vendor:CMDPackage Cooled:PLCC28

The ADS5221 is a pipeline, CMOS Analog-to-Digital Con- verter (ADC) that operates from a single +3.3V power supply. This converter provides excellent performance with a single-ended input and can be operated with a differential input for added spurious performance. This high-perfor- mance converter includes a 12-bit quantizer, high bandwidth track-and-hold, and a high accuracy internal reference; it a...

G65SC51PE4

Vendor:CMDPackage Cooled:DIPD/C:N/A

The USB descriptors and keyboard matrix can be customized via an optional external 24C08 EEPROM, or directly select the internal 4 different models from internal ROM. This feature makes customization of new projects cost-effective and efficient by only adding an external EEPROM while still using the same mass production chip.

G65SC51PE-4

Vendor:CMDUPackage Cooled:DIPD/C:06+

Two Line Output Control Because EPROMs are usually used in larger memory arrays, this product features a 2 line con- trol function which accommodates the use of mul- tiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E ...

G65SC51PE-4

Vendor:CMDUPackage Cooled:DIPD/C:06+

Two Line Output Control Because EPROMs are usually used in larger memory arrays, this product features a 2 line con- trol function which accommodates the use of mul- tiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E ...

G65SC51PEI-1

G65SC51PEI2

It is recommended that at least 22µF of capacitance for bypass- ing the VBIAS voltage that supplies the drive circuitry for the MSK 4301, along with 0.1µF for helping the high frequency current pulses needed by the gate driver. If an extremely long risetime is exhibited by the turn on of the FETs, the extra high frequency capacitance will help.

G65SC51PEI-2

Vendor:CMDPackage Cooled:PLCC-28D/C:0025

Single Event Effect (SEE) Hardened Ultra Low RDS(on) Neutron Tolerant Identical Pre- and Post-Electrical Test Conditions Repetitive Avalanche Ratings Dynamic dv/dt Ratings Simple Drive Requirements Ease of Paralleling Hermetically Sealed

G65SC51PI

Vendor:CMDD/C:08+

G65SC51PI-1

Vendor:3D/C:N/A

Synchronization (EXSYN) Blanking (BLK) Control for frame mode (MUXI, MUXS) VS noise reduction (VNR) 50/60-Hz standard (VERT) Deflection raster (VDM 1-0) Field mode with field changeover (FLDM, FLDC, FLDF) Delay compensation for write channel (WDEL 4-0) Still (STB) Frame (FR) Write mode (WM 1-0) Picture position for 9-image, picture-in-picture (VPOS 1-0, HPOS 1-0) Zoom mode (ZM) Position of ...

G65SC51PI-4/P-2

Vendor:CMDPackage Cooled:DIP28D/C:2007+

G65SC816P

Vendor:CMDPackage Cooled:DIP

The PKG DC/DC power modules have an internal over temperature protection circuit. If the case temperature exceeds min +115 C the power module will go in to OTP-mode. As long as the case tempera- ture exceeds min +115 C the power module will operate in OTP- mode. During OTP-mode the output voltage pulsates between zero and nominal output voltage, which reduces the power loss inside the power module. The PKG D...

G65SC816P2

G65SC816P-3/4/5

Vendor:CMDPackage Cooled:DIPD/C:06+

G65SC816P-3/4/5

Vendor:CMDPackage Cooled:DIPD/C:06+

G65SC816P-5

Vendor:CMDPackage Cooled:DIP-40D/C:92+

Guaranteed Low Skew < 25ps (max) Very low duty cycle distortion High speed propagation delay < 2.5ns. (max) Up to 250MHz operation Very low CMOS power levels 1.5V VDDQ for HSTL interface Hot insertable and over-voltage tolerant inputs 3-level inputs for selectable interface Selectable HSTL, eHSTL, 1.8V / 2.5V LVTTL, or LVEPECL input interface • Selectable differential or single-e...

G65SC816PE-4

Vendor:CMDPackage Cooled:PLCC-44D/C:92+

The ICS91309 provides synchronization between the input and output. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than +/- 350 pS, the part acts as a zero delay buffer.

G65SC816PE-4

Vendor:CMDPackage Cooled:PLCC-44D/C:92+

The ICS91309 provides synchronization between the input and output. The synchronization is established via CLKOUT feed back to the input of the PLL. Since the skew between the input and output is less than +/- 350 pS, the part acts as a zero delay buffer.

G670L2.63T71

G670L263T73UF

Vendor:GMTPackage Cooled:SOT-23D/C:05+

Hynix HYMD232G726(L)8-K/H/L series is registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules(DIMMs) which are organized as 32Mx72 high-speed memory arrays. Hynix HYMD232G726(L)8-K/H/L series consists of nine 32Mx8 DDR SDRAM in 400mil TSOPII packages on a 184pin glass-epoxy substrate. Hynix HYMD232G726(L)8-K/H/L series provide a high performance 8-byte interface in 5.25" width f...

G670L263T73UF

Vendor:GMTPackage Cooled:SOT-23D/C:05+

Hynix HYMD232G726(L)8-K/H/L series is registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules(DIMMs) which are organized as 32Mx72 high-speed memory arrays. Hynix HYMD232G726(L)8-K/H/L series consists of nine 32Mx8 DDR SDRAM in 400mil TSOPII packages on a 184pin glass-epoxy substrate. Hynix HYMD232G726(L)8-K/H/L series provide a high performance 8-byte interface in 5.25" width f...

G675L240T1U

Vendor:SOT23-5Package Cooled:32605D/C:GMT

• Clock Embedded PLL clock multiplication circuit Operating clock (PLL clock) can be selected from : divided-by-2 of oscillation or one to four times the oscillation Minimum instruction execution time : 62.5 ns (operation at oscillation of 4 MHz, four times the oscillation clock, VCC of 5.0 V) Subsystem Clock : 32 kHz (Continued)

G688L263T71

Vendor:GMT ?Package Cooled:03+?D/C:6000

The optimal design of Current Source Inverters re- quires the use of Diodes with blocking voltages greater than those of the thyristors . This departure from conventional half-bridge modules is catered for by MAGN-A-pak range with Thyristors up to 2000V and Diodes up to 3200V.

G688L263T71

Vendor:GMT ?Package Cooled:03+?D/C:6000

The optimal design of Current Source Inverters re- quires the use of Diodes with blocking voltages greater than those of the thyristors . This departure from conventional half-bridge modules is catered for by MAGN-A-pak range with Thyristors up to 2000V and Diodes up to 3200V.

G690H400T73

Since the CDC913 is based on PLL circuitry, it requires a stabilization time to achieve phase lock of the PLL. This stabilization time is required following power up and application of a fixed-frequency, fixed-phase signal at the X1 input, and following any changes to the SELn inputs.

G690L2.63-T71

G690L263T73

Package Cooled:GMTD/C:04+

Clocking of the register is very flexible. Four global synchronous clocks and a product term clock are available to clock the register. Furthermore, each clock features program- mable polarity so that registers can be triggered on falling as well as rising edges (see the Clocking section). Clock polarity is chosen at the logic block level.

G690L293T7 SOT23 RESET IC LF

G690L293T73

Vendor:GMTPackage Cooled:N/AD/C:03+

ADSC write accesses are initiated when the following condi- tions are satisfied: (1) ADSC is asserted LOW, (2) ADSP is deasserted HIGH, (3) CE1, CE2, CE3 are all asserted active, and (4) the appropriate combination of the write inputs (GW, BWE, and BW[A:D]) are asserted active to conduct a write to the desired byte(s). ADSC-triggered write accesses require a single clock cycle to complete. The address presen...

G690L308T73

Vendor:GMTPackage Cooled:QFPD/C:05+

its possible to put in stand by a part of the board even more decreasing the total power consumption. In the three terminal configuration (TO-92) the device is even in ON STATE, maintaining the same electrical performances. It needs only 2.2µF capacitor for stability allowing room and cost saving effect.

G690L308T73UF

Vendor:GLOBALPackage Cooled:SOTD/C:05+

Vcc = 2.3V~2.7V, TA= 0C to 70C/ -40C to 85C, unless otherwise specified -70-85 #Symbol Parameter Min.Max. Min.Max. READ CYCLE 1tRCRead Cycle Time70-85- 2tAAAddress Access Time-70-85 3tACSChip Select Access Time-70-85 4tOEOutput Enable to Output Valid-40-45 5tBA/LB, /UB Access Time-70-85 6tCLZChip Select to Output in Low Z10-10- 7tOLZOutput Enable to Output in Low Z5-5- 8tBLZ/LB, /UB Enable to Out...

G690L400T73

G690L438T73

Package Cooled:GMTD/C:05+

immunity and stable output. The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels. All inputs and outputs are equipped with protec- tion circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.

G691L263T71UF

G692L263TCUF

Vendor:CHAMPIONPackage Cooled:08+D/C:2320

G692L293TCUF

Package Cooled:SOT-143

NOTE: EP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. 15. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to C0.5 V. 16. All loading with 50 W to VCCC2.0 volts. 17. VIHCMR min v...

G692L308T

Package Cooled:GMTD/C:06+

• High electrical noise immunity • High switching capacity in a compact package • High sensitivity: 200 mW (1a), 400 mW (1c) • High surge voltage: 8,000 V between contacts and coil • UL, CSA, VDE, TÜV, SEMKO approved • Class B coil insulation type available

G692L308TCU

Vendor:GMTPackage Cooled:SOT-4D/C:05/06+

(8051-compatible) with up to 24 MHz (min. 250 ns) Videotext decoder and on-screen-display-generator in one chip. Display memory from 1 up to 10 pages Internal ROM from 16 Kbyte up to 64 Kbyte ROMless version with port to external EPROM/SRAM (max. 512 Kbyte) internal RAM 256 Byte + 1 Kbyte XRAM (10-page-versions only) 4-Channel-ADC (8-Bit resolution) 6-Channel-PWM (8-Bit resolution) 2-C...

G692L400TCUF

Vendor:CHAMPIONPackage Cooled:08+D/C:2170

G692L438TC

Vendor:GMTPackage Cooled:N/AD/C:04+

The MAX7044 crystal-referenced phase-locked-loop (PLL) VHF/UHF transmitter is designed to transmit OOK/ASK data in the 300MHz to 450MHz frequency range. The MAX7044 supports data rates up to 100kbps, and provides output power up to +13dBm into a 50Ω load while only drawing 7.7mA at 2.7V.

G692L438TC

Vendor:GMTPackage Cooled:N/AD/C:04+

The MAX7044 crystal-referenced phase-locked-loop (PLL) VHF/UHF transmitter is designed to transmit OOK/ASK data in the 300MHz to 450MHz frequency range. The MAX7044 supports data rates up to 100kbps, and provides output power up to +13dBm into a 50Ω load while only drawing 7.7mA at 2.7V.

G696H263T

The device integrates complete interfaces to stereo or mono microphones and a stereo headphone. External component requirements are drastically reduced as no separate microphone or headphone amplifiers are required. Advanced on-chip digital signal processing performs graphic equaliser, and automatic level control for the microphone or line input.

G696L263T

Package Cooled:GMTD/C:05+

The Hitachi G696L263T Series, G696L263T Series are 64M-bit dynamic RAMs organized as 8,388,608-word 8-bit. They have realized high performance and low power by employing CMOS process technology. G696L263T Series, G696L263T Series offer Extended Data Out (EDO) Page Mode as a high speed access mode. They have the package variation of standard 32-pin plastic SOJ and standard 32- pin plastic TSOPII.

G699L293T1U

Package Cooled:05D/C:3500

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input ...

G6A-234P-12VDC

Vendor:OMRONPackage Cooled:25D/C:07+

When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impendance state above 2.1 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

G6A-234P-BS-6D

Vendor:omronD/C:2001+

The 20ETF.. FP soft recovery QUIETIR rectifier series has been optimized for combined short reverse recovery time and low forward voltage drop. The glass passivation ensures stable reliable operation in the most severe temperature and power cycling conditions.

G6A-234P-BS-6D

Vendor:omronD/C:2001+

The 20ETF.. FP soft recovery QUIETIR rectifier series has been optimized for combined short reverse recovery time and low forward voltage drop. The glass passivation ensures stable reliable operation in the most severe temperature and power cycling conditions.

G6A-234P-ST15-US DC6

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-234P-ST-US DC5 BY OMR/D

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-234P-ST-US-12VDC

Vendor:OMRONPackage Cooled:relayD/C:09+

G6A-234P-ST-US-48V

Vendor:OMRON

G6A-274P DC12 BY OMR/C

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-274P-24VDC

Vendor:OMRONPackage Cooled:RELAYD/C:06+

The 16-bit digital output is multiplexed into an 8-bit output word that is accessed using two read cycles. The internal registers are pro- grammed through a 3-wire serial interface, which provides gain, offset, and operating mode adjustments.

G6A-274P-48VDC

Vendor:OMRONPackage Cooled:relayD/C:09+

The customer¢s voice sources are recorded sec- tion by section into an internal mask ROM. The sectional playback arrangement instructions of each key are stored in the table ROM. The key features are also programmable. With such a flexible structure, the HT815D0 is excellent for versatile voice applications.

G6A-274P-ST15-US DC24

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-274P-ST15-US DC5

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-274P-ST40-48VDC

Vendor:OMRONPackage Cooled:relayD/C:09+

G6A-274P-ST40-US DC12 BY OMR/D

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-274P-ST40-US-DC5

G6A-274P-ST63-US DC24 BY OMR/D

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A274PSTUS12DCBYOMR PBF

G6A-274P-ST-US-9VDC

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-2AB

Vendor:OMRONPackage Cooled:module

is available from the falling edge of Serial Clock (C). The difference between the two modes, as shown in Figure 5, is the clock polarity when the bus mas- ter is in Stand-by mode and not transferring data: C C remains at 0 for (CPOL=0, CPHA=0) C C remains at 1 for (CPOL=1, CPHA=1)

G6A-2AB

Vendor:OMRONPackage Cooled:module

is available from the falling edge of Serial Clock (C). The difference between the two modes, as shown in Figure 5, is the clock polarity when the bus mas- ter is in Stand-by mode and not transferring data: C C remains at 0 for (CPOL=0, CPHA=0) C C remains at 1 for (CPOL=1, CPHA=1)

G6A-2-H DC5

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-434P DC24

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-434P-12VDC

Vendor:980

Hynix HYMD232G726A(L)8M-M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to iden- tify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.

G6A-434P-ST-40-5V

Vendor:OMRON

G6A-434P-ST-US DC48

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-434P-ST-US-48V

Vendor:OMRON

G6A-474P

Vendor:pacasonicPackage Cooled:relayD/C:08+

When used in the Long Frame Sync or Short Frame Sync mode, this pin accepts an 8 kHz clock, which synchronizes the input of the serial PCM data at the DR pin. FSR can be asynchronous to FST in the Long Frame Sync or Short Frame Sync modes. When an ISDN mode (IDL or GCI) has been selected with BCLKR, this pin selects either B1 (logic 0) or B2 (logic 1) as the active data channel.

G6A-474P-ST20-US DC24

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-474P-ST40-US DC5

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-474P-ST-US DC48

Vendor:OMRONPackage Cooled:原装D/C:08+

G6A-474P-ST-US-12V

Vendor:OMRON

G6AK-234P-ST40-US DC12

Vendor:OMRONPackage Cooled:原装D/C:08+

G6AK-234P-ST40-US-DC24

G6AK-234P-ST-US DC12

Vendor:OMRONPackage Cooled:原装D/C:08+

G6AK-234P-ST-US DC3

Vendor:OMRONPackage Cooled:原装D/C:08+

G6AK-234P-ST-US DC6

Vendor:OMRONPackage Cooled:原装D/C:08+

G6AK-274P DC5

Vendor:OMRONPackage Cooled:原装D/C:08+

G6AK-274P-9V

Vendor:OMROND/C:05+

Output enable indications are provided through dedicated pins (one pin per output stream) to facilitate external data bus control. The G6AK-274P-9V is capable of switching up to 2,048 x 2,048 channels without blocking. Designed to switch 64 Kbit/s PCM or N x 64 Kbit/s data, the device maintains frame integrity in data applications and minimizes throughput delay for voice applications on a per channel basi...