GM71SV18163BLT-5

GM71V116163BT-6

Vendor:LGPackage Cooled:TSOPD/C:94+/99+

NOTE: 1.Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

GM71V116163BT-6

Vendor:LGPackage Cooled:TSOPD/C:94+/99+

NOTE: 1.Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

GM71V16160BJ-5

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V16160BJ-6

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

GM71V16160BT-5

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

GM71V16160BT-6

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V16160BT-6

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V16160CJ-5

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V16160CJ-6

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

GM71V16160CT-5

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

Word Program Operation The SST39VF160Q/VF160 are programmed on a word- by-word basis. The Program operation consists of three steps. The first step is the three-byte-load sequence for Software Data Protection. The second step is to load word address and word data. During the word Program opera- tion, the addresses are latched on the falling edge of either CE# or WE#, whichever occurs last. The data is...

GM71V16160CT6

Package Cooled:TSSOP

GM71V16163BJ-5

Vendor:HYNIXD/C:03+

GM71V16163BJ-5

Vendor:HYNIXD/C:03+

GM71V16163BJ-6

Vendor:HYNIXD/C:03+

The HYM7V73A801B F-Series are Dual In-line Memory Modules suitable for easy interchange and addition of 64Mbytes memory. The HYM7V75A801B F-Series are offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

GM71V16163BJ-6

Vendor:HYNIXD/C:03+

The HYM7V73A801B F-Series are Dual In-line Memory Modules suitable for easy interchange and addition of 64Mbytes memory. The HYM7V75A801B F-Series are offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

GM71V16163BT-5

Vendor:HYNIXD/C:03+

Information at the D input is transferred to the Q, Q outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q outputs to a logic 1.

GM71V16163BT-5

Vendor:HYNIXD/C:03+

Information at the D input is transferred to the Q, Q outputs on the positive going edge of the clock pulse. All four Flip-Flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock. All four Q outputs are reset to a logic 0 and all four Q outputs to a logic 1.

GM71V16163BT-6

Vendor:HYNIXD/C:03+

GM71V16163BT-7

GM71V16163CJ-5

Vendor:HYNIXD/C:03+

GM71V16163CJ-6

Vendor:HYNIXD/C:03+

The QS4A105 is a high-performance CMOS two-channel 4PST switch with 3-state outputs. The low ON resistance of the QS4A105 allows inputs to be connected to outputs with low insertion loss and high bandwidth. The QS4A105, with 1.3GHz bandwidth, is ideal for high-performance video signal switching, audio signal switching, and telecomm routing applications. Low power dissipation makes this device ideal for...

GM71V16163CLT5

Vendor:HYD/C:01+

GM71V16163CLT6

Vendor:LGSPackage Cooled:TSOPD/C:97+

• Supports All Fibre Channel Topologies; Arbitrated Loop (FC-AL) and N_Port Fabric Attachment • Supports Class 3 and Class 2 (via Software) • 66 MHz, 32/64-Bit PCI Interface • 1 Gigabit/Second Fibre Channel Rate • Full Duplex Support with Parallel Inbound and Outbound Processing • Complete Hardware Handling of Entire SCSI I/O via FCP On-Chip Assists...

GM71V16163CLT-6

Vendor:HYPackage Cooled:TSOPD/C:00+

GM71V16163CT-5

Vendor:HYNIXD/C:03+

Life Support Applications These NEC products are not intended for use in life support devices, appliances, or systems where the malfunction of these products can reasonably be expected to result in personal injury. The customers of CEL using or selling these products for use in such applications do so at their own risk and agree to fully indemnify CEL for all damages resulting from such improper use or sale.

GM71V16163CT-6DR

GM71V16400CT-6

Vendor:HYNIXD/C:03+

The GM71V16400CT-6 is a 20-bit quad channel, current-input analog-to-digital (A/D) converter. It combines both current-to-voltage and A/D conversion so that four low-level current output devices, such as photodiodes, can be directly connected to its inputs and digitized.

GM71V16400CT-60

A 100 ohm resistor and a 330pF capacitor connected in se- ries from the output of the amplifier to ground is recommended for applications where load capacitance is less than 330pF. For larger values of load capacitance, the output snubber net- work may be omitted. If loop stability becomes a problem due to excessively high load capacitance, a 100 ohm resistor may be added between the output drive pin ...

GM71V16403BJ6

GM71V16403BJ-6

Vendor:LGSPackage Cooled:SOJ-26

Notes: 1. Worst case values occur at an IC junction temperature of 125C. 2. For designers who do not need to read from the display, the Read line can be tied to VDD and the Write and Chip Enable lines can be tied together. 3. Changing the logic levels of the Address lines when CE = "0" may cause erroneous data to be entered into the Character RAM, regardless of the logic levels of the WR an...

GM71V16403CJ5

Vendor:SAMSUNGPackage Cooled:07+D/C:1524

GM71V16403CJ-5

Vendor:LGSPackage Cooled:SOJ-26

MILLER ENCODING: If the data state is a 1, there is a transition in the middle of the bit time. If the data state is a 0, there is no transition if the previous data bit was a 1. There is a transition at the beginning of the bit time if the previous data state is a 0. If the data stream starts with 0 and the data inverter is not enabled, the output of the encoder will be a 1 during the first bit time.

GM71V16403CT-6

Vendor:SAMSUNGPackage Cooled:TSOP24

GM71V17400BJ-6

Vendor:LGPackage Cooled:SOJD/C:94+/99+

GM71V17400BJ-7

Vendor:LGPackage Cooled:SOJD/C:94+/99+

GM71V17400CJ-6

Vendor:HYNIXD/C:03+

(Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services).

GM71V17400CJ-6

Vendor:HYNIXD/C:03+

(Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services).

GM71V17400CJ-7

GM71V17400CT6

GM71V17400CT-6

Vendor:HYNIXD/C:03+

1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life- support device or system, or to affect its safety or effectiveness of that device or system.

GM71V17403BJ6

GM71V17403BJ-6

Vendor:LGPackage Cooled:TSOPD/C:94+/99+

GM71V17403BJ-6

Vendor:LGPackage Cooled:TSOPD/C:94+/99+

GM71V17403BT-6

Vendor:LGPackage Cooled:TSOPD/C:94+/99+

GM71V17403BT-6

Vendor:LGPackage Cooled:TSOPD/C:94+/99+

GM71V17403CJ-5

GM71V17403CJ6

Vendor:N/APackage Cooled:N/AD/C:08+09+

When the DRAIN pin of the LT4250H is above VEE by more than VDL or VGATE is more than VGH from ∆VGATE, the PWRGD pin will sink current to the DRAIN pin which pulls the modules enable pin low, forcing it off. When VDRAIN drops below VDL and VGATE rises above VGH, the PWRGD sink current is turned off, allowing the modules pull-up current to pull the enable pin high and turn on the module. This condition ...

GM71V17403CJ6

Vendor:N/APackage Cooled:N/AD/C:08+09+

When the DRAIN pin of the LT4250H is above VEE by more than VDL or VGATE is more than VGH from ∆VGATE, the PWRGD pin will sink current to the DRAIN pin which pulls the modules enable pin low, forcing it off. When VDRAIN drops below VDL and VGATE rises above VGH, the PWRGD sink current is turned off, allowing the modules pull-up current to pull the enable pin high and turn on the module. This condition ...

GM71V17403CJ-6

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

can be bypassed under processor control when unscrambled data must be transmitted. If serial input data contains a break signal through one character (including start and stop bits) the break will be extended to at least 2 times N + 3 bits long (where N is the number of transmitted bits/character).

GM71V17403CJ-6

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

can be bypassed under processor control when unscrambled data must be transmitted. If serial input data contains a break signal through one character (including start and stop bits) the break will be extended to at least 2 times N + 3 bits long (where N is the number of transmitted bits/character).

GM71V17403CJ-7

GM71V17403CT6

GM71V17403CT-7

GM71V17800BJ-7

GM71V17800CJ6

GM71V17800CJ-6

Vendor:HYNIXD/C:03+

Analog Signal Range On Resistance, +25C 0 to +70C C55 to +125C RON versus VIN Input Leakage Current (Off) +25C 0 to +70C C55 to +125C Output Leakage Current (Off) +25C 0 to +70C C55 to +125C On Channel Leakage Current +25C 0 to +70C C55 to +125C Channel Input Capacitance Off On Channel Output Capacitance On Nonlinearity Large signal bandwidth (C3dB)

GM71V17800CT-5

GM71V17803BJ-5

Vendor:LGPackage Cooled:SOJD/C:94+/99+

The ATF1502ASV macrocell, shown in Figure 1, is flexible enough to support highly complex logic functions operating at high speed. The macrocell consists of five sections: product terms and product term select multiplexer, OR/XOR/CASCADE logic, a flip-flop, output select and enable, and logic array inputs.

GM71V17803BJ-5

Vendor:LGPackage Cooled:SOJD/C:94+/99+

The ATF1502ASV macrocell, shown in Figure 1, is flexible enough to support highly complex logic functions operating at high speed. The macrocell consists of five sections: product terms and product term select multiplexer, OR/XOR/CASCADE logic, a flip-flop, output select and enable, and logic array inputs.

GM71V17803BJ-6

Vendor:LGPackage Cooled:SOJD/C:94+/99+

The IN74HCT20 is identical in pinout to the LS/ALS20. The IN74HCT20 may be used as a level converter for interfacing TTL or NMOS outputs to High-Speed CMOS inputs. • TTL/NMOS-Compatible Input Levels Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 4.5 to 5.5 V Low Input Current: 1.0 µA High Noise Immunity Characteristic of CMOS Devices

GM71V17803BT-5

Vendor:LGPackage Cooled:TSOPD/C:94+/99+

Gain-Bandwidth Product (G +5) Gain Peaking 0.1dB Gain Flatness Bandwidth Large Signal Bandwidth Step Response: Slew Rate Rise/Fall Time Settling Time: 0.05% Spurious Free Dynamic Range Differential Gain Differential Phase Input Noise: Voltage Noise Density Current Noise Density

GM71V17803BT-6

Vendor:LGPackage Cooled:TSOPD/C:94+/99+

No-Hassle Simplicity: True RMS-DC Conversion with Only One External Capacitor Delta Sigma Conversion Technology High Accuracy: 0.1% Gain Accuracy from 50Hz to 1kHz 0.25% Total Error from 50Hz to 1kHz High Linearity: 0.02% Linearity Allows Simple System Calibration Low Supply Current: 155µA Typ, 170µA Max Ultralow Shutdown Current: 0.1µA Constant Bandwidth: Independent of Input Voltag...

GM71V17803CJ-5

Vendor:LGPackage Cooled:SOJD/C:94+/99+

Due to its blocking and selectivity performance, together with the additional 15 dB to 20 dB loss and the narrow bandwidth of a typical key fob loop antenna, a bulky blocking SAW is not needed in the key fob or sensor application. Additionally, the building blocks needed for a typical RKE and access control system on both sides, the base and the mobile stations, are fully integrated.

GM71V17803CJ6

Vendor:HYUNDAID/C:00+

GM71V17803CJ6

Vendor:HYUNDAID/C:00+

GM71V17803CJ-6

Vendor:168

Data and Control Inputs Provide Undershoot Clamp Diodes Low Power Consumption (ICC = 1 mA Typ) VCC Operating Range From 2.3 V to 3.6 V Data I/Os Support 0- to 5-V Signaling Levels (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V) Control Inputs Can Be Driven by TTL or 5-V/3.3-V CMOS Outputs Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Perfor...

GM71V17803CJ-60

Package Cooled:98D/C:SOJ

GM71V17803CJ-6T

Package Cooled:SOPD/C:02+

During an Erase/Program operation, any of the three non-busy banks may be read from. Note that only two banks can operate simultaneously. The device allows a host system to program or erase in one bank, then immediately and simultaneously read from the other bank, with zero latency. This releases the system from waiting for the completion of program or erase operations.

GM71V17803CT-5

Vendor:LGPackage Cooled:TSOPD/C:94+/99+

Base Stations: Single/Multicarrier UMTS, CDMA, GSM Communications: Fixed Broadband Wireless Access, Point-to-Point Microwave Direct Digital Synthesis (DDS) Cable Modem Termination Systems (CMTS) Automated Test Equipment (ATE) Instrumentation

GM71V17803CT6

I Dual-Mode Pin. Cascaded C Connected to XO of previous device. Not Cascaded C LD is used to write or read the programmable flag offset registers. LD must be asserted low during reset to enable standalone or width expansion operation. If programmable offset register access is not required, LD can be tied to RS directly.

GM71V17803CT6

I Dual-Mode Pin. Cascaded C Connected to XO of previous device. Not Cascaded C LD is used to write or read the programmable flag offset registers. LD must be asserted low during reset to enable standalone or width expansion operation. If programmable offset register access is not required, LD can be tied to RS directly.

GM71V17803CT-6

Vendor:HYNIXD/C:03+

There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC − VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figures 5 and 6 is based on TJ(pk) = 150_C; TC is var...

GM71V17803CT-6DR

GM71V181163BJ-5

Vendor:LGPackage Cooled:SOJD/C:94+/99+

OUTPUT CHARACTERISTICS3 Output Voltage Range2 Short-Circuit Current Load Current Capacitive Load Stability RL = RL = 5 kΩ DC Output Impedance MONITOR PIN Output Impedance Three-State Leakage Current LOGIC INPUTS (EXCEPT SDA/SCL)3 VIH, Input High Voltage VIL, Input Low Voltage Input Current Pin Capacitance LOGIC INPUTS (SDA, SCL ONLY) VIH, Input High Voltage VIL, Input Low Vol...

GM71V181163BJ-5

Vendor:LGPackage Cooled:SOJD/C:94+/99+

OUTPUT CHARACTERISTICS3 Output Voltage Range2 Short-Circuit Current Load Current Capacitive Load Stability RL = RL = 5 kΩ DC Output Impedance MONITOR PIN Output Impedance Three-State Leakage Current LOGIC INPUTS (EXCEPT SDA/SCL)3 VIH, Input High Voltage VIL, Input Low Voltage Input Current Pin Capacitance LOGIC INPUTS (SDA, SCL ONLY) VIH, Input High Voltage VIL, Input Low Vol...

GM71V18160BJ-5

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V18160BJ6

Vendor:N/APackage Cooled:N/AD/C:08+09+

GM71V18160BJ-6

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V18160BJ-7

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

GM71V18160BT-5

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

GM71V18160BT-6

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

GM71V18160BT-7

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V18160CJ-5

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V18160CJ-5

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V18160CJ6

Vendor:N/APackage Cooled:N/AD/C:08+09+

GM71V18160CJ6

Vendor:N/APackage Cooled:N/AD/C:08+09+

GM71V18160CJ-6

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V18160CJ7

GM71V18160CJ-7

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

GM71V18160CT-5

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

GM71V18160CT-6

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or2. A critical component is any component of a life systems which, (a) are intended for surgical implant intosupport device or system whose failure to perform can ...

GM71V18160CT-6

Vendor:HYNIXPackage Cooled:TSOPD/C:07+

FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or2. A critical component is any component of a life systems which, (a) are intended for surgical implant intosupport device or system whose failure to perform can ...

GM71V18160CT6DR

Vendor:hynixPackage Cooled:hynixD/C:dc02

MicroClock has developed a patented technique to integrate a Voltage Controlled Crystal Oscillator (VCXO) function into clock synthesizer products. The VCXO oscillator circuit, in conjunction with an external crystal, allows the output clocks to be pulled (varied up or down in frequency) more than 100 parts per million (+100ppm or 0.01%), under control of an analog input voltage. The MK27XX and MK37X...

GM71V18160CT-6DR

Package Cooled:0124D/C:1000

TEST RESET: An asynchronous reset signal (active low) which initializes the STA111 logic. This input has a 25KΩ pull-up resistor and no ESD clamp diode (ESD is controlled with an alternate method). When the device is power-off (VDD floating), this input appears to be a capacitive load to ground (Note 4). When VDD = 0V (i.e.; not floating but tied to VSS) this input appears to be a capacitive load w...

GM71V18160CT-7

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V18160CT-7

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V18163

GM71V18163BJ-5

Vendor:HYNIXPackage Cooled:SOJD/C:07+

GM71V18163BJ6

Vendor:N/APackage Cooled:N/AD/C:08+09+