Index "G"Vendor:PANPackage Cooled:SOT-163D/C:05+
As VCE is further increased, beyond the thermally limited region, the safe output current decreases more rapidly. This so-called second breakdown region is a characteristic of bipolar output transistors. It is caused by the tendency of bipolar transistors to produce hot spotspoints on the transistor where current flow concentrates at high VCE. Exceeding the safe output current in the second breakdown re...
Vendor:PanasonicPackage Cooled:SOT163D/C:2004
Note 6: Parameter measured at trip point of latch with Pin 2 at 0V. Note 7: Total Variation includes temperature stability and load regulation. Note 8: Start Threshold, Stop Threshold and Zener Shunt Thresholds track one another. Note 9: Guaranteed by design. Not 100% tested in production. Note 10: The device is fully operating in clamp mode as the forcing current is higher than the normal operating supply cu...
Vendor:PanasonicPackage Cooled:SOT163D/C:2004
Note 6: Parameter measured at trip point of latch with Pin 2 at 0V. Note 7: Total Variation includes temperature stability and load regulation. Note 8: Start Threshold, Stop Threshold and Zener Shunt Thresholds track one another. Note 9: Guaranteed by design. Not 100% tested in production. Note 10: The device is fully operating in clamp mode as the forcing current is higher than the normal operating supply cu...
Vendor:PANASONIC
Vendor:PANPackage Cooled:SOT-363D/C:08+
100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained.
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
FIN and OSC IN input level Max. operating frequency, fFIN and fosc Propagation delay, clock to modulus control MC Programming Inputs Clock high time, tCH Clock low time, tCL Enable set-up time, tES (see note 5) Enable hold time, tEH Data set-up time, tDS Data hold time, tDH Clock rise and fall times Positive threshold Negative threshold Phase Detector Digital phase detector propagation dela...
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
FIN and OSC IN input level Max. operating frequency, fFIN and fosc Propagation delay, clock to modulus control MC Programming Inputs Clock high time, tCH Clock low time, tCL Enable set-up time, tES (see note 5) Enable hold time, tEH Data set-up time, tDS Data hold time, tDH Clock rise and fall times Positive threshold Negative threshold Phase Detector Digital phase detector propagation dela...
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
Vendor:PANPackage Cooled:SOT-363D/C:08+
Widebus Family Output Voltage Translation Tracks VCC Supports Mixed-Mode Signal Operation On All Data I/O Ports − 5-V Input Down to 3.3-V Output Level Shift, With 3.3-V VCC − 5-V/3.3-V Input Down to 2.5-V Output Level Shift, With 2.5-V VCC 5-V-Tolerant I/Os, With Device Powered Up or Powered Down Bidirectional Data Flow, With Near-Zero Propagation Delay Low ON-State Resistance (ro...
Vendor:PANPackage Cooled:SOT-363D/C:08+
Widebus Family Output Voltage Translation Tracks VCC Supports Mixed-Mode Signal Operation On All Data I/O Ports − 5-V Input Down to 3.3-V Output Level Shift, With 3.3-V VCC − 5-V/3.3-V Input Down to 2.5-V Output Level Shift, With 2.5-V VCC 5-V-Tolerant I/Os, With Device Powered Up or Powered Down Bidirectional Data Flow, With Near-Zero Propagation Delay Low ON-State Resistance (ro...
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
Hynix HYMD116645A(L)8-K/H/L series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Line Mem- ory Modules(DIMMs) which are organized as 16Mx64 high-speed memory arrays. Hynix HYMD116645A(L)8-K/H/L series consists of eight 16Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD116645A(L)8-K/H/L series provide a high performance 8-byte interface in 5.25" wid...
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
Hynix HYMD116645A(L)8-K/H/L series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Line Mem- ory Modules(DIMMs) which are organized as 16Mx64 high-speed memory arrays. Hynix HYMD116645A(L)8-K/H/L series consists of eight 16Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD116645A(L)8-K/H/L series provide a high performance 8-byte interface in 5.25" wid...
Vendor:PANASONICPackage Cooled:2002D/C:1880
The GN01096B01SL and GN01096B01SL are a 10-bit Serial- izer and Deserializer chipset designed to transmit data over differential backplanes at clock speeds from 20 to 80 MHz. The chipset is also capable of driving data over Unshielded Twisted Pair (UTP) cable. The chipset has three active states of operation: Initializa- tion, Data Transfer, and Resynchronization; and two passive states: Powerdown an...
Vendor:PANASONICPackage Cooled:2002D/C:1880
The GN01096B01SL and GN01096B01SL are a 10-bit Serial- izer and Deserializer chipset designed to transmit data over differential backplanes at clock speeds from 20 to 80 MHz. The chipset is also capable of driving data over Unshielded Twisted Pair (UTP) cable. The chipset has three active states of operation: Initializa- tion, Data Transfer, and Resynchronization; and two passive states: Powerdown an...
Vendor:PanasonicPackage Cooled:SOT-363D/C:08+
If an FSK signal inputs during the brief transition from battery-saving state to normal operation state, the time that the pin ²FSKR² arrives at the reference voltage is delayed by a time constant determined by the capacitor connected to the pin ²FSKR² and the internal resistor. Sometimes, the output signal becomes erroneous due to some error in the comparator input voltage. Such a case ...
Vendor:PanasonicPackage Cooled:03+D/C:SOT-363
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are...
Vendor:PANPackage Cooled:SOT-363D/C:08+
Near-Zero propagation delay 5-ohm switches connect inputs to outputs Direct bus connection when switches are ON Ultra-low quiescent power (0.1µA typical) C Ideally suited for notebook applications • Industrial operating temperature: C40C to +85C • Packaging (Pb-free & Green available): C 56-pin 240-mil wide thin plastic TSSOP (A) C 56-pin 300-mil wide plastic SSOP (V) C 56...
Vendor:Panasonic
Vendor:PANASONIC
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
The SY10/100ELT20V is a single TTL-to-differential PECL translators. Because PECL (Positive ECL) levels are used, either +5V or +3.3V and ground are required. The small outline 8-lead SOIC package and low skew single gate design make the ELT20V ideal for applications that require the translation of a clock or data signal where minimal space, low power, and low cost are critical. The ELT20V is availab...
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
Differential inputs Near zero pop & click 100dB PSRR @ 217Hz with grounded inputs Operating from VCC = 2.5V to 5.5V 1W RAIL to RAIL output power @ Vcc=5V, THD=1%, F=1kHz, with 8Ω load 90dB CMRR @ 217Hz Ultra-low consumption in standby mode (10nA) Selectable standby mode (active low or active high Ultra fast startup time: 15ms typ. Available in DFN10 3x3, 0.5mm pitch & MiniSO8 All lead-fre...
Vendor:Panasonic
Vendor:PANASONIC
Vendor:PANPackage Cooled:SOT-363D/C:08+
• Fully compliant to the IEEE 802.3u standard • Repeater mode capabilities to allow for cut-thru in latency critical Industrial Ethernet or Embedded Ethernet applications • MAC filtering function to filter unicast packets • Dynamic buffer memory scheme C Essential for applications such as Video over IP where image jitter is unacceptable • 2-Port switch with flexible ...
Vendor:PANPackage Cooled:SOT-363D/C:08+
• Fully compliant to the IEEE 802.3u standard • Repeater mode capabilities to allow for cut-thru in latency critical Industrial Ethernet or Embedded Ethernet applications • MAC filtering function to filter unicast packets • Dynamic buffer memory scheme C Essential for applications such as Video over IP where image jitter is unacceptable • 2-Port switch with flexible ...
Vendor:PanasonicPackage Cooled:Sot-363D/C:09+
Vendor:PANPackage Cooled:SOT-363D/C:08+
Life Support Applications These NEC products are not intended for use in life support devices, appliances, or systems where the malfunction of these products can reasonably be expected to result in personal injury. The customers of CEL using or selling these products for use in such applications do so at their own risk and agree to fully indemnify CEL for all damages resulting from such improper use or sale.
Vendor:PANASONICPackage Cooled:LCCD/C:2002+
135-mΩ -Maximum (5-V Input) High-Side MOSFET Switch 500 mA Continuous Current per Channel Short-Circuit and Thermal Protection With Overcurrent Logic Output Operating Range . . . 2.7-V to 5.5-V Logic-Level Enable Input 2.5-ms Typical Rise Time Undervoltage Lockout 10 µA Maximum Standby Supply Current Bidirectional Switch Available in 8-pin SOIC and PDIP Packages Ambient Temperature Range, C4...
Vendor:PANPackage Cooled:SOT-363D/C:08+
Block write protection is enabled by programming the status register with one of four blocks of write protection. Separate program enable and program disable instructions are provided for additional data protection. Hardware data protection is provided via the WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without re...
Vendor:PanasonicPackage Cooled:SOTD/C:03+
Operating and Storage temperature: -65ºC to +175ºC Thermal Resistance: 150ºC/W junction to end cap and 300ºC/W junction to ambient when mounted on FR4 PC board (1 oz Cu) with recommended footprint (see last page) Steady-State Power: 0.5 watts at end cap temperature TEC < 100oC or ambient temperature TA < 25ºC when mounted on FR4 PC board as described for thermal resistanc...
Vendor:PANPackage Cooled:AOT-143D/C:05+PB
The L5970AD is a step down monolithic power switching regulator with a switch current limit of 1.5A so it is able to deliver more than 1A DC current to the load depending on the application conditions. The output voltage can be set from 1.235V to 35V. The device uses an internal P-Channel D-MOS tran- sistor (with a typical RDSON of 200mΩ) as switching element to avoid the use of bootstrap capac...
Vendor:PANASONICPackage Cooled:SOT-363D/C:04+
Other analog circuits are provided for special applications with both bipolar and CMOS technologies. These circuits range from the industry standard analog timing circuits and multipliers to specialized CMOS smoke detectors. These products provide key functions in a wide range of applications, including data transmission, commercial smoke detectors, and various industrial controls.
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
Vendor:PANASONICPackage Cooled:SOT23-6D/C:06+
Thebq4847containsa temperature-compensated refer- ence and comparator circuit that monitors the status of its voltage supply. When an out-of-tolerance condition is detected, the bq4847 generates an interrupt warning and subsequently a microproces- sor reset. The reset stays active for 200ms after V CC rises within
Vendor:Panasonic
The bq24400 uses a peak-voltage detection (PVD) scheme to terminate fast charge for NiCd and NiMH batteries. The bq24400 continuously samples the voltage on the BAT pin, representing the battery voltage, and triggers the peak detection feature if this value falls below the maximum sampled value by as much as 3.8 mV (PVD). As shown in figure 5, a resistor voltage-divider between the battery packs posit...
Vendor:PANASONICPackage Cooled:SOT23-6D/C:06+
The MAX 7000E devicesincluding the EPM7128E, EPM7160E, EPM7192E, and EPM7256E deviceshave several enhanced features: additional global clocking, additional output enable controls, enhanced interconnect resources, fast input registers, and a programmable slew rate.
Vendor:PANPackage Cooled:SOT-163D/C:08+
The HD74LV2G245A has two buffers with three state output in an 8 pin package. When DIR is high, data is transferred from the A inputs to the B outputs, and when DIR is low, data is transferred from the B inputs to the A outputs. The A and B buses are separated by making the enable input (OE) high level. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook compu...
Vendor:PANPackage Cooled:SOT-163D/C:08+
The HD74LV2G245A has two buffers with three state output in an 8 pin package. When DIR is high, data is transferred from the A inputs to the B outputs, and when DIR is low, data is transferred from the B inputs to the A outputs. The A and B buses are separated by making the enable input (OE) high level. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook compu...
Vendor:Panasonic
Vendor:PanasonicPackage Cooled:Sot-363D/C:09+
Vendor:PANPackage Cooled:SOT-363D/C:08+
The MM74HC14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads. The 74HC logic family is functionally and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
Vendor:PANPackage Cooled:SOT-363D/C:08+
The MM74HC14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as well as the capability to drive 10 LS-TTL loads. The 74HC logic family is functionally and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
Vendor:PANASONIC/1F/363D/C:04+/05+
Contrast Enhancement These display devices are designed to provide an optimum ON/OFF contrast when placed behind an appropriate contrast enhancement filter. For further information on contrast enhancement, see Application Note 1015, Contrast Enhancement for LED Displays.
Vendor:PANASONICPackage Cooled:SOT363D/C:02+
90% of Vcc MIN.; 10% of Vcc MAX. 15 pF is standard. Contact factory for heavier loads. Normal output when pin #1 is open (no connection); Normal output when pin #1 is at logic 1; High-Impedance Output when pin #1 is at logic 0. 24 mm tape, 330 mm reel: 1000 parts per reel. For quantities <250: 23 parts per tube.
Vendor:PANPackage Cooled:SOT-363D/C:08+
CHIP ERASE: The entire device can be erased at one time by using the 6-byte chip erase software code. After the chip erase has been initiated, the device will internally time the erase operation so that no external clocks are required. The maximum time to erase the chip is tEC.
Vendor:PanasonicPackage Cooled:SOT-363D/C:08+
Glass passivated high commutation triacs in a plastic envelope suitable for surface mounting, intended for use in circuits where high static and dynamic dV/dt and high dI/dt can occur. These devices will commutate the full rated rms current at the maximum rated junction temperature, without the aid of a snubber.
Vendor:PANPackage Cooled:SOT-363D/C:08+
The Fairchild Switch FST162861 provides 20-Bits of high- speed CMOS TTL-compatible bus switching. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.
Vendor:Panasonic
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
The pin configuration interface comprises 40 configurations, which are shared with GMII output pins by latching the configuration data during reset. An external EEPROM device can also be used to configure the TC9208M at power-up. With reference to pin configuration interface, the EEPROM extends the chips configuration capability with new features and enables a jumper-less configuration mode using a parallel...
Vendor:PANPackage Cooled:SOT-363D/C:00+
Pb−Free Packages are Available AC Line Brownout Detect Protection, BOK Function Latchoff Mode Fault Protection No Auxiliary Winding Operation Internal Output Short−Circuit Protection Extremely Low No−Load Standby Power Current−Mode with Skip−Cycle Capability Internal Overtemperature Shutdown Internal Leading Edge Blanking 250 mA Gate Peak Current Driving Capability Intern...
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
Vendor:PANPackage Cooled:SOT-363D/C:08+
connected to common Ports Dn) when the nIN input is held high and OFF (high impedance state exists between the two ports) when nIN is held low; the switches nS2 are ON (they are connected to common Ports Dn) when the nIN input is held low and OFF (high impedance state exists between the two ports) when IN is held high. Additional key features are fast switching speed, Break Before Make Delay Time a...
Vendor:PANPackage Cooled:SOT-363D/C:08+
connected to common Ports Dn) when the nIN input is held high and OFF (high impedance state exists between the two ports) when nIN is held low; the switches nS2 are ON (they are connected to common Ports Dn) when the nIN input is held low and OFF (high impedance state exists between the two ports) when IN is held high. Additional key features are fast switching speed, Break Before Make Delay Time a...
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
NOTES: 1. See Test Conditions under TEST CIRCUITS AND WAVEFORMS. 2. This parameter is guaranteed but not production tested. 3. The bus switch contributes no propagation delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.2ns at CL = 50pF. Since this time constant is much smaller than the rise and fall times ...
Vendor:PanasonicPackage Cooled:SOT-363D/C:5
The LTC6903/LTC6904 feature a proprietary feedback loop that linearizes the relationship between digital control setting and frequency, resulting in a very simple frequency setting equation: 2078(Hz) f = 2OCT •;1kHz < f < 68MHz DAC 2 C 1024 Where OCT is a 4-bit digital code and DAC is a 10-bit digital code.
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
Vendor:PanasonicPackage Cooled:SOT-363D/C:08+
FC-AL Features In addition to the high-perfor- mance architecture, Tachyon TL offers FC-AL-1 Fibre Channel features, such as Auto Status, multiple I/Os in the same loop arbitration cycle, loop map, loop broadcast, and loop directed reset. These features allow the designer to achieve higher performance in an arbitrated loop topology.
Vendor:PANASONICPackage Cooled:SOT363D/C:2000
The SiP5630 has nine (9) output channels (T1-T9). Each output channel provides termination for one SCSI data signal, parity signal or control signal. Two SiP5630 ICs provide complete termination for a narrow SCSI Bus; three ICs provide complete termination for a wide SCSI bus.
Vendor:PANASONICPackage Cooled:SOT363D/C:2000
The SiP5630 has nine (9) output channels (T1-T9). Each output channel provides termination for one SCSI data signal, parity signal or control signal. Two SiP5630 ICs provide complete termination for a narrow SCSI Bus; three ICs provide complete termination for a wide SCSI bus.
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
Battery-backed SRAMs are forced to monitor VCC in order to switch to the backup battery. Users that are modifying existing designs to use MRAM in place of BB SRAM, can eliminate the VCC controller IC along with the battery. MRAM performs this function on chip.
Vendor:Panasonic
Vendor:PANPackage Cooled:SOT-363D/C:08+
Item R.M.S. On-State Current Surge On-State Current I2t Peak Gate Power Dissipation Average Gate Power Dissipation Peak Gate Current Peak Gate Voltage Critical Rate of Rise of On-State Current Operating Junction Temperature Storage Temperature Isolation Breakdown VoltageR.M.S.
Vendor:panasonicPackage Cooled:N/AD/C:0
EXPANSION IN ( XI ) This input is a dual-purpose pin. Expansion In (XI) is grounded to indicate an operation in the single device mode. Expansion In (XI) is connected to Expansion Out (XO) of the previous device in the Depth Expansion or Daisy Chain Mode.
Vendor:PanasonicPackage Cooled:QFND/C:2004
The DS1265W 8Mb nonvolatile (NV) SRAMs are 8,388,608-bit, fully static, NV SRAMs organized as 1,048,576 words by 8 bits. Each NV SRAM has a self-contained lithium energy source and control circuitry that constantly monitors VCC for an out-of-tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on and write protection is unconditionally enabled to prevent data...
Vendor:PANPackage Cooled:SOT-363D/C:08+
The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
Vendor:PANPackage Cooled:SOT-363D/C:08+
The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V.
Vendor:PANPackage Cooled:SOT-363D/C:08+
The serial number is divided into three parts (see Figure 1). The 8Cbit family code tells the Access System (and consequently the developer) what type of iButton is being used. The next 48 bits are lasered sequentially with no two numbers the same. The last 8 bits contain a Cyclic Redundancy Check (CRC) value that has been calculated across the family code and the 48Cbit serial number. The CRC ensure...
Vendor:PANPackage Cooled:SOT-363D/C:08+
The serial number is divided into three parts (see Figure 1). The 8Cbit family code tells the Access System (and consequently the developer) what type of iButton is being used. The next 48 bits are lasered sequentially with no two numbers the same. The last 8 bits contain a Cyclic Redundancy Check (CRC) value that has been calculated across the family code and the 48Cbit serial number. The CRC ensure...
Vendor:PANPackage Cooled:SOT-363D/C:08+
The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177−...
Vendor:Panasonic
Vendor:PANASONICPackage Cooled:QFND/C:03+
Vendor:PANASONICPackage Cooled:SOT363D/C:06+
Vendor:PANPackage Cooled:SOT-363D/C:08+
There are two feedback paths to the ZIA: one from the mac- rocell, and one from the I/O pin. The ZIA feedback path before the output buffer is the macrocell feedback path, while the ZIA feedback path after the output buffer is the I/O pin feedback path. When the macrocell is used as an out- put, the output buffer is enabled, and the macrocell feed- back path can be used to feedback the logic implemente...
Vendor:PANPackage Cooled:SOT-183D/C:08+
The QS3VH16233 HotSwitch is a 32-bit to 16-bit high bandwidth bus switch, which can multiplex or demultiplex data. The QS3VH16233 has very low ON resistance, resulting in under 250ps propagation delay through the switch. This device can be used as two 16-bit to 8-bit multiplexers or as one 32-bit to 16-bit multiplexer. SELx inputs control the data flow. TESTx inputs control either one or two ports conne...
Vendor:PANPackage Cooled:SOT-183D/C:08+
The QS3VH16233 HotSwitch is a 32-bit to 16-bit high bandwidth bus switch, which can multiplex or demultiplex data. The QS3VH16233 has very low ON resistance, resulting in under 250ps propagation delay through the switch. This device can be used as two 16-bit to 8-bit multiplexers or as one 32-bit to 16-bit multiplexer. SELx inputs control the data flow. TESTx inputs control either one or two ports conne...
Vendor:PANPackage Cooled:SOT-363D/C:08+
FEATURES Precision 1.200 V Voltage Reference Ultracompact 3 mm 3 mm SOT-23 Package No External Capacitor Required Low Output Noise: 4 V p-p (0.1 Hz to 10 Hz) Initial Accuracy: 0.3% Max Temperature Coefficient: 60 ppm/ C Max Operating Current Range: 100 A to 10 mA Output Impedance: 0.3 Max Temperature Range: C40 C to +85 C
Vendor:PANPackage Cooled:SOT-363D/C:08+
FEATURES Precision 1.200 V Voltage Reference Ultracompact 3 mm 3 mm SOT-23 Package No External Capacitor Required Low Output Noise: 4 V p-p (0.1 Hz to 10 Hz) Initial Accuracy: 0.3% Max Temperature Coefficient: 60 ppm/ C Max Operating Current Range: 100 A to 10 mA Output Impedance: 0.3 Max Temperature Range: C40 C to +85 C
Vendor:PanasonicPackage Cooled:SOTD/C:03+
Fast throughput rate: 100 kSPS Specified for VDD of 2.5 V to 5.5 V Low power 4 mW typ at 100 kSPS with 3 V supplies 17 mW typ at 100 kSPS with 5 V supplies Wide input bandwidth: 81 dB SINAD at 10 kHz input frequency Flexible power/serial clock speed management No pipeline delays High speed serial interface SPI®/QSPI™/MICROWIRE™/DSP compatible Standby mode: 0.5 µA max 6-Lead SO...
Vendor:PANASONICPackage Cooled:QFND/C:06+PB
ISB = 10 mA Fully asynchronous and simultaneous Read and Write operation permitted Mailbox bypass register for each FIFO Parallel and serial programmable Almost Full and Almost Empty flags Retransmit function Standard or FWFT user selectable mode Partial reset Big or Little Endian format for word or byte bus sizes 128-pin TQFP packaging Easily expandable in width and depth
Vendor:PANASONIC
In the HEDS-6540 / HEDL-6540 the output of the comparator for the index pulse is combined with that of the outputs of channel A and channel B to produce the final index pulse. The index pulse is generated once every rotation of the codewheel and is a one state width (nominally 90 electrical degrees), true high index pulse. It is coincident with the low states on channels A and B.
Vendor:PANASONICPackage Cooled:32脚D/C:05+
MSL1 = unlimited floor life at <30C / 85% Relative Humidity. Not normally stored in moisture barrier bag. MSL2 = out of bag storage for 1 year at <30C / 60% Relative Humidity. Supplied in moisture barrier bag. MSL3 = out of bag storage for 168 hours at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
Vendor:PANASONICPackage Cooled:32脚D/C:05+
MSL1 = unlimited floor life at <30C / 85% Relative Humidity. Not normally stored in moisture barrier bag. MSL2 = out of bag storage for 1 year at <30C / 60% Relative Humidity. Supplied in moisture barrier bag. MSL3 = out of bag storage for 168 hours at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
Vendor:PANASONICPackage Cooled:SOT-363
Package Cooled:1333
The Erase Suspend/Erase Resume feature enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved. If a read is needed from the SecSi Sector area (One Time Pro- gram area) after an erase suspend, then the user must use the proper command sequence to enter and exit this region.
Vendor:MATSUSHIATPackage Cooled:2005+D/C:2783
VIA Twister chip with Integrated S3 Savage4 2D/3D/ Video Accelerator 8/16/ 32 MB frame buffer using system memory CRT Mode:1280 x 1024@16 bpp (60 Hz), 1024 x 768@16 bpp (85 Hz) LCD/Simultaneous Mode: 1280 x1024@16bpp (60 Hz), 1024 x 768@16 bpp (60 Hz) 4X AGP VGA/LCD interface, Support for 9, 12, 18, 24, 36,48-bit TFT and 16 or 24-bit DSTN panels up to SXGA resolution. 2-Channel ( 2 x 18-bit) LVDS interfac...
Package Cooled:PanasonicD/C:05+
Fast Function Blocks (FFBs) provide fast, pin-to-pin speed and logic throughput for critical decoding and ultra- fast state machine applications. High-Density Function Blocks (FBs) provide maximum logic density and system- level features to implement complex functions with pre- dictable timing for adders and accumulators, wide func- tions and state machines requiring large numbers of product terms, a...
Vendor:PANPackage Cooled:SOT-143D/C:08+
(For a differential input unit) An example of I/O voltage characteristics of a level conversion circuit for a differential input is shown in the figure to the right. Although the characteristics, including those of the Vth voltage, are basically the same as those for a single-phased input, the two- phased input phase is defined. (Refer to clock timing conditions.)
Vendor:PanasonicPackage Cooled:SOT-143D/C:08+
The Si9167 can operate in either fixed-frequency PWM mode or fixed on-time pulse skipping mode (PSM). Switching losses resulting from the gate charge of the driver and internal BICMOS circuitry are fixed irrespective of the output power drawn from the converter. At lower output levels, the percentage of these losses is high, which makes the circuit less efficient. Therefore, at output loads lower than ...
Vendor:PANASONICPackage Cooled:SOT23-6D/C:06+