GRF2I-LP-0214

GRF32CR72A334KA01L

Vendor:ＭＵＲＡＴＡ

GRF3I-ES

Vendor:SIRFPackage Cooled:QFN24D/C:0430+

In voltage regulator applications where very large load cur- rents are present, the load connection is very important. The path connecting the output of the regulator to the load must be extremely low impedance to avoid affecting the load regulation specifications. Any impedance in this path will form a voltage divider with the load. The MSK 5115 series requires a mini- mum of 10mA of load current to st...

GRF3W

Vendor:SIRFPackage Cooled:QFN5*5D/C:04+

GRF3W-0224

Vendor:HITACHID/C:05+

The THELMA process is utilized to create a surface micro-machined accelerometer. The technology allows to carry out suspended silicon structures which are attached to the substrate in a few points called anchors and free to move on a plane parallel to the substrate itself. To be compatible with the traditional packaging tech- niques a cap is placed on top of the sensing element to avoid blocking the movin...

GRF5103

D/C:05+

Notes: 1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design 4. ∆RÏÍ = RÏÍ max. - RÏÍ min. 5. Flatness is defined as the difference between the maximum and minimum val...

GRF5103

D/C:05+

Notes: 1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design 4. ∆RÏÍ = RÏÍ max. - RÏÍ min. 5. Flatness is defined as the difference between the maximum and minimum val...

GRF5103FB2BBXT

Vendor:QFN6*6Package Cooled:9640D/C:GCT

1. Hitachi neither warrants nor grants licenses of any rights of Hitachis or any third partys patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third partys rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Pr...

GRF5103G

Vendor:GCTPackage Cooled:05+D/C:QFN-40

Although the discrete ORing diode solution has been used for some time and is inexpensive to implement, it has some drawbacks. The primary downside is the increased power dissipation loss in the ORing diodes as power requirements for systems increase. Another disadvantage when using an ORing diode would be failure to detect a shorted or open ORing diode, jeopardizing power system reliability. An open ...

GRF5104/UT5460G

Vendor:GCTPackage Cooled:QFN40D/C:0550+

The M54/74HCT157 and the M54/74HCT158 are high speed CMOS QUAD 2-CHANNEL MULTI- PLEXERs fabricated with silicon gate C2MOS tech- nology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

GRF5104/UT5460G

Vendor:GCTPackage Cooled:QFN40D/C:0550+

The M54/74HCT157 and the M54/74HCT158 are high speed CMOS QUAD 2-CHANNEL MULTI- PLEXERs fabricated with silicon gate C2MOS tech- nology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation.

GRF5104/UT5461G

Vendor:GCTPackage Cooled:QFN48D/C:0614+

ATU-C END: BLOCK DIAGRAM The transformer at ATU-C side has 1:2 ratio. The termination resistors are 12.5Ω in case of 100Ω lines. The hybrid bridge resistors should be < 2.5kΩ for low-noise. An HP filter must be used on the TX path to re-

GRF5104/UT5461G

Vendor:GCTPackage Cooled:QFN48D/C:0614+

ATU-C END: BLOCK DIAGRAM The transformer at ATU-C side has 1:2 ratio. The termination resistors are 12.5Ω in case of 100Ω lines. The hybrid bridge resistors should be < 2.5kΩ for low-noise. An HP filter must be used on the TX path to re-

GRF5104/UT6070G

Vendor:GCTPackage Cooled:QFN48D/C:0614+

The following are trademarks of Conexant Systems, Inc.: Conexant, the Conexant C symbol, and Whats Next in Communications Technologies. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners.

GRF5104/UT6070G

Vendor:GCTPackage Cooled:QFN48D/C:0614+

The following are trademarks of Conexant Systems, Inc.: Conexant, the Conexant C symbol, and Whats Next in Communications Technologies. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners.

GRF6401

Vendor:GCTPackage Cooled:QFN48D/C:07+

GRF6500/UT6740G

Vendor:GCTPackage Cooled:QFN48D/C:06+

Chip Enable Input. If logic high, all functions are enabled. If logic low, internal power is disconnected from the VDD pin, disabling all functions. Logic threshold is 1.6 0.8V maximum over supply and temperature range. Maximum current into VDD when ENABLE < 0.4V is 1 µA .

GRF6500/UT6850G

Vendor:GCTPackage Cooled:QFN48D/C:0626+

An active LOW reset input allows the PCA9548A to recover from a situation where one of the downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-bus state machine and causes all the channels to be deselected as does the internal Power-on reset function.

GRF6500/UT6850G

Vendor:GCTPackage Cooled:QFN48D/C:0626+

An active LOW reset input allows the PCA9548A to recover from a situation where one of the downstream I2C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the I2C-bus state machine and causes all the channels to be deselected as does the internal Power-on reset function.

GRF6500/UT6870G

Vendor:GCTPackage Cooled:QFN48D/C:0635+

Every Infiniium 54830 Series with MegaZoom is a deep-memory oscilloscope with up to a standard 2 Mpts of memory on each chan- nel. Now memory options are available to configure your scope with up to 128 Mpts to capture the longest waveforms without reducing sample rate.

GRF6500/UT6880G

Vendor:GCTPackage Cooled:QFN48D/C:06+

Diode protected input stage for power OFF condition 17 ns typ high speed TTL compatible g10 mV or g25 mV input sensitivity g3V input common-mode range High input impedance with normal VCC or VCC e 0V Strobes for channel selection Dual circuits Sensitivity gntd over full common-mode range Logic input clamp diodes meets both A and B version specifications g5V standard supply voltages

GRF6500/UT6910G

Vendor:GCTPackage Cooled:QFN48D/C:0636+

TEMPERATURE COMPENSATION Figure 2 shows the typical output characteristics of the MPX53/MPXV53GC series over temperature. The piezoresistive pressure sensor element is a semicon- ductor device which gives an electrical output signal propor- tional to the pressure applied to the device. This device uses a unique transverse voltage diffused semiconductor strain gauge which is sensitive to stresses pro...

GRF6500/UT6930G

Vendor:GCTPackage Cooled:QFN48D/C:0636+

Drain-to-Source Breakdown Voltage Gate Threshold Voltage Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Zero Gate Voltage Drain Current Static Drain-to-Source ➃ On-State Resistance (TO-39) Static Drain-to-Source ➃ On-State Resistance (LCC-28) Diode Forward Voltage ➃

GRF6500/UT6930G

Vendor:GCTPackage Cooled:QFN48D/C:0636+

Drain-to-Source Breakdown Voltage Gate Threshold Voltage Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Zero Gate Voltage Drain Current Static Drain-to-Source ➃ On-State Resistance (TO-39) Static Drain-to-Source ➃ On-State Resistance (LCC-28) Diode Forward Voltage ➃

GRF7202/UU6ZW0G

Vendor:GCTPackage Cooled:QFN64D/C:06+

6HFXUHG 6LOLFRQ 6HFWRU UHJLRQ ²  ZRUGV DFFHVVLEOH WKURXJK D FRPPDQG VHTXHQFH ZRUGV IRU WKH )DFWRU\ 6HFXUHG 6LOLFRQ 6HFWRU DQG ZRUGV IRU WKH &XVWRPHU 6HFXUHG 6LOLFRQ 6HFWRU 6HFWRU $UFKLWHFWXUH .ZRUG [  ERRW VHFWRUV HLJKW DW WKH WRS RI WKH DGGUHVV UDQJH DQG HLJKW DW WKH ERWWRP RI WKH DGGUHVV UDQJH

GRF7202/UU6ZW2G

Vendor:GCTPackage Cooled:QFN64D/C:06+

The MCP1252/3 are inductorless, positive-regulated charge pump DC/DC converters. The devices generate a regulated fixed (3.3V or 5.0V) or adjustable output voltage. They are specifically designed for applications requiring low noise and high efficiency and are able to deliver up to 120 mA output current. The devices allow the input voltage to be lower or higher than the output voltage, by automatically switc...

GRF7202/UU6ZW2G

Vendor:GCTPackage Cooled:QFN64D/C:06+

The MCP1252/3 are inductorless, positive-regulated charge pump DC/DC converters. The devices generate a regulated fixed (3.3V or 5.0V) or adjustable output voltage. They are specifically designed for applications requiring low noise and high efficiency and are able to deliver up to 120 mA output current. The devices allow the input voltage to be lower or higher than the output voltage, by automatically switc...

GRFF4004-0001

GRG55EE11E335ZC03L

Vendor:MURATAPackage Cooled:/D/C:03+

GRH1008-1R8J

GRK40CH100D50PT

The 74AUP1G79 provides the single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.

GRK40R471K50

D/C:20000

Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute−maximum−rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions. 1. Tested to EIA/JESD22−A114−A. 2. Test...

GRM 40Y5V475Z010AL

GRM0225C1C100JD01D

GRM0225C1C390JD01D

Vendor:MURATAPackage Cooled:08+D/C:200000

GRM0225C1C7R5DD04D

Vendor:MURATAPackage Cooled:08+D/C:200000

GRM0225C1C9R1DD01D

GRM022R60J102KE19D

Vendor:MURATAPackage Cooled:08+D/C:200000

GRM022R60J103KE19D

Vendor:MURATAPackage Cooled:08+D/C:200000

GRM022R60J103KE19D

Vendor:MURATAPackage Cooled:08+D/C:200000

GRM022R60J681KE19D

Vendor:MURATAPackage Cooled:08+D/C:200000

GRM0332C1E100JD01D

Vendor:MURATAD/C:08+

GRM0332C1E100JD01D

Vendor:MURATAD/C:08+

GRM0332C1E100JD01E

D/C:15000

This product features an asymmetrically-blocked architecture providing system memory integration. Each erase block can be erased independently of the others up to 100 000 times. For the address locations of the blocks, see the memory map in Fig. 1.

GRM0332C1E100JD01E

D/C:15000

This product features an asymmetrically-blocked architecture providing system memory integration. Each erase block can be erased independently of the others up to 100 000 times. For the address locations of the blocks, see the memory map in Fig. 1.

GRM0332C1E101JD01D

Vendor:MURATAD/C:08+

These regulators feature a dedicated control input (EN, Active High) for power-up sequencing flexibility. When this input is taken low, the regulator output is disabled. In this state, the supply current will drop to a low level to ensure all the internal control circuitry still remains active. This provides excellent start-up response when- ever the device comes out of shutdown.

GRM0332C1E150J

GRM0332C1E150JD01D

Vendor:MURATAD/C:08+

The Connect Memory data is received via the Microprocessor Interface at D0-D7 lines. The addressing of the MT8985 internal registers, Data and Connect memories is performed through address input pins and some bits of the device's Control register. The higher order address bits come from the Control register, which may be written or read through the microprocessor interface. The lower order address bits come ...

GRM0332C1E180JD01

GRM0332C1E180JD01D

Vendor:MURATAD/C:08+

GRM0332C1E180JD01D

Vendor:MURATAD/C:08+

GRM0332C1E2R7BD01E

Vendor:MURATAD/C:06+

GRM0332C1E330J

GRM0332C1E330JD01D

Vendor:MURATAD/C:08+

Bild / Fig. 5 B2 - Zweiplus-Brckenschaltung / Two-pulse bridge circuit Höchstzulässiger Ausgangsstrom / Maximum rated output current Id Gesamtverlustleist. der Schaltung / total power dissip. of the circuit Ptot Parameter: Wärmewiderstand zwischen Gehäuse und Umgebung / thermal resistance case to ambient RthCA

GRM0332C1E390JD01D

Vendor:MURATAD/C:08+

GRM0332C1E390JD01E

D/C:16891

Operation of the devices described herein with conditions above those listed under Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this data sheet is not implied. Exposure to absolute maximum ratings conditions for extended periods of time may affe...

GRM0332C1E3R5C

GRM0332C1E470J

GRM0332C1E470JD01D

Vendor:MURATAD/C:08+

SOFT START Soft Start is engaged when the device is taken out of Shut- down mode (EN = logic HIGH) or when voltage is supplied simultaneously to the VIN and EN pins. During Soft Start, the voltage on VOUT will ramp up in proportion to the rate that the reference voltage is being ramped up. The output voltage is programmed to rise from 0V to 5V in 640µs (typ.).

GRM0332C1E470JD01D

Vendor:MURATAD/C:08+

SOFT START Soft Start is engaged when the device is taken out of Shut- down mode (EN = logic HIGH) or when voltage is supplied simultaneously to the VIN and EN pins. During Soft Start, the voltage on VOUT will ramp up in proportion to the rate that the reference voltage is being ramped up. The output voltage is programmed to rise from 0V to 5V in 640µs (typ.).

GRM0332C1E4R0GD01D

Vendor:MURATAD/C:07+

GRM0332C1E4R1JD01

GRM0332C1E4R2C

GRM0332C1E4R2GD01

GRM0332C1E4R3GD01D

Vendor:MURATAD/C:07+

GRM0332C1E4R3JD01

GRM0332C1E4R4GD01D

Vendor:MURATAD/C:07+

GRM0332C1E4R4JD01D

Vendor:MURATAD/C:07+

GRM0332C1E4R6C

GRM0332C1E4R8GD01

GRM0332C1E4R9GD01

GRM0332C1E4R9JD01

GRM0332C1E4R9JD01D

Vendor:MURATAD/C:07+

GRM0332C1E560JD01D

Vendor:MURATAD/C:08+

Acknowledge Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte. The master device must generate an extra clock pulse which is associated with this acknowledge bit. The device that acknowledges, has to pull down the SDA line during the acknowledge clock pulse in such a way that the SDA line is stable LOW during the HIGH period of the acknowledge rela...

GRM0332C1E5R0BD01D

D/C:1000

GRM0332C1E5R1D

GRM0332C1E5R1FD01D

Vendor:MURATAD/C:07+

GRM0332C1E5R1GD01

GRM0332C1E5R3D

GRM0332C1E5R5FD01D

Vendor:MURATAD/C:07+

GRM0332C1E5R6FD01D

Vendor:MURATAD/C:07+

GRM0332C1E5R8GD01

GRM0332C1E5R9FD01

GRM0332C1E5R9GD01D

Vendor:MURATAD/C:07+

GRM0332C1E680JD01

GRM0332C1E6R0DD01

GRM0332C1E6R2D

GRM0332C1E6R4FD01

GRM0332C1E6R5D

GRM0332C1E6R6GD01D

Vendor:MURATAD/C:07+

GRM0332C1E6R7FD01D

Vendor:MURATAD/C:07+

GRM0332C1E6R7GD01D

Vendor:MURATAD/C:07+

GRM0332C1E6R8GD01D

Vendor:MURATAD/C:07+

GRM0332C1E6R9D

GRM0332C1E6R9FD01D

Vendor:MURATAD/C:07+

GRM0332C1E6R9GD01

GRM0332C1E7R0BD01D

D/C:650

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds D, DB, N, or PW package260260C † Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximu...

GRM0332C1E7R0DD01D

Vendor:MURATAD/C:08+

As shown in Figure 2, the three internal memory RAM blocks reside in memory page 0. The entire DSP memory map consists of 256 pages (pages 0 to 255), and each page is 64K words long. External memory space consists of four memory banks (banks3C0) and supports a wide variety of memory devices. Each bank is selectable using unique memory select lines (MS3C0) and has configurable page boundaries, wait stat...

GRM0332C1E7R1FD01

GRM0332C1E7R2D