H04745748

Vendor:N/APackage Cooled:N/AD/C:08+09+

A typical multipoint application is shown in the above figure. Terminating resistor, RT are typically required but only located at the two ends of the cable. Pull-up and pull-down resistors maybe required at the end of the bus to provide fail-safe biasing. The biasing resistors provide a bias to the cable when all drivers are in TRI-STATE, See National Application Note, AN-847 for further information.

H04745748

Vendor:N/APackage Cooled:N/AD/C:08+09+

A typical multipoint application is shown in the above figure. Terminating resistor, RT are typically required but only located at the two ends of the cable. Pull-up and pull-down resistors maybe required at the end of the bus to provide fail-safe biasing. The biasing resistors provide a bias to the cable when all drivers are in TRI-STATE, See National Application Note, AN-847 for further information.

H04745748F

Vendor:INTERSILPackage Cooled:SOP

H047MDS

H-04812391AC/AB

• Arcless card insertion and removal • Central Office Switching Hardware • Circuit Boards From -48 V Distributed Power Supplies • Circuit Board Power Manager and Noise Filter • Circuit Board Hot Swap Protector and Manager • Electronic Circuit Breaker • Wireless Local Loop Antennas • Cable TV Antenna

H04812391B

Vendor:27D/C:97+

H04858609AA

Vendor:HARPackage Cooled:800

The chip is a fixed frequency Pulse Width Modulator based on the industry standard UC1843x Series with significant enhancements in performance and functionality. The chip operates in either the voltage or current mode and can support a wide variety of converter topologies. Radiation hardened by design techniques ensure the chips outstanding radiation tolerance (>1MRads) while reducing operating current b...

H04AB34C02

Vendor:IRPackage Cooled:SOP8PD/C:00+

H0504CP104J30PS

H0504CP331J30PS

H0504CPX3740F10

H0509D-2W

Vendor:MORNSUNPackage Cooled:DIPD/C:09+

regulator and not to the load. In fact, if R1 is connected to the load side, the effective resistance between the regulator and the load is gained up by the factor of (1+R2/ R1), or the effective resistance will be, Rp(eff)=Rp*(1+R2/ R1). It is important to note that for high current applica- tions, this can represent a significant percentage of the overall load regulation and one must keep the path from the...

H050A

H053FDS

A silicon diode operating as a current source. The out- put current is proportional to the incident optical flux supplied by the LED emitter. The diode is operated in the photovoltaic or photoconductive mode. In the pho- tovoltaic mode the diode functions as a current source in parallel with a forward biased silicon diode. The magnitude of the output current and voltage is dependent upon the load res...

H05L181K3-YB-1

H0623BBA

Vendor:N/APackage Cooled:N/AD/C:08+09+

In Loopback mode Only one output drive pin per package will be shorted at any time From 10% to 90% of steady-state This is an absolute maximum rating; normal operating levels are V < 5V Outputs unloaded; Inputs tied to GND; T = +25C; V = 0V; LB=0 Typical SP304 current drains under full load are: 18mA (+12V), 10mA (-12V) and 7mA (+5V) in RS-232 mode only; 5mA (+12V), 7mA (-12V) and 56mA (+5V) in RS-...

H0647401

D/C:07+

5.2.5 Interface to Management Entities The ST20196 also runs the communication protocol to interface with external management entities. A spe- cific ADSL modem control interface has been defined to ease the integration with both systems hardware and firmware. This control communication channel is used to transfer information and commands between modem and management entities. These commands/responses are...

H06F730B

H0705CA3652BEB

H0705CA4991BEB

H0705CPX156J30

H0802AYYHET

This device is fabricated using LinCMOS technology and consists of two independent voltage comparators, each designed to operate from a single power supply. Operation from dual supplies is also possible if the difference between the two supplies is 2 V to 18 V. Each device features extremely high input impedance (typically greater than 1012 Ω), allowing direct interfacing with high-im...

H0805

Vendor:SECPackage Cooled:08+D/C:1200

Information present at any register is trans- ferred to the respective latch when the STROBE is high (serial-to-parallel conversion). The latches will continue to accept new data as long as the STROBE is held high. Applications where the latches are bypassed (STROBE tied high) will require that the BLANKING input be high during serial data entry.

H0844A

H087143C

Vendor:HARPackage Cooled:800

START Pin 17 - This is an open-drain pull-down digital output pin; it is pulled low when one or more of the monitored conditions is not valid; the output goes high impedance (to be pulled high externally through a pull-up resistor or equivalent) if all conditions are met. See Logic Options Table for the various conditions.

H0J169300002(CX-16F)

Package Cooled:08+D/C:33

H0J200500048

Vendor:SMDPackage Cooled:RIVERD/C:05+

Field/Factory programming is available for samples and manufacturing by Cypress and its distributors. All requests must be submitted to the local Cypress Field Application Engineer (FAE) or sales representative. Once the request has been processed, you will receive a new part number, samples, and data sheet with the programmed values. This part number will be used for additional sample requests and production...

H10000

H100-02T-NRBB

General layout and supply bypassing play major roles in high frequency performance and thermal characteristics. Fairchild offers a demonstration board, FMS6400DEMO, to use as a guide for layout and to aid in device testing and characterization. The FMS6400DEMO is a 4-layer board with a full power and ground plane. For optimum results, follow the steps below as a basis for high frequency layout:

H1001

Vendor:PulsePackage Cooled:QFPD/C:00+

ATS278 is an integrated Hall sensor with two output drivers and rotor speed output, typically designed for electronic commutation of two-phase brush-less DC fan applications. On-chip Hall sensor will generate Hall voltage due to magnetics sensing. The amplifier will amplify the Hall voltage. The Schmitt trigger determines switching hysteresis and then control internal drivers on/off to sink load current. Me...

H100308

Vendor:HARRISPackage Cooled:PLCC84

H100309

Vendor:HARRISPackage Cooled:PLCC84

H100309

Vendor:HARRISPackage Cooled:PLCC84

H100420A

Vendor:HARRISD/C:08+

H100465

Vendor:HARRISD/C:08+

H100-8

Package Cooled:00+D/C:SSOP-3.9-16P

H100-9

Package Cooled:SSOP-3.9-16PD/C:6+

C Supports both Firmware Hub (FWH) and LPC Memory Read and Write Cycles Auto-detection of FWH and LPC Memory Cycles C Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets C Can Be Used as LPC Flash for Non-Intel Chipsets Flexible, Optimized Sectoring for BIOS Applications C 16-Kbyte Top Boot Sector, Two 8-Kbyte Sectors, One 32-Kbyte Sector, Three 64-Kbyte Sectors C Or Memory Array Can...

H100-9

Package Cooled:SSOP-3.9-16PD/C:6+

C Supports both Firmware Hub (FWH) and LPC Memory Read and Write Cycles Auto-detection of FWH and LPC Memory Cycles C Can Be Used as FWH for Intel 8xx, E7xxx, and E8xxx Series Chipsets C Can Be Used as LPC Flash for Non-Intel Chipsets Flexible, Optimized Sectoring for BIOS Applications C 16-Kbyte Top Boot Sector, Two 8-Kbyte Sectors, One 32-Kbyte Sector, Three 64-Kbyte Sectors C Or Memory Array Can...

H100CHD

Vendor:BIVARD/C:08+

H100CYDL

Vendor:BIVARD/C:08+

H1011

Flash Initialization. Software is stored on an external Flash. At boot-up, the stored software is downloaded to the device. By using compilation options, software can be executed from the internal RAM (intensive operations) or executed from the flash. Execution is optimized by the use of an intermediate cache mem- ory.

H1012B

Vendor:PULSEPackage Cooled:SOP-16D/C:08+

At both ends of each array and between each resistor segment is a FET switch connected to the wiper (VW/ RW) output. Within each individual array only one switch may be turned on at a time. These switches are controlled by the Wiper Counter Register (WCR). The six least significant bits of the WCR are decoded to select, and enable, one of sixty-four switches.

H1012B

Vendor:PULSEPackage Cooled:SOP-16D/C:08+

At both ends of each array and between each resistor segment is a FET switch connected to the wiper (VW/ RW) output. Within each individual array only one switch may be turned on at a time. These switches are controlled by the Wiper Counter Register (WCR). The six least significant bits of the WCR are decoded to select, and enable, one of sixty-four switches.

H1012BT

Vendor:PULSEPackage Cooled:SOP-16D/C:01+

256K x 36, 512K x 18 memory configurations Supports fast access times: C 7.5ns up to 117MHz clock frequency C 8.0ns up to 100MHz clock frequency C 8.5ns up to 87MHz clock frequency LBO input selects interleaved or linear burst mode Self-timed write cycle with global write control (GW byte writeGW),GW enable (BWE and byte writes (BWBWE),BWx)BWEBW 3.3V core power supply Power down controlled by ZZ input 3.3...

H1012BT

Vendor:PULSEPackage Cooled:SOP-16D/C:01+

256K x 36, 512K x 18 memory configurations Supports fast access times: C 7.5ns up to 117MHz clock frequency C 8.0ns up to 100MHz clock frequency C 8.5ns up to 87MHz clock frequency LBO input selects interleaved or linear burst mode Self-timed write cycle with global write control (GW byte writeGW),GW enable (BWE and byte writes (BWBWE),BWx)BWEBW 3.3V core power supply Power down controlled by ZZ input 3.3...

H1012C

Vendor:HARRISD/C:05+

Notes: a. Room = 25_C, Full = as determined by the operating temperature suffix. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. d. Guaranteed by design, not subject to production test. e. VIN = input voltage to perform proper f...

H1012NL

Vendor:PULSEPackage Cooled:SOPD/C:N/A

These monolithic converters are derived from the 256-bit read only memories DM5488 and DM7488 Emitter con- nections are made to provide direct read-out of converted codes at outputs Y8 through Y1 as shown in the function tables These converters demonstrate the versatility of a read only memory in that an unlimited number of reference tables or conversion tables may be built into a system Both of these...

H1013T

Note 6: Parameter measured at trip point of latch with Pin 2 at 0V. Note 7: Total Variation includes temperature stability and load regulation. Note 8: Start Threshold, Stop Threshold and Zener Shunt Thresholds track one another. Note 9: Guaranteed by design. Not 100% tested in production.

H1015

Vendor:INTERSILD/C:05+

Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It is an open drain output and may be wire-ORed with any number of open drain or open collector outputs. An open drain output requires the use of a pull-up resistor. For selecting typical values, refer to the guidelines for calculating typical values on the bus pull-up resistors graph.

H1015T

The EBI provides two chip selects (E_nCS[1:0]) to be used for memory access (SRAM-like), one dedicat- ed SDRAM chip select ((E_nCS_S) and four chip selects (E_nCS[7:4]) to be used for access to ADSL slave devices. The chip selects all correspond to a fixed 1Mbyte memory region in the microcontroller memory map, except for SDRAM access.

H1016

Vendor:PULPackage Cooled:SOP-8D/C:N/A

When measuring return loss at the H1016 output it is necessary to take the measurement for both a logic high and a logic low output condition. This is because the output protection diodes act as a varactor (voltage controlled capacitor) as shown in Figure 5.

H1019

Vendor:PULSED/C:08+

General-purpose applications are greatly enhanced by the large address space, multiprocessor interface, internally and externally generated wait states, one external interface port, two timers, one serial port, and multiple-interrupt structure. The SM320C3x supports a wide variety of system applications from host processor to dedicated coprocessor. High-level-language support is easily implemented through ...

H101A

Vendor:HARPackage Cooled:800

The Self Refresh allows the user a dynamic refresh, data retention mode at the extended refresh period of 128 ms. i.e., 125 µs per row when using distributed CBR refreshes. The feature also allows the user the choice of a fully static, low power data retention mode. The optional Self Refresh feature is initiated by performing a CBR Refresh cycle and holding RAS LOW for the specified tRASS. The ...

H101C

Vendor:STPackage Cooled:SOP/8

multivibrator can be calculated by : T = 1/2 RX CX for CX > 0.01µF. The min. value of external resistance, RX, is 5KΩ. The max. values of external capacitance, CX, is 100 µF. The output pulse width has variations of 2.5% typically, over the temperature range of -55 C to 125 C for CX=1000pF and R X = 100KΩ . For power supply variation of 5% typically , for V DD = 10V and 1...

H101C

Vendor:STPackage Cooled:SOP/8

multivibrator can be calculated by : T = 1/2 RX CX for CX > 0.01µF. The min. value of external resistance, RX, is 5KΩ. The max. values of external capacitance, CX, is 100 µF. The output pulse width has variations of 2.5% typically, over the temperature range of -55 C to 125 C for CX=1000pF and R X = 100KΩ . For power supply variation of 5% typically , for V DD = 10V and 1...

H101CBC

Vendor:BIVARD/C:08+

H101CYDL

Vendor:BIVARD/C:08+

H101FDS

A refresh operation must be performed at least once every 16 ms (128 ms for TMS4x100P) to retain data. This can be achieved by strobing each of the 1024 rows (A0 C A9). A normal read or write cycle refreshes all bits in each row that is selected. A RAS-only operation can be used by holding CAS at the high (inactive) level, conserving power as the output buffer remains in the high-impedance state. External...

H102071

The device is available with access times as fast as 70 ns. The devices are offered in 40-pin TSOP, 48-pin TSOP and 48-ball FBGA packages. Standard control pins- chip enable (CE#), write enable (WE#), and output enable (OE#)-control normal read and write operations, and avoid bus con- tention issues.

H102-10

Package Cooled:00+D/C:SSOP-3.9-16P

The ISL6537A provides a complete ACPI compliant power solution for up to 4 DIMM dual channel DDR/DDR2 Memory systems. Included are both a synchronous buck controller to supply VDDQ during S0/S1 and S3 states. During S0/S1 state, a fully integrated sink-source regulator generates an accurate (VDDQ/2) high current VTT voltage without the need for a negative supply. A buffered version of the VDDQ/2 reference ...

H102-12

Package Cooled:00+D/C:SSOP-3.9-16P

The output drives a 100Ω load to 3.8V with 5V sup- plies. On a single 5V supply, the output swings from 1V to 4V with a 100Ω load connected to 2.5V. Harmonic distortion is C70dB for a 5MHz, 2VP-P output driving a 100Ω load in a gain of C1.

H1021T

D/C:08+/09+

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−b...

H1026

Vendor:PulsePackage Cooled:02+D/C:1064

Sector data protection is afforded by methods that can disable any combination of sectors from write or read operations using standard programming equipment. An on-chip state machine provides an on-board algorithm that automatically pre-programs and erases any sector before it automatically programs and verifies program data at any specified address. The command set is compatible with that of the Joint El...

H1027T

H1028

Vendor:PULSEPackage Cooled:N/AD/C:N/A

Recovered Serial Data. These ECL 100K outputs (+5V referenced) represent the recovered data from the input data stream (RIN). This recovered data is aligned with the recovered clock (RCLK) with a sampling window compatible with most data processing devices.

H1028T

Vendor:PulsePackage Cooled:SOPD/C:02+

Utilizing InGaN technology High luminous flux Supreme heat dissipation: RthJP is 90 K/W High operating temperature: Tj + 100 C Packed in tubes for automatic insertion Luminous flux and color categorized for each tube Small mechanical tolerances allow precise usage of external reflectors or lightguides

H102-9

Package Cooled:SSOP-3.9-16PD/C:6+

NOTES: 1. The SA56004X is optimized for 3.3 VDD operation. 2. Definition of Under Voltage Lockout (UVL): The value of VDD below which the internal A/D converter is disabled. This is designed to be a minimum of 200 mV above the power-on-reset. During the time that it is disabled, the temperature that is in the read temperature registers will remain at the value that it was before the A/D was disabled. Th...

H102D1

Vendor:SGSD/C:DIP14

Every manufacturing lot is tested in a low dose rate (total dose) environment per MIL-STD-750, test method 1019 condition A. International Rectifier has imposed a standard gate condition of 12 volts per note 6 and a VDS bias condition equal to 80% of the device rated voltage per note 7. Pre- and post- irra- diation limits of the devices irradiated to 1 x 105 Rads (Si) are identical and are presented ...

H1033

Vendor:PULSED/C:9813

A watchdog timer is a simple countdown timer which is used to reset a microprocessor after a specific interval of time. In a properly operating system, software will periodically "pet" or restart the watchdog timer. After being restarted, the watchdog will begin timing another predetermined interval. When software or the device is not functioning correctly, software will not restart the watchdog ti...

H1033

Vendor:PULSED/C:9813

A watchdog timer is a simple countdown timer which is used to reset a microprocessor after a specific interval of time. In a properly operating system, software will periodically "pet" or restart the watchdog timer. After being restarted, the watchdog will begin timing another predetermined interval. When software or the device is not functioning correctly, software will not restart the watchdog ti...

H1036L

Vendor:PULSED/C:08+

1. Charge qualification 2. Trickle charge, if required 3. Fast charge (constant current) 4. Charge termination (peak voltage, maximum charge time) 5. Top-off (optional) 6. Trickle charge 1. Charge qualification 2. Trickle charge, if required 3. Two-step fast charge (constant current followed by constant voltage) 4. Charge termination (minimum current, maximum charge time)

H1036LT

Vendor:PULSEPackage Cooled:2006D/C:SMD40

Responsible electronic component and equipment manufacturers are already preparing for the time when the lifespan of their products comes to an end by scrutinizing the materials incorporated and their future recyclability. Recycling laws have already come into force in Germany ("Kreislauf-Wirtschafts- gesetz") and guidelines for electronic scrap are in preparation. The aim is a suitable wa...

H1038

Vendor:PULSEPackage Cooled:2006D/C:MODULE

The value of the load capacitors can be roughly determined by the formula C = 2(CL - 6) where C is the load capacitor connected to X1 and X2, and CL is the specified value of the load capacitance for the crystal. A typical crystal CL is 18 pF, so C = 2(18 - 6) = 24 pF. Because these capacitors adjust the stray capacitance of the PCB, check the output frequency using your final layout to see if the va...

H103CGDL

Vendor:BIVARD/C:08+

H103D1

Vendor:98

The Direct Rambus RIMM module consists of 144 Mbit Direct Rambus DRAM (Direct RDRAM™) devices. These are extremely high-speed CMOS DRAMs organized as 8M words by 18 bits. The use of Rambus Signaling Level (RSL) technology permits 600 MHz to 800 MHz transfer rates while using conventional system and board design technologies. Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per ...

H103D1

Vendor:98

The Direct Rambus RIMM module consists of 144 Mbit Direct Rambus DRAM (Direct RDRAM™) devices. These are extremely high-speed CMOS DRAMs organized as 8M words by 18 bits. The use of Rambus Signaling Level (RSL) technology permits 600 MHz to 800 MHz transfer rates while using conventional system and board design technologies. Direct RDRAM devices are capable of sustained data transfers at 1.25 ns per ...

H1042

Vendor:PULSED/C:08+

TRI-STATE ® is a registered trademark of National Semiconductor Corporation. MICROWIRE/PLUS™, COP8™, MICROWIRE™ and WATCHDOG™ are trademarks of National Semiconductor Corporation. iceMASTER ® is a registered trademark of MetaLink Corporation.

H1042T

H1043

Vendor:PULSEPackage Cooled:SOP

Selectable dual output or bi-phase operation Direct drive for N-channel MOS.ETs Undervoltage lockout Synchronization to external clock Multi-converter synchronization Soft start .ast transient response Max duty cycle 45% Output over voltage protection Thermal shutdown

H1044

Vendor:PULSED/C:08+

The MAX1534 is a high-efficiency, triple-output power supply for keep-alive (always on) voltage rails. The 500mA buck regulator with an internal current-limited 0.5Ω PMOS steps down the battery or wall adapter supply rail to a fixed 5V or an adjustable output voltage. Two integrated low-voltage linear regulators follow this output and provide two independent preset output volt- ages of 3.3V and 1.8V, o...

H1044

Vendor:PULSED/C:08+

The MAX1534 is a high-efficiency, triple-output power supply for keep-alive (always on) voltage rails. The 500mA buck regulator with an internal current-limited 0.5Ω PMOS steps down the battery or wall adapter supply rail to a fixed 5V or an adjustable output voltage. Two integrated low-voltage linear regulators follow this output and provide two independent preset output volt- ages of 3.3V and 1.8V, o...

H104800001

H1049

Vendor:PULSEPackage Cooled:0526+0603+D/C:SMD40

135-mΩ -Maximum (5-V Input) High-Side MOSFET Switch 250 mA Continuous Current per Channel Independent Short-Circuit and Thermal Protection With Overcurrent Logic Output Operating Range . . . 2.7-V to 5.5-V Logic-Level Enable Input 2.5-ms Typical Rise Time Undervoltage Lockout 10 µA Maximum Standby Supply Current Bidirectional Switch Available in 8-pin SOIC and PDIP Packages Ambient Temperatu...

H104D6RB

H105-1

Package Cooled:SMDD/C:09+

The PHY uses the S5_LKON_DS2 terminal to notify the LLC to power up and become active. When activated, the output S5_LKON_DS2 signal is a square wave. The PHY activates the S5_LKON_DS2 output when the LLC is inactive and a wake-up event occurs. The LLC is considered inactive when either the LPS input is inactive, as described above, or the LCtrl bit is cleared to 0. A wake-up event occurs when a link-on ...

H105-1

Package Cooled:SMDD/C:09+

The PHY uses the S5_LKON_DS2 terminal to notify the LLC to power up and become active. When activated, the output S5_LKON_DS2 signal is a square wave. The PHY activates the S5_LKON_DS2 output when the LLC is inactive and a wake-up event occurs. The LLC is considered inactive when either the LPS input is inactive, as described above, or the LCtrl bit is cleared to 0. A wake-up event occurs when a link-on ...

H1054

D/C:08+/09+

The TLE 4471 is a monolithic integrated very low-drop triple voltage regulator. The main output supplies loads up to 450 mA and the additional tracked outputs can provide up to 50 mA and 100 mA. In addition the device includes a watchdog for microcontroller-supervision, an under-voltage reset, a power on reset and extended enabling features. The watchdog and reset timing can be chosen independently of each...

H1054

D/C:08+/09+

The TLE 4471 is a monolithic integrated very low-drop triple voltage regulator. The main output supplies loads up to 450 mA and the additional tracked outputs can provide up to 50 mA and 100 mA. In addition the device includes a watchdog for microcontroller-supervision, an under-voltage reset, a power on reset and extended enabling features. The watchdog and reset timing can be chosen independently of each...

H1056B

Package Cooled:06+D/C:800

H1056B

Package Cooled:06+D/C:800

H1060

Vendor:PULSEPackage Cooled:SOPD/C:01+

Controlled Baseline C One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of C40C to 125C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product Change Notification Qualification Pedigree† Member of the Texas Instruments Widebus Family Inputs Are TTL-Voltage Compatible 3-State Bus Driving True Outputs Flow-Through Architecture Optimizes PCB L...

H1060NL

Vendor:PULSEPackage Cooled:552D/C:248

PROPAGATION DELAY Propagation delay for all 54C/74C devices is guaranteed with a load of 50 pF and input rise and fall times of 20 ns. A 50 pF load was chosen, instead of 15 pF as in the 4000 se- ries, because it is representative of loads commonly seen in CMOS systems. A good rule of thumb, in designing with CMOS, is to assume 10 pF of interwiring capacitance. Oper- ating at the specified propagation...

H1060NLT

Vendor:PULSEPackage Cooled:04+D/C:272

3.3V tolerant input for CPU frequency selection. Refer to input electrical characteristics for Vil_FS and Vih_FS values. TEST_MODE is a real time input to select between Hi-Z and REF/N divider mode while in test mode. Refer to Test Clarification Table. True clock of differential SRC clock pair. Complement clock of differential SRC clock pair. True clock of differential SRC clock pair. Complement cl...

H1061C

Vendor:HITACHIPackage Cooled:TO220D/C:07+/08+

CS: Chip Select- A controlling function. When held High the Data Outputs Q0, Q1, Q2 and Q3 and the Data Change output are disabled. When taken Low the Data Outputs Q0, Q1, Q2 and Q3 and the Data Change output are enabled; the Interrupt Request (IRQ) is reset (High) when CS is taken Low. See Figures 3 and 4.

H1062NL

Vendor:PULSED/C:06+

• Selectable watchdog timer • Low VCC detection and reset assertion Five standard reset threshold voltages Re-program low VCC reset threshold voltage using special programming sequence Reset signal valid to VCC = 1V • Determine watchdog or low voltage reset with a volatile flag bit • Long battery life with low power consumption <50µA max standby current, watc...

H1062NL

Vendor:PULSED/C:06+

• Selectable watchdog timer • Low VCC detection and reset assertion Five standard reset threshold voltages Re-program low VCC reset threshold voltage using special programming sequence Reset signal valid to VCC = 1V • Determine watchdog or low voltage reset with a volatile flag bit • Long battery life with low power consumption <50µA max standby current, watc...

H1062T

Vendor:PULSEPackage Cooled:2000D/C:SMD

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

H1068T

D/C:99

VCXOs are usually used as a narrowband local frequency source that is locked to some external frequency reference. The VCXO must have sufficient accuracy and pullability to be able to lock to that reference, and Absolute Pull Range is the measure of that ability. All the frequency errors of the VCXO are subtracted from the nominal pull range, and the remaining range can be guaranteed over all conditi...

H1068T

D/C:99

VCXOs are usually used as a narrowband local frequency source that is locked to some external frequency reference. The VCXO must have sufficient accuracy and pullability to be able to lock to that reference, and Absolute Pull Range is the measure of that ability. All the frequency errors of the VCXO are subtracted from the nominal pull range, and the remaining range can be guaranteed over all conditi...

H1069

For a zero-scale digital output code, the negative input (VIN-) must be 250mV above the positive input (VIN+). The high-performance differential T/H amplifier enables the MAX104 to be used in single-ended input configurations without any degradation in dynamic performance. For a typical single-ended configuration, the analog input signal is coupled to the T/H amplifier stage at the in-phase input pad (VIN...