Index "H"This IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section. Care should be taken to avoid output switching conditions where the VS node flies inductively below ground by more than ...
The absolute maximum ratings under any condition is limited by the constraints of the silicon process. Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. The maximum j...
The following are trademarks of Conexant Systems, Inc.: Conexant™, the Conexant C symbol, and Whats Next in Communications Technologies™. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners.
The following are trademarks of Conexant Systems, Inc.: Conexant™, the Conexant C symbol, and Whats Next in Communications Technologies™. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners.
Four different schemes are shown in Figures 2, 3, 4, and 5. Note that the values of R1 and R2 in these fig- ures should be kept small to minimize pickup of un- wanted noise and interference. A value of 1 kW is often used, since some microphones require a differ- ential input impedance of this magnitude. Unfortu- nately, one would usually desire a significantly higher common mode input impedance to mi...
Vendor:SAMPOPackage Cooled:50D/C:N/A
C industry standard asynchronous SCI serial inter- face (not on all products - see device summary below) C digital Watchdog C 16-bit Timer featuring an External clock input, 2 Input Captures, 2 Output Compares with Pulse Generator capabilities C fast I2C Multi Master interface (not on all prod- ucts - see device summary) C Low voltage (LVD) reset ensuring proper power- on or power-off of the ...
Vendor:HTPackage Cooled:DIPD/C:03+
I Full JTAG boundary scan and Embedded ICE support I Integrated Peripheral Interfaces 32-bit SDRAM Interface up to 2 external banks 8/32/16-bit SRAM/FLASH/ROM Interface Multimedia Codec Port Two Synchronous Serial Interfaces (SSI1, SSI2) CODEC Sound Interface 88 Keypad Scanner 27 General Purpose Input/Output pins Dedicated LED flasher pin from the RTC I Internal Peripherals Two 165...
Vendor:HTPackage Cooled:DIPD/C:03+
I Full JTAG boundary scan and Embedded ICE support I Integrated Peripheral Interfaces 32-bit SDRAM Interface up to 2 external banks 8/32/16-bit SRAM/FLASH/ROM Interface Multimedia Codec Port Two Synchronous Serial Interfaces (SSI1, SSI2) CODEC Sound Interface 88 Keypad Scanner 27 General Purpose Input/Output pins Dedicated LED flasher pin from the RTC I Internal Peripherals Two 165...
Vendor:HOLTEKPackage Cooled:DIP
Peak and hold mode with minimum peak time: When the channel is turned on the current rises to the programmed peak current level. Then the channel is internally turned off, the current regulator changes to hold current values and a timer is started for a constant off-time. After this time the channel is inter- nally turned on again until the hold current value is reached and then again turned off for the fixe...
Vendor:PHILIPSPackage Cooled:SMD
The device that acknowledges, has to pull down the SDA line during the Acknowledge clock pulse in such a way that the SDA line is stable low during the high period of the acknowledge related clock pulse. Of course, setup and hold times must be taken into account. During reads, a master must signal an end of data to the slave by not generating an Acknowledge bit on the last byte that has been clocked ...
Vendor:HOLTEKPackage Cooled:QFP-52D/C:08+
Vendor:HOLTEKPackage Cooled:SOP-18D/C:08+
Vendor:HOLTEKPackage Cooled:DIP-18D/C:08+
Vendor:HOLTEKPackage Cooled:SOP-24D/C:08+
Vendor:HOLTEKPackage Cooled:SSOP-56D/C:08+
3. Die Attach a. Eutectic Eutectic die attach can be accom- plished by scrubbing the die with/without a preform on the header to combine with the silicon in the die. Temperature is approxi- mately 400C, with heating times of 5-10 seconds. (NoteCtimes and temperature utilized may vary depending on the type, composi- tion, and heat capacity of the header or substrate used.) This method is recomme...
Vendor:HOLTEKPackage Cooled:SSOP-56D/C:08+
Fourth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design for which HEXFET Power MOSFETs are well known, provides the designer with an extremely efficient device for use in a wide variety of application.
Vendor:HOLTEKPackage Cooled:MSOP-10D/C:08+
Vendor:HOLTEKPackage Cooled:MSOP-10D/C:08+
Vendor:HOLTEKD/C:06+
Vendor:HoltekD/C:1502
This DAC uses a double-buffered 3-wire serial interface that is compatible with SPI™, QSPI, MICROWIRE™, and most DSP interface standards. In addition, a serial data out pin (SDO) allows for daisy-chaining when multiple packages are used. Data readback allows the user to read the contents of the DAC register via the SDO pin. On power-up, the internal shift register and latches are filled w...
Vendor:HTPackage Cooled:SOP-28D/C:04+
• High-speed access time: 9, 10, 12, 15 ns • CMOS low power operation ❑ 594 mW (max.) operating @ 9 ns ❑ 36 mW (max.) CMOS standby • TTL compatible interface levels • Single 3.3V power supply • Fully static operation: no clock or refresh required • Three state outputs • Available in 100-pin TQFP • Industrial temperature available
Vendor:HOLTEKD/C:06+
Vendor:HOLTEKD/C:06+
Vendor:HOLTEKPackage Cooled:SOP-28D/C:08+
Vendor:HT全新现货Package Cooled:DIP/18
The GS 702 transmitter controller has been designed in order to meet the requirements of replacement remote control makers. Its structure is based on Application Specific Programmable Micro-controller with a super parallel architecture implemented by means of CMOS EPROM technology.
Vendor:HT全新现货Package Cooled:DIP/18
The GS 702 transmitter controller has been designed in order to meet the requirements of replacement remote control makers. Its structure is based on Application Specific Programmable Micro-controller with a super parallel architecture implemented by means of CMOS EPROM technology.
Vendor:HOLTEKPackage Cooled:SOP-18D/C:08+
ADVANCE INFORMATION NOTE This product is in development phase and specifications are subject to change without notice. Gennum reserves the right to remove the product at any time. Listing the product does not constitute an offer for sale.
Vendor:HT全新现货Package Cooled:DIP/18
The schottky barrier diode of this product are having large-reverse-current-leakage characteristic compare to the other switching diodes. This current leakage and not proper operating temperature or voltage may cause thermal runaway. Please take forward and reverse loss into consideration when you design.
Vendor:HOLTEKPackage Cooled:18DIP,TUBED/C:08+
Vendor:HOLTEKD/C:06+
Vendor:HoltekD/C:1509
Positive input voltage for the regulator. The internal loading on this input is typically 300µA when- ever the regulator is enabled and less than 1µA when the regulator is disabled. If this input is greater than 2 inches from the main input filter, a 1µF ceramic capacitor is recommended for addi- tional filtering.
Vendor:HoltekD/C:1022
The MAX7447 processes S-Video and CVBS video sig- nals. The video output buffers have a fixed gain of +6dB. Each channel has high-frequency boost circuitry that pro- vides picture sharpness with up to +1.2dB of gain boost without degradation in the stopband. The output video drivers can be disabled with an external pin. The MAX7447 is available in a 14-pin TSSOP package with an exposed pad, and is specified ...
Vendor:HOLTEKPackage Cooled:24SSOP,TUBED/C:08+
Vendor:HOLTEKPackage Cooled:SOP-24D/C:08+
Vendor:HOLTEKPackage Cooled:SOP-28D/C:08+
Vendor:HOLTEKPackage Cooled:SSOP-20D/C:08+
Vendor:HOLTEKD/C:08+
MODE. Logic input to set current-decay mode. In response to a PWM Off command, Slow Decay mode (MODE = 1) switches off the high-side FET, and Fast Decay mode (MODE = 0) switches off the high-side and low-side FETs. Has an internal 50 kΩ pull-up to LCAP.
Vendor:HOLTEKPackage Cooled:SOP-28D/C:08+
Vendor:HOLTEKPackage Cooled:06+D/C:SSOP-56
is enabled after the rising edge of WE#, which initiates the internal Program or Erase operation. The actual completion of the write operation is asynchronous with the system; therefore, either a Data# Polling or Toggle Bit read may be simultaneous with the completion of the write cycle. If this occurs, the system may possibly get an erroneous result, i.e., valid data may appear to conflict with either DQ7 ...
Vendor:HOLTEKPackage Cooled:06+D/C:SSOP-56
is enabled after the rising edge of WE#, which initiates the internal Program or Erase operation. The actual completion of the write operation is asynchronous with the system; therefore, either a Data# Polling or Toggle Bit read may be simultaneous with the completion of the write cycle. If this occurs, the system may possibly get an erroneous result, i.e., valid data may appear to conflict with either DQ7 ...
Vendor:HOLTEKPackage Cooled:56SSOP,TUBED/C:08+
Vendor:HOLTEKPackage Cooled:N/AD/C:2005
135-mΩ -Maximum (5-V Input) High-Side MOSFET Switch 500 mA Continuous Current Short-Circuit and Thermal Protection With Overcurrent Logic Output Operating Range . . . 2.7 V to 5.5 V Logic-Level Enable Input 2.5-ms Typical Rise Time Undervoltage Lockout 10 µA Maximum Standby Supply Current Bidirectional Switch Available in 8-pin SOIC and PDIP Packages Ambient Temperature Range, C40C to 85C 2...
Vendor:HOLTEKPackage Cooled:N/AD/C:2005
135-mΩ -Maximum (5-V Input) High-Side MOSFET Switch 500 mA Continuous Current Short-Circuit and Thermal Protection With Overcurrent Logic Output Operating Range . . . 2.7 V to 5.5 V Logic-Level Enable Input 2.5-ms Typical Rise Time Undervoltage Lockout 10 µA Maximum Standby Supply Current Bidirectional Switch Available in 8-pin SOIC and PDIP Packages Ambient Temperature Range, C40C to 85C 2...
Package Cooled:SOP
FREQUENCY RESPONSE 3dB Bandwidth TEMPERATURE OUTPUT Tout Voltage Sensitivity VOLTAGE REFERENCE VRef Change over Temperature Current Drive Capability SELF TEST Continuous Voltage at DOUTX, DOUTY under Failure Continuous Voltage at DOUTX, DOUTY under Failure DOUTX and DOUTY OUTPUTS Normal Output Range
Package Cooled:SOP
FREQUENCY RESPONSE 3dB Bandwidth TEMPERATURE OUTPUT Tout Voltage Sensitivity VOLTAGE REFERENCE VRef Change over Temperature Current Drive Capability SELF TEST Continuous Voltage at DOUTX, DOUTY under Failure Continuous Voltage at DOUTX, DOUTY under Failure DOUTX and DOUTY OUTPUTS Normal Output Range
Vendor:HoltekD/C:1508
This heading on a data sheet indicates that the device is in sampling, preproduction, or first production stages. The disclaimer at the bottom of the first page reads: This document contains information on a new product. Specifications and information herein are subject to change without notice.
Vendor:HOLTEKPackage Cooled:SSOP-48D/C:08+
Vendor:HOLTEKPackage Cooled:QFP-52D/C:08+
Vendor:HOLTEKPackage Cooled:SSOP-56D/C:08+
Vendor:HOLTEKPackage Cooled:SSOP-48D/C:08+
Vendor:HOLTEKD/C:06+
Vendor:HOLTEKPackage Cooled:QFP-100D/C:08+
Vendor:HOLTEKPackage Cooled:SSOP24D/C:08+
Vendor:HOLTEKPackage Cooled:QFP-44D/C:08+
If the system designer needs more than 16 outputs with the features just described, using two or more zero-delay buffers such as PI6C2509Q, and PI6C2510Q, is likely to be impractical. The device- to-device skew introduced can significantly reduce the perfor- mance. Pericom recommends the use of a zero-delay buffer and an eighteen output non-zero-delay buffer. As shown in Figure 1, this combination produces a ...
Vendor:HOLTEKD/C:06+
Vendor:HOLTEKPackage Cooled:QFP-44D/C:08+
Line capacitance of the HT47R10A-1 has been reduced to less than one-fourth that of the first-generation integrated terminator ICs. Capacitance difference between package types and variation by pin number is shown in the typical performance curve, Line Capacitance vs Pin Number. It shows that the SSOP package provides the lowest capaci- tance with typical values under 2pF. This variation is produced p...
Vendor:HOLTEKPackage Cooled:QFP-64D/C:08+
Serial-test information is conveyed by means of a 4-wire test bus or TAP, that conforms to IEEE Std 1149.1-1990. Test instructions, test data, and test control signals all are passed along this serial-test bus. The TAP controller monitors two signals from the test bus, TCK and TMS. The TAP controller extracts the synchronization (TCK) and state control (TMS) signals from the test bus and generates the app...
Vendor:HTPackage Cooled:DIPD/C:03+
Vendor:HotecD/C:2000
The ADS5102/3 are low-power CMOS, 10-bit, analog- to-digital converters (ADC) that operate from a single 1.8-V supply. The internal reference can be bypassed to use an external reference to suit the dc accuracy and temperature drift requirements of the application. A 10-bit parallel output data bus is provided with 3-state outputs. For power sensitive systems, a standby mode is provided which reduces...
Vendor:HTPackage Cooled:DIPD/C:2005+
THERMAL CONSIDERATIONS Thermal shutdown protection circuitry protects the integrated circuit from thermal overload caused from a rise in junction temperature during excessive power dissipation conditions. This means of protection is intended for fault protection only and not as a means of current or power limiting during normal application usage. Proper thermal evaluation should be done to ensure th...
Vendor:HTPackage Cooled:07+D/C:2230
• On-chip elasticity buffer for PHY signal re-timing to the MX98745 clock source • Contents of internal register loaded from EEPROM • PCS/MAC type MII interface selectable • CMOS device features high integration and low power with a signle +5V supply
Vendor:合泰Package Cooled:SMDD/C:02
When the voltage of RT/GT changes from 0 to VTRT (2.35V for 5V supply), the input signal is effective, and the correct code will be created by the code detector. Af- ter D0~D3 are completely latched, DV output becomes high. When the voltage of RT/GT falls down from VDD to VTRT (i.e.., when there is no input tone), DV output be- comes low, and D0~D3 keeps data until a next valid tone input is produced.
Vendor:HOLTEKPackage Cooled:SOP-28D/C:08+
1. Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under rec- ommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Package Cooled:无铅05+D/C:1843
ARCHITECTURAL ADVANTAGES Simultaneous Read/Write operations - Data can be continuously read from one bank while executing erase/program functions in other bank - Zero latency between read and write operations Multiple bank architectures - Three devices available with different bank sizes (refer to Table 2) Package options - 48-ball TFBGA - 48-pin TSOP Top or bottom boot block Manufactur...
Package Cooled:无铅05+D/C:1843
ARCHITECTURAL ADVANTAGES Simultaneous Read/Write operations - Data can be continuously read from one bank while executing erase/program functions in other bank - Zero latency between read and write operations Multiple bank architectures - Three devices available with different bank sizes (refer to Table 2) Package options - 48-ball TFBGA - 48-pin TSOP Top or bottom boot block Manufactur...
Vendor:HOLTEKPackage Cooled:SSOP-48D/C:08+
TAOperating free-air temperature−55125−4085C NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Package Cooled:SOPD/C:0241+
If the descriptor length loaded from the EEPROM is 6, SX2 will load a VID, PID, and DID from the EEPROM and enumerate. The VID, PID, and DID are loaded LSB, then MSB. For example, if the VID, PID, and DID are 0x0547, 0x1002, and 0x0001, respectively, then the bytes should be stored as:
Package Cooled:SOPD/C:0241+
If the descriptor length loaded from the EEPROM is 6, SX2 will load a VID, PID, and DID from the EEPROM and enumerate. The VID, PID, and DID are loaded LSB, then MSB. For example, if the VID, PID, and DID are 0x0547, 0x1002, and 0x0001, respectively, then the bytes should be stored as:
Vendor:ANAMD/C:4
The QDR operation is possible by supporting DDR read and write operations through separate data output and input ports with the same cycle. Memory bandwidth is maxmized as data can be transfered into sram on every rising edge of K and K, and transfered out of sram on every rising edge of C and C. And totally independent read and write ports eliminate the need for high speed bus turn around.
Vendor:SOP-24Package Cooled:NAMD/C:04+
The Am29LV642D offers access times of 90 and 120 ns and is offered in a 64-ball Fortified BGA package. To eliminate bus contention the Am29LV642D device has two separate chip enables (CE# and CE2#). Each chip enable (CE# or CE2#) is connected to only one of the two dice in the Am29LV642D package. To the system, this device will be the same as two inde- pendent Am29LV640D on the same board. The only di...
The Am29LV642D offers access times of 90 and 120 ns and is offered in a 64-ball Fortified BGA package. To eliminate bus contention the Am29LV642D device has two separate chip enables (CE# and CE2#). Each chip enable (CE# or CE2#) is connected to only one of the two dice in the Am29LV642D package. To the system, this device will be the same as two inde- pendent Am29LV640D on the same board. The only di...
Vendor:SOP20Package Cooled:30400D/C:HOLTEK
• Added Reverse Type Package in ODERING INFORMATION and PIN CONFIGURATION. • Removed KM4132G271B-H/12 product(-H : 100MHz @ CL =2, -12 : 83MHz @ CL=3). • Changed the Current values of ICC1, ICC3N, ICC4, ICC5, ICC6, ICC7 in DC CHARACTERISTICS. • Changed tSAC from 6 to 6.5 @ 125MHz, tSS from 2 to 2.5 @ 125MHz in AC PARAMETER . • Delete a page including FREQUENCY vs. AC PARAMETER RELA...
Vendor:HOLTEKPackage Cooled:SSOP-24D/C:08+
Vendor:HoltekD/C:1015
Vertical power TrenchMOS Low on-state resistance CMOS logic compatible Very low quiescent current Overtemperature protection Load current limiting Latched overload and short circuit protection Overvoltage and undervoltage shutdown with hysteresis On-state open circuit load detection Diagnostic status indication Voltage clamping for turn off of inductive loads ESD protection on all pins...
Vendor:HoltekD/C:1018
Reverberation and echo effects of audio equipment such as radio cassette recorder, car radio, portable radio, portable stereo, echo microphone and Karaoke machine, etc. Sound effect of electronic musical instruments Variable or fixed delay of analog signals
Vendor:360
Vendor:HOLTEKPackage Cooled:SOP-28D/C:08+
Vendor:HOLTEKPackage Cooled:QFP-64D/C:08+
Vendor:HOLTEKPackage Cooled:MSOP-10D/C:08+
Vendor:HOLTEKPackage Cooled:MSOP-10D/C:08+
Vendor:HOLTEKPackage Cooled:MSOP-10D/C:08+
Vendor:N/APackage Cooled:N/AD/C:08+09+
The chip-erase mode can be initiated by a six-byte command sequence. After the command loading cycles, the device enters the internal chip erase mode, which is automatically timed and will be completed in 50 mS. The host system is not required to provide any control or timing during this operation.
Vendor:HOLTEKD/C:06+
Vendor:HTD/C:05+
bandwidth of the external bandpass filter that is placed between the mixer and the IF, and the external filter placed between the IF amplifier and limiter. Since the RSSI function requires the signal to propagate through the whole IF strip, and the rise and fall time of the filters are inversely proportional to their bandwidth, there is a trade-off between channel selectivity and RSSI response. A ...
Vendor:HTD/C:05+
bandwidth of the external bandpass filter that is placed between the mixer and the IF, and the external filter placed between the IF amplifier and limiter. Since the RSSI function requires the signal to propagate through the whole IF strip, and the rise and fall time of the filters are inversely proportional to their bandwidth, there is a trade-off between channel selectivity and RSSI response. A ...
The HT48R06A is a quad peripheral driver designed for use in automotive applications Logically it is an open collector NAND function with all inputs compatible with 74LS and CMOS series products An enable input is provided that is common to each driver When taken to a logic zero level all outputs will turn off Also overvoltage is detected The HT48R06A has features associated with the output struc- tur...
The HT48R06A is a quad peripheral driver designed for use in automotive applications Logically it is an open collector NAND function with all inputs compatible with 74LS and CMOS series products An enable input is provided that is common to each driver When taken to a logic zero level all outputs will turn off Also overvoltage is detected The HT48R06A has features associated with the output struc- tur...
Vendor:HT全新现货Package Cooled:DIP/18
I. Introduction In portable communication equipment, such as cellular phones and digital cordless phones, manufacturers are trying to replace as many discrete devices as possible with high-density ICs to be competitive in size, weight, power dissipation, and price. In a number of recent papers low power LNAs for S-band have been described [1,2,3]. These LNAs were fabricated using some sophisticated GaAs fu...
Vendor:HOLTEKPackage Cooled:DICED/C:08+
Vendor:HOLTEKPackage Cooled:16SSOP,TUBED/C:08+
Vendor:HOLTEKPackage Cooled:16DIP,TUBED/C:08+
Vendor:HOLTEKD/C:06+