Index "I"Vendor:IRD/C:0723
The UCC1800/1/2/3/4/5 family of high-speed, low-power integrated cir- cuits contain all of the control and drive components required for off-line and DC-to-DC fixed frequency current-mode switching power supplies with minimal parts count.
Vendor:IRD/C:0723
The UCC1800/1/2/3/4/5 family of high-speed, low-power integrated cir- cuits contain all of the control and drive components required for off-line and DC-to-DC fixed frequency current-mode switching power supplies with minimal parts count.
The DS2404 has four main data components: 1) 64-bit lasered ROM, 2) 256-bit scratchpad, 3) 4096-bit SRAM, and 4) timekeeping registers. The timekeeping section utilizes an on-chip oscillator that is connected to an external 32.768 kHz crystal. The SRAM and timekeeping registers reside in one contiguous address space referred to hereafter as memory. All data is read and written least significant bit first.
Vendor:IRPackage Cooled:TO-220
The IRF731P is a high performance SiGe HBT MMIC Amplifier. A Darlington configuration featuring 1 micron emitters provides high F T and excellent thermal perfomance. The heterojunction increases breakdown voltage and minimizes leakage current between junctions. Cancellation of emitter junction non-linearities results in higher suppression of intermodulation products. Only 2 DC-blocking capacitors, a bias resi...
Vendor:IR
The counter may be preset by the asynchronous parallel load capability of the circuit. Information present on the parallel data inputs (D0 to D3) is loaded into the counter and appears on the outputs (Q0 to Q3) regardless of the conditions of the clock inputs when the parallel load (PL) input is LOW. A HIGH level on the master reset (MR) input will disable the parallel load gates, override both cloc...
Vendor:IRPackage Cooled:SOP8D/C:0031+
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Vendor:IRPackage Cooled:SOP8D/C:0031+
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Vendor:S0P8Package Cooled:380D/C:IOR
Designed for industrial applications, the 6B Series modules incorporate transformer-based isolation with surface-mount manufacturing technology C providing increased reliability at low cost. The compact, rugged 6B Series analog modules can be mixed and matched on a 16-channel backplane for high density, remote process monitoring and control.
Vendor:S0P8Package Cooled:380D/C:IOR
Designed for industrial applications, the 6B Series modules incorporate transformer-based isolation with surface-mount manufacturing technology C providing increased reliability at low cost. The compact, rugged 6B Series analog modules can be mixed and matched on a 16-channel backplane for high density, remote process monitoring and control.
Vendor:IRPackage Cooled:SOP8D/C:08+
Bild / Fig. 7 Transienter innerer Wärmewiderstand Transient thermal impedance ZthJC = f(t), DC 1 - Beidseitige Khlung / Two-sided cooling 2 - Anodenseitige Khlung / Anode-sided cooling 3 - Kathodenseitige Khlung / Cathode-sided cooling
The IRF7322 is a 7.5-watt RF MOSFET Amplifier Module for 9.6-volt portable radios that operate in the 400- to 470-MHz range. The battery can be connected directly to the drain of the enhancement-mode MOSFET transistors. Without the gate voltage (V GG=0V), only a small leakage current flows into the drain and the RF input signal attenuates up to 60 dB. The output power and drain current increase as the g...
Vendor:IORPackage Cooled:08+D/C:15000
OBDIn (pin11) The OBD data is input to this pin, with a high logic level representing the active state of the OBD K line. No Schmitt trigger input is provided, so the OBD signal should be buffered to minimize transition times for the internal CMOS circuitry.
Vendor:IRPackage Cooled:SMD-8D/C:97+
Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Vendor:IRPackage Cooled:SMD-8D/C:97+
Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Vendor:IRPackage Cooled:SO8D/C:07+
DATA INPUTS/OUTPUTS: The I/O pins are used in the A/A Mux interface to input data and commands during write cycles and to output data during memory array, Status Register, and identifier code read cycles. Data is internally latched during a write cycle. The I/O pins will be in a high-impedance state when the outputs are disabled.
Vendor:IRPackage Cooled:SOP8D/C:08+
Any offset and/or gain calibration procedures should not be implemented until devices are fully warmed up. To avoid interaction, offset must be adjusted before gain. The ranges of adjustment for the circuit of Figure 2 are guaranteed to compensate for the ADS-929's initial accuracy errors and may not be able to compensate for additional system errors.
Vendor:IRPackage Cooled:SO8D/C:06+
The MK1491-06 requires some inexpensive external components for proper operation. Decoupling capacitors of 0.1µF should be connected on each VDD pin to ground, as close to the MK1491-06 as possible. A series termination resistor of 33Ω may be used for each clock output. See the discussion below for other external resistors required for proper I/O operation. The 14.3 MHz oscillator has int...
Vendor:IRPackage Cooled:SO8D/C:06+
The MK1491-06 requires some inexpensive external components for proper operation. Decoupling capacitors of 0.1µF should be connected on each VDD pin to ground, as close to the MK1491-06 as possible. A series termination resistor of 33Ω may be used for each clock output. See the discussion below for other external resistors required for proper I/O operation. The 14.3 MHz oscillator has int...
The AV34063 is a monolithic control circuit containing the primary functions required for DC-to-DC converters. This device consists of an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active current limit circuit,driver and high current output switch. This device was specifically designed to be incorporated in Step-Down and Step-Up and Voltage-invertin...
Vendor:IRPackage Cooled:SOP8D/C:08+
Low Frequency Vibration: Vibration shall consist of simple harmonic motion having an amplitude of 0.03" [0.76mm] and a maximum total excursion of 0.06" [1.52mm], in a direction perpendicular to the major axis of he capacitors.
Vendor:IRPackage Cooled:SOP8D/C:08+
Stresses in excess of the absolute maximum ratings can cause permanent damage to the devices. These are absolute stress ratings only. Functional operation of the devices is not implied at these or any other conditions in excess of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability.
Vendor:IRPackage Cooled:SOP8D/C:08+
Stresses in excess of the absolute maximum ratings can cause permanent damage to the devices. These are absolute stress ratings only. Functional operation of the devices is not implied at these or any other conditions in excess of those given in the operations sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability.
Vendor:IRPackage Cooled:SO8D/C:0727+
HALF Input/Output: this is an input in NT mode and an output in TE mode identifying which half of the S-interface frame is currently being written/read over the ST-BUS (HALF = 0 sampled on the falling edge of C4b within the frame pulse low window, identifies the information to be transmitted/received in the first half of the S-Bus frame while HALF=1 identifies the information to be transmitted/received into t...
Vendor:IORPackage Cooled:08+D/C:15000
Interface), which includes support of legacy and ACPI power management through SMI or SCI function pins. One 24-bit power management timer is implemented with carry notify interrupt. W83877ATF also has auto power management to reduce power consumption.
Vendor:IRPackage Cooled:SOP-8
BZX83C 2V7 BZX83C 3V0 BZX83C 3V3 BZX83C 3V6 BZX83C 3V9 BZX83C 4V3 BZX83C 4V7 BZX83C 5V1 BZX83C 5V6 BZX83C 6V2 BZX83C 6V8 BZX83C 7V5 BZX83C 8V2 BZX83C 9V1 BZX83C 10 BZX83C 11 BZX83C 12 BZX83C 13 BZX83C 15 BZX83C 16 BZX83C 18 BZX83C 20 BZX83C 22 BZX83C 24 BZX83C 27
Vendor:IRPackage Cooled:SOP-8
BZX83C 2V7 BZX83C 3V0 BZX83C 3V3 BZX83C 3V6 BZX83C 3V9 BZX83C 4V3 BZX83C 4V7 BZX83C 5V1 BZX83C 5V6 BZX83C 6V2 BZX83C 6V8 BZX83C 7V5 BZX83C 8V2 BZX83C 9V1 BZX83C 10 BZX83C 11 BZX83C 12 BZX83C 13 BZX83C 15 BZX83C 16 BZX83C 18 BZX83C 20 BZX83C 22 BZX83C 24 BZX83C 27
Vendor:INTERNATIONAL RECTIFIERD/C:05+
Supports up to 400 MBps sustained Fibre Channel data transfer rate Supports SCSI initiator, initiator/target, and target modes On-board, enhanced RISC processor On-board 2-Gb serial transceivers Automatically negotiates the Fibre Channel bit rate (1 or 2 Gb) Supports PCI dual-address cycle and cache commands No host intervention required to execute complete SCSI, IP, or VI operations Supports ...
Vendor:INTERNATIONAL RECTIFIERD/C:05+
Supports up to 400 MBps sustained Fibre Channel data transfer rate Supports SCSI initiator, initiator/target, and target modes On-board, enhanced RISC processor On-board 2-Gb serial transceivers Automatically negotiates the Fibre Channel bit rate (1 or 2 Gb) Supports PCI dual-address cycle and cache commands No host intervention required to execute complete SCSI, IP, or VI operations Supports ...
Vendor:IRPackage Cooled:TO-220
DC PERFORMANCE(5) Open-Loop Transimpedance Gain Input Offset Voltage Average Offset Voltage Drift Non-Inverting Input Bias Current Average Non-Inverting Input Bias Current Drift Inverting Input Bias Current Average Inverting Input Bias Current Drift
Vendor:IRPackage Cooled:TO-220
matching resistors. In CMI mode the transmitter shapes the transmit pulses to meet the appropriate template and the adaptive equalizer corrects the received signal for dispersive attenuation. The ECLOUTP and ECLOUTN pins are inoperative and should be left open.
Vendor:IR
The EL4583 sync slice level is set to the mid-point between sync tip and the blanking level. This 50% point is determined by two internal sample and hold circuits that track sync tip and back porch levels. It provides hum and noise rejection and compensates for input levels of 0.5V to 2.0VP-P.
Vendor:IR
The EL4583 sync slice level is set to the mid-point between sync tip and the blanking level. This 50% point is determined by two internal sample and hold circuits that track sync tip and back porch levels. It provides hum and noise rejection and compensates for input levels of 0.5V to 2.0VP-P.
The wide supply range combined with total harmonic distortion as low as -66 dBc at 10 MHz, in addition, to the high slew rate of 5700 V/µs makes the IRF733/6 ideally suited for high-voltage arbitrary waveform driver applications. Moreover, having the ability to handle large voltage swings driving into high-resistance and high-capacitance loads while maintaining good settling time performance ma...
Vendor:IORD/C:05+
The C6701 includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory consists of two 32K-byte blocks of RAM. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glu...
Vendor:IRPackage Cooled:2,660
Interrupt. This open drain weak pullup, output signal is used to inform the processor that a detect flag has occurred. The processor must then read the detect register to determine which detect triggered the interrupt. INT will stay active until the processor reads the detect register or does a full reset.
Vendor:IRPackage Cooled:SMD-8D/C:97+
The internally switched supply voltage, VINT (ei- ther VCC input or VBAT input) is continuously mon- itored. If VINT should exceed the over voltage trip point, VHV (set at 4.2V, typical), or should go below the under voltage trip point, VLV (set at 2.0v, typi- cal). SAL will be driven active-low. Once the tamper condition no longer exists, the SAL pin will return to its normal High state. When no ta...
Vendor:IRPackage Cooled:SOPD/C:2000
A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its saturation region, which switches the output into a constant current mode...
Vendor:IRPackage Cooled:SOPD/C:2000
A sense FET monitors the current supplied to the load. The sense FET measures current more efficiently than conventional resistance methods. When an overload or short circuit is encountered, the current-sense circuitry sends a control signal to the driver. The driver in turn reduces the gate voltage and drives the power FET into its saturation region, which switches the output into a constant current mode...
Vendor:IRD/C:2
Vendor:IORPackage Cooled:08+D/C:15000
The system clock inputs. All address and command lines are sampled on the cross point of the rising edge of CK and falling edge of CK . A Delay Locked Loop (DLL) circuit is driven from the clock input and output timing for read operations is syn- chronized to the input clock.
Vendor:IRPackage Cooled:SOP-14D/C:07+08+
Tracing the path from VH to Z illustrates the effect of the clamp voltage on the high impedance node. VH decreases by 2VBE (QN6 and QP6) to set up the base voltage on QP5. QP5 begins to conduct whenever the high impedance node reaches a voltage equal to QP5s base + 2VBE (QP5 and QN5). Thus, QP5 clamps node Z whenever Z reaches VH. R1 provides a pull-up network to ensure functionality with
Vendor:IORPackage Cooled:SMD-8
NOTES: (1) 2.0ms, pulse width, f=1.0 KHZ (2) Pulse test: 300ms pulse width, 1% duty cycle (3) Thermal resistance from junction to case and/or thermal resistance from junction to ambient (4) Clip mounting (on case), where lead does not overlap heatsink with 0.110Ó offset. (5) Clip mounting (on case), where leads do overlap heatsink. (6) Screw mounting with 4-40 screw, where washer diameter is &poun...
Vendor:IORPackage Cooled:SOP-8PD/C:02+
Each device includes on a single silicon chip a voltage regulator, qua- dratic Hall-voltage generator, temperature compensation circuit, signal amplifier, Schmitt trigger, and a buffered open-collector output to sink up to 25 mA. The on-board regulator permits operation with supply voltages of 3.8 to 24 volts.
Vendor:INTERNATIONAL RECTIFIERD/C:05+
The CY7B993V and CY7B994V High-speed Multi-phase PLL Clock Buffers offer user-selectable control over system clock functions. This multiple-output clock driver provides the system integrator with functions necessary to optimize the timing of high-performance computer and communication systems.
Vendor:IRPackage Cooled:SOP8D/C:07+08+
Low offset voltage: 65 µV max Single-supply operation: 2.7 V to 5.5 V Low noise: 8 nV/Hz Wide bandwidth: >20 MHz Slew rate: 12 V/µs High output current: 150 mA No phase reversal Low input bias current: 1 pA Low supply current: 2 mA Unity gain stable
Vendor:SOPPackage Cooled:804D/C:IR
The GTL16923 devices are 18-bit registered bus transceivers that provide LVTTL-to-GTL/GTL+ and GTL/GTL+-to-LVTTL signal-level translation. They are partitioned as two 9-bit transceivers with individual output-enable controls and contain D-type flip-flops for temporary storage of data flowing in either direction. The devices provide an interface between cards operating at LVTTL logic levels and a backplane...
Vendor:IRPackage Cooled:TO-220
The circuit functionality is guaranteed within operation of ambient temperature range, as long as it is within operation supply voltage range. The standard electrical characteristic values are guaranteed at the test circuit voltage of Vcc=5V. The cannot be guaranteed at other voltages in the operating range of 3.0V~16.0V, homever, the variation will be small.
Vendor:IRPackage Cooled:TO-220
The PWM signal is the control input for the driver. The PWM signal can enter three distinct states during operation, see the three-state PWM Input section under DESCRIPTION for further details. Connect this pin to the PWM output of the controller.
Vendor:IR
These versatile devices are useful for driving a wide range of loads including solenoids, relays DC mo- tors, LED displays filament lamps, thermal print- heads and high power buffers. The ULQ2001A/2002A/2003A and 2004A are sup- plied in 16 pin plastic DIP packages with a copper leadframe to reduce thermal resistance. They are available also in small outline package (SO-16) as ULQ2001D1/2002D1/2003D1...
The SG7900A/SG7900 series of negative regulators offer self-contained, fixed-voltage capability with up to 1.5A of load current. With a variety of output voltages and four package options this regulator series is an optimum complement to the SG7800A/SG7800, SG140 line of three terminal regulators.
Vendor:IORPackage Cooled:SOP-8
These unconditionally stable amplifiers provide 18 dB of gain and 18.4 dBm of 1dB compressed power and require only a single positive voltage supply. Only 2 DC-blocking capacitors, a bias resistor and an optional inductor are needed for operation. This MMIC is an ideal choice for wireless applications such as cellular, PCS, CDPD, wireless data and SONET.
Vendor:IRPackage Cooled:SOP8D/C:08+
Each device includes a voltage regulator, two Hall transducers, temperature com- pensating circuitry, a low-level amplifier, bandpass filter, Schmitt trigger, and an output driver. The on-board regulator permits operation with supply voltages from 4.0 to 26.5 V. The output stage can switch 20 mA over the full frequency response range of the sensor, and is compatible with TTL and CMOS logic circ...
Vendor:IRPackage Cooled:SOP-8D/C:07+
Automatic test equipment High speed instrumentation Scope and logic analyzer front ends Window comparators High speed line receivers Threshold detection Peak detection High speed triggers Patient diagnostics Disk drive read channel detection Hand-held test instruments Zero-crossing detectors Line receivers and signal restoration Clock drivers
Vendor:IRPackage Cooled:SOP8D/C:06+
n Mask optional for built-in RC oscillator with an external resistor or external ceramic resonator applied n Mask optional for DATA/CLK driving capability n Watch-dog timer n Built-in power-on reset n Built-in low voltage reset n CMOS technology for low power consumption n Available in 40 pin DIP package and 40 pad CHIP FORM
Vendor:IORPackage Cooled:08+D/C:15000
The transient response of the circuit is enhanced by allowing a much faster charge/discharge of the voltage amplifier output capacitance when the output voltage falls outside a certain regulation window. A number of additional features such as UVLO circuit with selectable hysteresis levels, an accurate reference voltage for the voltage amplifier, zero power detect, OVP/enable, peak current limit, power li...
Vendor:IORPackage Cooled:08+D/C:15000
The transient response of the circuit is enhanced by allowing a much faster charge/discharge of the voltage amplifier output capacitance when the output voltage falls outside a certain regulation window. A number of additional features such as UVLO circuit with selectable hysteresis levels, an accurate reference voltage for the voltage amplifier, zero power detect, OVP/enable, peak current limit, power li...
Vendor:IRPackage Cooled:SOP8D/C:08+
Number of channels: 2 Conforms to CAN Specification Version 2.0 Part A and B Automatic re-transmission in case of error Automatic transmission responding to Remote Frame Prioritized 16 message buffers for data and IDs Supports multiple messages Flexible configuration of acceptance filtering: Full bit compare / Full bit mask / Two partial bit masks Supports up to 1Mbps CAN bit timing setting: MB...
Charge termination methods include: Voltage slope (+∆V/dt and +/- peak detect), and Fast charge time out to maintenance mode Four stage charge sequence: SoftStart conditioning, Fast charge, Topping charge, and Maintenance charge Three (3) user selectable charge rates: 15 minutes (4C), 60 minutes (1C), 150 minutes (C/2.5) Continuous polling mode for battery detection Adjustable open circuit (no batt...
Vendor:IRPackage Cooled:N/AD/C:08+
Vendor:IRPackage Cooled:SOP8D/C:07+08+
The DMS-EB-AC/DC board includes provisions for installing several user- supplied components that are required when the meter must be scaled to display non-standard input ranges. The DMS-EB-AC/DC has provisions for such common applications as attenuation of high input voltages, gain (span) and offset (zero) adjustments, and direct decimal point placement. The DMS-EB-AC/DC is compat- ible with all four input ...
Vendor:IRPackage Cooled:SOP8D/C:07+08+
The DMS-EB-AC/DC board includes provisions for installing several user- supplied components that are required when the meter must be scaled to display non-standard input ranges. The DMS-EB-AC/DC has provisions for such common applications as attenuation of high input voltages, gain (span) and offset (zero) adjustments, and direct decimal point placement. The DMS-EB-AC/DC is compat- ible with all four input ...
Vendor:IRPackage Cooled:SO8D/C:06+
To be able to use a wide frequency range for the VCOs (i.e., VCO2 26.3 MHz to 49.9 MHz) the two internal VCOs (VCO1 and VCO2, i.e., the VCOs of the transmit part) have a rough adjust and a fine adjust to increase the frequency range given by the phase comparator.
Vendor:IRPackage Cooled:SO8D/C:06+
To be able to use a wide frequency range for the VCOs (i.e., VCO2 26.3 MHz to 49.9 MHz) the two internal VCOs (VCO1 and VCO2, i.e., the VCOs of the transmit part) have a rough adjust and a fine adjust to increase the frequency range given by the phase comparator.
Vendor:IRPackage Cooled:SOP8D/C:09+
Read-Write-Control The choice between Read or Write cycle is made at the W input. HIGH at the W input causes a Read cycle, meanwhile LOW leads to a Write cycle. Both CAS-controlled and W-control- led Write cycles are possible with activated RAS signal.
Vendor:VISHAY
Frequency Mode Select. This three-level input selects the frequency range for the clock and data recovery Receive PLL and the frequency multiplier Transmit PLL. When this input is held HIGH the two PLLs operate at the SONET (SDH) STS-3 (STM-1) line rate of 155.52 MHz. When this input is held LOW the two PLLs operate at the SONET STS-1 line rate of 51.84 MHz. The REFCLK frequency in both operating modes is...
Vendor:IORPackage Cooled:08+D/C:15000
The number formed by the empty offset least significant bit register and empty offset most significant bit register is referred to as n and determines the operation of PAE. PAF is synchronized to the LOW-to-HIGH transition of RCLK by one flip-flop and is LOW when the FIFO contains n or fewer unread words. PAE is set HIGH by the LOW-to-HIGH transition of RCLK when the FIFO contains (n+1) or greater unre...
Vendor:IORPackage Cooled:08+D/C:15000
The number formed by the empty offset least significant bit register and empty offset most significant bit register is referred to as n and determines the operation of PAE. PAF is synchronized to the LOW-to-HIGH transition of RCLK by one flip-flop and is LOW when the FIFO contains n or fewer unread words. PAE is set HIGH by the LOW-to-HIGH transition of RCLK when the FIFO contains (n+1) or greater unre...
Vendor:IRPackage Cooled:SOP8D/C:08+
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies.
Vendor:1000Package Cooled:IRD/C:SOP-8
ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBS...
Vendor:IORPackage Cooled:SOP-8
NOTES: 1. See Test Conditions under TEST CIRCUITS AND WAVEFORMS. 2. This parameter is guaranteed but not production tested. 3. The bus switch contributes no propagation delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.2ns at CL = 50pF. Since this time constant is much smaller than the rise and fall times ...
Vendor:IRPackage Cooled:SOP8D/C:08+
The comparator draws a current (ISET), whose magnitude is 45µA. The set resistor is selected to set the current limit for the application. When the sensed voltage across the RDS(ON) plus the set resistor exceeds the 400mV VTRIP threshold, the OCP comparator outputs a signal to reset the PWM latch and to start hiccup mode. The soft-start capacitor (CSS) is discharged slowly (10 times slower than ...
Vendor:IRPackage Cooled:06+D/C:SO-8
The LTC®3733 family are PolyPhase® synchronous step- down switching regulator controllers that drive all N-channel external power MOSFET stages in a phase- lockable, fixed frequency architecture. The 3-phase con- troller drives its output stages with 120 phase separation at frequencies of up to 530kHz per phase to minimize the RMS current dissipated by the ESR of both the input and output filter capa...
Vendor:INTERNATIONAL RECTIFIERD/C:05+
The accelerated program (ACC) feature allows the system to program the device at a much faster rate. When ACC is pulled high to VHH, the device enters the Unlock Bypass mode, enabling the user to reduce the time needed to do the program operation. This feature is intended to increase factory throughput during sys- tem production, but may also be used in the field if de- sired.
Vendor:IORPackage Cooled:08+D/C:15000
Absolute maximum ratings are limiting values (referenced to GND = 0V), to be applied individually, while other parameters are within specified operating conditions. Long exposure to maximum rating may affect device reliability. The use of a thermal heat sink is mandatory. See The board set comes fully assembled and tested, with the TS8388B installed. on page 42.
Package Cooled:SOP8D/C:99+
The Absolute Maximum Operating Frequency specification, tabulated in Table 1, determines the highest frequency of the delay line input signal that can be reproduced, shifted in time at the device output, with acceptable duty cycle distortion.
Package Cooled:SOP8D/C:99+
The Absolute Maximum Operating Frequency specification, tabulated in Table 1, determines the highest frequency of the delay line input signal that can be reproduced, shifted in time at the device output, with acceptable duty cycle distortion.
Vendor:IRD/C:2005
1. To avoid drawing VCC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VCC current will flow out of terminals Yn. In this case there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed VCC or VEE.
Vendor:IRD/C:06+
• 22 I/O pins with individual direction control • High current sink/source for direct LED drive • TMR0: 8-bit timer/counter with 8-bit programmable prescaler • 16-bit A/D timer: can be used as a general purpose timer • I2C serial port compatible with System Management Bus
Vendor:IRD/C:06+
• 22 I/O pins with individual direction control • High current sink/source for direct LED drive • TMR0: 8-bit timer/counter with 8-bit programmable prescaler • 16-bit A/D timer: can be used as a general purpose timer • I2C serial port compatible with System Management Bus
Vendor:IORPackage Cooled:08+D/C:15000
The XC6203E series are highly precise, low power consumption, positive voltage regulators manufactured using CMOS and laser trimming technologies. The series provides large currents with a significantly small dropout voltage. The XC6203E consists of a driver transistor, a precision reference voltage and an error amplifier. Output voltage is selectable in 0.1V steps between a voltage of 1.8V and 6.0V. ...
Vendor:IORPackage Cooled:08+D/C:15000
The XC6203E series are highly precise, low power consumption, positive voltage regulators manufactured using CMOS and laser trimming technologies. The series provides large currents with a significantly small dropout voltage. The XC6203E consists of a driver transistor, a precision reference voltage and an error amplifier. Output voltage is selectable in 0.1V steps between a voltage of 1.8V and 6.0V. ...
Vendor:IORD/C:05+
Now microcomputers are widely used for microwave ovens, air conditioners, cars, toys, timers, and other alarm equipment. Externally driven piezoelectric sounders are used in digital watches, electronic calculators, telephones and other equipment. They are driven by a signal (ex: 2048Hz or 4096Hz) from an LSI and provide melodious sound.
Vendor:IRD/C:06+
API8208A is a high quality voice synthesizer capable of varying playback duration. A proprietary ADPCM algorithm is used. The audio message is stored in a 512K bits on-chip EPROM which can store up to 20 seconds of voice data at 6 KHz sample rate.
Vendor:IRD/C:06+
API8208A is a high quality voice synthesizer capable of varying playback duration. A proprietary ADPCM algorithm is used. The audio message is stored in a 512K bits on-chip EPROM which can store up to 20 seconds of voice data at 6 KHz sample rate.
Vendor:IRPackage Cooled:SOP8D/C:07+08+
Information at the data (D) inputs meeting the setup-time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock (CLK) input is at either the high or low level, the D-input signal has no effect at the output.
Vendor:IRPackage Cooled:SOP8D/C:08+
Available in standoff voltage range of 6.5 to 200 V Low capacitance of 100 pF or less Molding compound flammability rating: UL94V-O Two different terminations available in C-bend (modified J- Bend with DO-214AB) or Gull-wing (DO-215AB) • Options for screening in accordance with MIL-PRF-19500 for JAN, JANTX, JANTXV, and JANS are available by adding MQ, MX, MV, or MSP prefixes respectively...
Serial Clock (SCK) - This pin is used to synchronize the communication between the microcontroller and the IS25C64, IS25C32. Op-codes, byte addresses, or data present on the SI pin and latched on the rising edge of the SCK. Data on the SO pin is updated on the falling edge of the SCK for SPI modes (0,0 & 1,1).
Vendor:IRPackage Cooled:SO8D/C:06+
The ADSP-BF535 Blackfin processor is a highly integrated system-on-a-chip solution for the next generation of digital com- munication and portable Internet appliances. By combining industry-standard interfaces with a high performance signal processing core, users can develop cost-effective solutions quickly without the need for costly external components. The ADSP-BF535 Blackfin processor system periph...
Vendor:IORPackage Cooled:08+D/C:12500
(TA = 25˚C, VS = 5V, RL = 100Ω Typical unless specified). n 420MHz, −3dB bandwidth (AV = 10) n 2nV/input voltage noise n 1.8pA/input current noise n 100µV input offset voltage n 300V/µs slew rate n 16mA supply current n 18ns settling time
Vendor:IORPackage Cooled:08+D/C:12500
(TA = 25˚C, VS = 5V, RL = 100Ω Typical unless specified). n 420MHz, −3dB bandwidth (AV = 10) n 2nV/input voltage noise n 1.8pA/input current noise n 100µV input offset voltage n 300V/µs slew rate n 16mA supply current n 18ns settling time
Vendor:IRPackage Cooled:SOP8D/C:08+
Manual Reset. Active low. Pulling this pin low forces a reset. After a low to high transition reset remains asserted for exactly one reset timeout period. This pin is internally pulled high. If this function is unused then float this pin or tie it to VDD .
Vendor:IORPackage Cooled:SOP-8
The Raytheon RM3183 line receiver is the companion chip to the RM3182 line driver. Together they provide all the analog functions needed for the ARINC 429 interface. Digital data processing involving serial-to-parallel conver- sion and clock recovery can be accomplished using one of the ARINC interface ICs available or by discrete or gate array implementations.
Vendor:IRPackage Cooled:SO8D/C:06+
An input capacitor of 1.0 µF (min) should be connected from VIN to GND if there is more than 10 inches of wire between the regulator and the AC filter capacitor, or if a battery is operated as the power source. The capacitor should be less than 1 cm from the input pin.
Vendor:IORD/C:07+
This document is a general product description and is subject to change without notice. Hynix Semiconductor Inc not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.10/Jan. 2002Hynix Semiconductor
Vendor:IRPackage Cooled:SOP-8D/C:02+
This 64kbit memory array can be partitioned into pass- word protected or non-password protected areas. When password protected, the contents are readable after sending a Memory Read password. The contents of a password protected portion of the memory array are writeable with a Memory Write Password. This array is re-writable up to the limit of the EEPROM endurance.