Index "I"Vendor:INTERSILPackage Cooled:SSOPD/C:0627/PB
The Z86LXX family of IR (Infrared) CCP™ (Consumer Con- troller Processor) Controllers are ROM/ROMless-based members of the Z8® single-chip microcontroller family with 256 bytes of internal RAM. The differentiating factor be- tween these devices is the availability of ROM, and pack- age options. For the 40 and 44-pin devices the use of ex- ternal memory enables these Z8 microcontrollers to be ...
Vendor:IntersilPackage Cooled:Original
1. Package is non-polarized. Parts may be on reel in orientation illustrated, 180 rotated, or mixed (both ways). 2. If lead-bearing terminal plating is required, please contact your Diodes Inc. sales representative for availability and minimum order details. 3. Mounted on FR4 Board with recommended pad layout at http://www.diodes.com/datasheets/ap02001.pdf.
Vendor:INTERSILPackage Cooled:TSSOP28D/C:02+
The detector is a monolithic IC which consists of two narrow adjacent photodiodes, amplifiers, and Schmitt trigger output stages. The outputs are NPN collectors with internal 10 k (nominal) pull-up resistors to VÙÙ which are capable of directly driving TTL loads. The IC design incorporates circuitry to compensate the sensitivity for the output power vs. temperature characteristic of the ...
Vendor:INTELSILPackage Cooled:SOPD/C:06+
Switch Enable into Heavy Load If a switch is powered-on or enabled into a heavy load or short-circuit, the switch immediately goes into a constant-current mode, reducing output voltage. The fault flag goes low until the load is reduced or thermal shutdown occurs.
The new Smart 3 Advanced Boot Block, manufactured on Intels latest 0.4µ technology, represents a feature- rich solution at overall lower system cost. Smart 3 flash memory devices incorporate low voltage capability (2.7V read, program and erase) with high-speed, low-power operation. Several new features have been added, including the ability to drive the I/O at 1.8V, which significantly reduces syste...
Vendor:INTERSILPackage Cooled:TSSOP28D/C:02+
Compact Package with J−Bend Leads Ideal for Automated Handling Highly Stable Oxide Passivated Junction Guardring for Over−Voltage Protection Low Forward Voltage Drop Pb−Free Package May be Available. The G−Suffix Denotes a Pb−Free Lead Finish
Vendor:HASPackage Cooled:SOPD/C:07/08+
Hynix HYMD232646A(L)8-M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.
Vendor:IntersilPackage Cooled:Original
Vendor:INTERSILPackage Cooled:1000D/C:03+
To program the offset values, PEN can be brought low after reset. On the following low-to-high transition of LDCK, the binary value on D0CD7 is stored as the almost-empty offset value (X) and the almost-full offset value (Y). Holding PEN low for another low-to-high transition of LDCK reprograms Y to the binary value on D0CD7 at the time of the second LDCK low-to-high transition. Writes to the FIFO memory ...
Vendor:INTERSILPackage Cooled:1000D/C:03+
To program the offset values, PEN can be brought low after reset. On the following low-to-high transition of LDCK, the binary value on D0CD7 is stored as the almost-empty offset value (X) and the almost-full offset value (Y). Holding PEN low for another low-to-high transition of LDCK reprograms Y to the binary value on D0CD7 at the time of the second LDCK low-to-high transition. Writes to the FIFO memory ...
The IS41LV32256 is compatible with JEDEC standard SGRAMs. This 8-Mbit EDO memory offers a significantly lower latency and a faster memory cycle than the SGRAM. ISSI's IS41LV32256 3.3V 256K x 32 device is pin/voltage compatible with all standard SGRAM parts.
The IS41LV32256 is compatible with JEDEC standard SGRAMs. This 8-Mbit EDO memory offers a significantly lower latency and a faster memory cycle than the SGRAM. ISSI's IS41LV32256 3.3V 256K x 32 device is pin/voltage compatible with all standard SGRAM parts.
Vendor:INTERSLPackage Cooled:SSOPD/C:06+
The passive bias circuits used in these designs include a dropping resistor in the collector bias line and a voltage divider from collector-to-base. Using this scheme the amplifier can be biased from a single supply voltage. The collector-dropping resistor is sized to drop 2-3V depending on the desired VCE . The voltage divider from collector-to-base, in conjunction with the dropping resistor, will stabiliz...
Vendor:IntersilPackage Cooled:Original
Four (391), Eight (389) or Sixteen (387) Line Drivers Meet or Exceed the Requirements of ANSI EIA / TIA-644 Standard Designed for Signaling Rates† up to 630 Mbps With Very Low Radiation (EMI) Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and a 100-Ω Load Propagation Delay Times Less Than 2.9 ns Output Skew Is Less Than 150 ps Part-to-Part Skew Is Less Than 1.5 ns 3...
Vendor:IntersilPackage Cooled:Original
Four (391), Eight (389) or Sixteen (387) Line Drivers Meet or Exceed the Requirements of ANSI EIA / TIA-644 Standard Designed for Signaling Rates† up to 630 Mbps With Very Low Radiation (EMI) Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and a 100-Ω Load Propagation Delay Times Less Than 2.9 ns Output Skew Is Less Than 150 ps Part-to-Part Skew Is Less Than 1.5 ns 3...
4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the conditions specified as follows for JAN, JANTX, and JANTXV group B testing herein. Electrical measurements (end-points) and delta requirements for JAN, JANTX, and JANTXV shall be after each following step and shall be in accordance with group A, subgroup 2 and 4.5.2 herein.
FAST data sheets carry several types of AC information. The AC Characteristics table contains the guaranteed limits when tested under the conditions set forth under the AC Test Circuits and Waveforms. In some cases, the test conditions are further defined by the AC Setup Conditions this is generally the case with counters and flip-flops where setup and hold times are involved. All of the AC Characteri...
Vendor:INTERSILPackage Cooled:TSSOP28D/C:02+
Vendor:INTERSILPackage Cooled:SSOP
A memory cycle is initiated by bring RAS LOW and it is terminated by returning both RAS and CAS HIGH. To ensures proper device operation and data integrity any memory cycle, once initiated, must not be ended or aborted before the minimum tRAS time has expired. A new cycle must not be initiated until the minimum precharge time tRP, tCP has elapsed.
Vendor:INTERSILPackage Cooled:SSOP
A memory cycle is initiated by bring RAS LOW and it is terminated by returning both RAS and CAS HIGH. To ensures proper device operation and data integrity any memory cycle, once initiated, must not be ended or aborted before the minimum tRAS time has expired. A new cycle must not be initiated until the minimum precharge time tRP, tCP has elapsed.
Vendor:INTERSILPackage Cooled:SSOP-20D/C:01+
All devices also available in tray quatities. For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or refer to our web site at www.ti.com. (2) Models with a (/) are available only in Tape and Reel in the quantities indicated (for example, /700 indicates 700 devices per reel). Ordering 700 pieces of DCP010505BP−U/700 will get a single...
Vendor:INTERSILPackage Cooled:SSOP-20D/C:01+
All devices also available in tray quatities. For the most current package and ordering information, see the Package Option Addendum at the end of this data sheet, or refer to our web site at www.ti.com. (2) Models with a (/) are available only in Tape and Reel in the quantities indicated (for example, /700 indicates 700 devices per reel). Ordering 700 pieces of DCP010505BP−U/700 will get a single...
Vendor:SOPD/C:00+
and PCN system , receive path Usable passband: Filter 1 (EGSM): 35 MHz Filter 2 (PCN):75 MHz Unbalanced to balanced operation of both filters Impedance transformation from 50 Ω to 150 Ω for both filters Suitable for GPRS Class 1 to 12 Ceramic package for Surface Mounted Technology (SMT)
The impedance for the reflecting frequency range of each filter toward the ports 1 and 6 should be as high as possible. In the simplest case a series- and a parallel- resonator circuit will meet these requirements but also others as appropriate drop in filters or micro stripline elements can be used. The two branches with filters should meet immediately at the package leads of the port 1 and 6. Parasiti...
D/C:05+
1. H = HIGH voltage level L = LOW voltage level X = dont care Z = high impedance OFF-state NC= no change = LOW-to-HIGH CP transition = HIGH-to-LOW CP transition Q6 = the information in the seventh register stage is transferred to the 8th register stage and QSn output at the positive clock edge
Vendor:ICTPackage Cooled:SMD-8D/C:02+
Hynix HYMD564M646(L)6-K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous oper- ations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipe...
Vendor:ICTPackage Cooled:SMD-8D/C:02+
Hynix HYMD564M646(L)6-K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous oper- ations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipe...
Vendor:INSTERSILD/C:00
*Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.
Vendor:INSTERSILD/C:00
*Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground.
Vendor:N/APackage Cooled:N/AD/C:N/A
To streamline development time, JTAG-compliant scan-based emulation has been integrated into all devices. This provides non-intrusive real-time capabilities required to debug digital control systems. A complete suite of code-generation tools from C compilers to the industry-standard Code Composer Studio debugger supports this family. Numerous third-party developers not only offer device-level devel...
Vendor:N/APackage Cooled:N/AD/C:N/A
To streamline development time, JTAG-compliant scan-based emulation has been integrated into all devices. This provides non-intrusive real-time capabilities required to debug digital control systems. A complete suite of code-generation tools from C compilers to the industry-standard Code Composer Studio debugger supports this family. Numerous third-party developers not only offer device-level devel...
Vendor:.Package Cooled:2005D/C:500
Vendor:DIPPackage Cooled:28D/C:TOKIN
Soft-Start The IRU3137 has a programmable soft-start to control the output voltage rise and limit the current surge at the start-up. To ensure correct start-up, the soft-start se- quence initiates when the Vc and Vcc rise above their threshold (3.5V and 4.25V respectively) and generates the Power On Reset (POR) signal. Soft-start function operates by sourcing an internal current to charge an external capaci...
• High-speed access time: 8, 10, and 12 ns • CMOS low power operation • Low stand-by power: Less than 5 mA (typ.) CMOS stand-by • TTL compatible interface levels • Single 3.3V power supply • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Industrial temperature availab...
Vendor:HAIRRISPackage Cooled:SOP8
Read cycle time Address access time Byte control 1 access time Byte control 2 access time Chip select access time Output enable access time Output disable time after BC1 high Output disable time after BC2 high Output disable time after CS low Output disable time after OE high Output enable time after BC1 low Output enable time after BC2 low Output enable time after CS high Output enable t...
(prescaler OFF) Input sensitivity fi = 80 - 1000 MHzPSC = 1Pin 13 fi = 1300 MHzPSC = 1Pin 13 fi = 10 - 170 MHzPSC = 0Pin 13 Port outputsP0C4Pins 6C9, 11 (open collector) Leakage currentVH = 13.5 V Saturation voltageIL = 10 mA Charge pump output (PD) Charge pump current H5I = 1, VPD = 2 VPin 1 Charge pump current L5I = 0, VPD = 2 VPin 1 Charge pump leakageT0 = 0, VPD = 2 V Pin 1 current Charge pump ...
Vendor:HARRISPackage Cooled:DIP
Vendor:HPackage Cooled:SMD
This family is a 16M bit dynamic RAM organized 2,097,152 x 8-bit configuration with Extended Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode which is useful for the read operation. The circuit and process design allow this device to achieve high performance and low power dissipation. Optional features are access time(60, 70 or 80ns) and refresh cycle(2K ref. or 4K ref.) and power consu...
Designed utilizing CMOS process technology, the FAN2500/01 family of products are carefully optimized for use in compact battery-powered devices, offering a unique combination of low power consumption, extremely low dropout voltages, high tolerance for a variety of output capacitors, and the ability to disable the output to less than 1µA under user control. In the circuit, a difference ampliʂ...
Designed utilizing CMOS process technology, the FAN2500/01 family of products are carefully optimized for use in compact battery-powered devices, offering a unique combination of low power consumption, extremely low dropout voltages, high tolerance for a variety of output capacitors, and the ability to disable the output to less than 1µA under user control. In the circuit, a difference ampliʂ...
Vendor:INTERSILPackage Cooled:SOP-8D/C:03+
Vendor:HAIRRISPackage Cooled:SOP8
Member of the Texas Instruments Widebus Family Operates at 2.3 V to 2.7 V for PC1600, PC2100, and PC2700; 2.5 V to 2.7 V for PC3200 Pinout and Functionality Compatible With JEDEC Standard SSTV32852 Pinout Optimizes 1U DDR DIMM Layout 600 ps Faster (Simultaneous Switching) Than the JEDEC Standard SSTV32852 in PC2700 DIMM Applications 1-to-2 Outputs Support Stacked DDR DIMMs One Device Per DIMM R...
*Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratin...
Vendor:INTERSILPackage Cooled:PLCC-28
Vendor:HARRISPackage Cooled:SOP8
Data Output Bit 10 Data Output Bit9 Data Output Bit 8 Data Output Bit 7 Data Output Bit 6 Data Output Bit 5 Data Output Bit 4 Data Output Bit 3 Data Output Bit 2 Data Output Bit 1 Data Output Bit 0 Analog Power Supply Analog Power Supply Analog Ground (Substrate) Red Positive Analog Input
Vendor:HAIRRISPackage Cooled:SOP8
Vendor:HAIRRISPackage Cooled:SOP8
FFeatures 1) Inclined toward the printing surface to provide excellent printing quality even for cards and thick paper. 2) Prints directly on printing medium that cannot be bent. 3) Using a hard conductive film as a protective film on the heating element of- fers excellent resistance to electrostatic damage. 4) Being low-profile when installed enables smaller printers.
Vendor:INTERSILPackage Cooled:1024D/C:03+
Left channel headphone input, selected when SE/ BTL is held high. Common left input for fully differential input. AC ground for single-ended inputs. Left channel line input, selected when SE/ BTL is held low. Left channel positive output in BTL mode and positive output in SE mode. Left channel negative output in BTL mode and high-impedance in SE mode. The input for PC Beep mode. PC-BEEP is enabled when ...
Vendor:INTELPackage Cooled:SOP14D/C:05+
Forward-Current Transfer Ratio IC = -1.0 Adc, VCE = -3.0 Vdc IC = -10 Adc, VCE = -3.0 Vdc IC = -20 Adc, VCE = -3.0 Vdc Collector-Emitter Saturation Voltage IC = -20 Adc, IB = -200 mAdc IC = -10 Adc, IB = -40 mAdc Base-Emitter Saturation Voltage IC = -20 Adc, IB = -200 mAdc Base-Emitter Voltage IC = -10 Adc, VCE = -3.0 Vdc
Vendor:INTELPackage Cooled:SOP14D/C:05+
Forward-Current Transfer Ratio IC = -1.0 Adc, VCE = -3.0 Vdc IC = -10 Adc, VCE = -3.0 Vdc IC = -20 Adc, VCE = -3.0 Vdc Collector-Emitter Saturation Voltage IC = -20 Adc, IB = -200 mAdc IC = -10 Adc, IB = -40 mAdc Base-Emitter Saturation Voltage IC = -20 Adc, IB = -200 mAdc Base-Emitter Voltage IC = -10 Adc, VCE = -3.0 Vdc
Vendor:INTERSIL
EXAMPLE: A diode in this series is operated at a current of 7.5mA and has specified Temperature Coefficient (TC) limits of o+/-0.005%/ C. To obtain the typical Temperature Coefficient limits for this same diode operated at a current of 6.0mA, the onew TC limits (%/ C) can be estimated using the graph in FIGURE 1.
Vendor:INTERSILPackage Cooled:SSOP
Package Cooled:1000D/C:03+
Notes: 1. See Figure 1 to establish pulsed conditions. 2. Derate above 80C at 0.63 mA/C. 3. See Figure 2 to establish pulsed conditions. 4. Derate above 46C at 0.54 mA/C. 5. See Figure 7 to establish pulsed conditions. 6. Derate above 53C at 0.45 mA/C. 7. See Figure 8 to establish pulsed conditions. 8. Derate above 81C at 0.52 mA/C. 9. See Figure 9 to establish pulsed conditions. 10. Derate above 39C at...
Package Cooled:1000D/C:03+
Notes: 1. See Figure 1 to establish pulsed conditions. 2. Derate above 80C at 0.63 mA/C. 3. See Figure 2 to establish pulsed conditions. 4. Derate above 46C at 0.54 mA/C. 5. See Figure 7 to establish pulsed conditions. 6. Derate above 53C at 0.45 mA/C. 7. See Figure 8 to establish pulsed conditions. 8. Derate above 81C at 0.52 mA/C. 9. See Figure 9 to establish pulsed conditions. 10. Derate above 39C at...
Notes: 1. Dominant Wavelength, ëd, is derived from the CIE Chromaticity Diagram and represents the color of the lamp. 2. 1/2 is the off-axis angle where the luminous intensity is one half the on- axis intensity. 3. The luminous intensity is measured on the mechanical axis of the lamp package. 4. The optical axis is closely aligned with the package mechanical axis. 5. Tolerance for each intensity bi...
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:HARRD/C:O9+
The LMV791 provides optimal performance in low voltage and low noise systems. A CMOS input stage, with typical input bias currents in the range of a few femtoAmperes, and an input common mode voltage range which includes ground make the LMV791 ideal for low power sensor appli- cations. The LMV791 has a built-in enable feature which can be used to optimize power dissipation in low power applica- tions....
Vendor:INTERSILPackage Cooled:CAN
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. ‡ DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site. YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following characte...
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:N/APackage Cooled:126D/C:N/A
No-miss operation regardless of back-grounds Area reflective type sensor does not detect objects beyond the set range. Resistant to lens surface soiling Area reflective type sensor detects the distance by the angle, not the intensity of received light. Even if the lens sur- face is soiled by dust or any powdery material, there is a little variation of sensing range.
Vendor:N/APackage Cooled:126D/C:N/A
No-miss operation regardless of back-grounds Area reflective type sensor does not detect objects beyond the set range. Resistant to lens surface soiling Area reflective type sensor detects the distance by the angle, not the intensity of received light. Even if the lens sur- face is soiled by dust or any powdery material, there is a little variation of sensing range.
Vendor:INTERSILPackage Cooled:CAN
The MWS W-CDMA is a high- efficiency linear amplifier targeting 3V mobile handheld systems. The device is manufacturedinanadvanced InGaP/GaAs Heterojunction Bipolar Transistor (HBT) RF IC fab process. It is designed for use as a final RF amplifier in 3V W-CDMA and CDMA2000, spread spectrum systems,
Vendor:INTERSILPackage Cooled:CAN
The DS90C3201 and DS90C3202 are a dual 10-bit color Transmitter and Receiver FPD-Link chipset designed to transmit data at clocks speeds from 8 to 135 MHz. DS90C3201 and DS90C3202 are designed to interface be- tween the digital video processor and the display using a LVDS interface. The DS90C3201 transmitter serializes 2 channels of video data (10-bit each for RGB for each chan- nel, totaling 60 bits...
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
The first step in choosing the right product is to select the diode type. All of the products in the HSMS-282A family use the same diode chip, and the same is true of the HSMS-281A and HSMS-280A families. Each family has a different set of characteristics which can be compared most easily by consulting the SPICE parameters in Table 1.
Vendor:INTERSILPackage Cooled:CAN
The first step in choosing the right product is to select the diode type. All of the products in the HSMS-282A family use the same diode chip, and the same is true of the HSMS-281A and HSMS-280A families. Each family has a different set of characteristics which can be compared most easily by consulting the SPICE parameters in Table 1.
Vendor:INTERSILPackage Cooled:CAN
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are...
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:INTERSILPackage Cooled:CAN
Vendor:HARRISPackage Cooled:SOP16
Single Schottky rectifier suited to Switched Mode Power Supplies and high frequency DC to DC con- verters. Packaged in SMC, this device is especially in- tended for use as an antiparallel diode on synchro- nous rectification freewheel MOSFETs at the secondary of 3.3V SMPS and DC/DC units.
Vendor:HARRISPackage Cooled:SOP16
Single Schottky rectifier suited to Switched Mode Power Supplies and high frequency DC to DC con- verters. Packaged in SMC, this device is especially in- tended for use as an antiparallel diode on synchro- nous rectification freewheel MOSFETs at the secondary of 3.3V SMPS and DC/DC units.
Vendor:INSTERSIL