KM68V1000CLTGE-7L

Vendor:SAMSUNGPackage Cooled:TSOP32

KM68V1000CLTGE-7L

Vendor:SAMSUNGPackage Cooled:TSOP32

KM68V1000CLTGI-10L

Vendor:SAMSUNG ?

KM68V1000CLTGI7L

KM68V1000CLTGI-7L

Vendor:SAMSUNGPackage Cooled:TSSOP-32

Brooktree is a registered trademark of Brooktree Corporation. Product names or services listed in this publication are for identification purposes only, and may be trademarks or registered trademarks of their respective companies.

KM68V1000CLTGI-7L

Vendor:SAMSUNGPackage Cooled:TSSOP-32

Brooktree is a registered trademark of Brooktree Corporation. Product names or services listed in this publication are for identification purposes only, and may be trademarks or registered trademarks of their respective companies.

KM68V1000CLTGI-8L

Vendor:SAMSUNGPackage Cooled:TSSOP

KM68V1000CLTGI-8L

Vendor:SAMSUNGPackage Cooled:TSSOP

KM68V1000CLTI-10L

Vendor:SAMSUNGPackage Cooled:TSOP32

KM68V1000CLTI7L

KM68V1000CLTI-7L

The transmitters are inverting level translators that con- vert CMOS-logic levels to 5.0V EIA/TIA-232 levels. The KM68V1000CLTI-7L5E transmitters guarantee a 250kbps data rate with worst-case loads of 3kΩ in parallel with 1000pF, providing compatibility with PC-to-PC communication software (such as LapLink™). Transmitters can be paral- leled to drive multiple receivers or mice.

KM68V1000CLTI-8L

Vendor:SAMSUNGPackage Cooled:TSOP32

KM68V1000ELG7L

Vendor:samPackage Cooled:samD/C:dc00

The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce the supply current to less than 10 µA when a logic high is present on ENx (KM68V1000ELG7L) or a logic low is present on ENx (KM68V1000ELG7L). A logic zero input on ENx or logic high on ENx restores bias to the drive and control circuits and turns the power on. The enable input is compat...

KM68V1000ELG7L

Vendor:samPackage Cooled:samD/C:dc00

The logic enable disables the power switch and the bias for the charge pump, driver, and other circuitry to reduce the supply current to less than 10 µA when a logic high is present on ENx (KM68V1000ELG7L) or a logic low is present on ENx (KM68V1000ELG7L). A logic zero input on ENx or logic high on ENx restores bias to the drive and control circuits and turns the power on. The enable input is compat...

KM68V1000ELG-7L

Vendor:SAMSUNGD/C:05+

HAZARDOUS MATERIAL WARNING The ceramic portion of the device between leads and metal flange is beryllium oxide. Beryllium oxide dust is highly toxic and care must be taken during handling and mounting to avoid damage to this area. THESE DEVICES MUST NEVER BE THROWN AWAY WITH GENERAL INDUSTRIAL OR DOMESTIC WASTE.

KM68V1000ELGI-7L

Vendor:SECPackage Cooled:TSOP

• Live Insertion and Removal Power Manager • Adjustable Power-on slew rate • Autodetect of Load Open Circuit or -VIN Disconnection • Controlled Time-Delay • Operates from C9 V to External MOSFET Voltage Limit • Fault Indication Output (microprocessor reset). • Board Insertion/Removal Detector Input • Protection During Turn-On • Low frequency Power...

KM68V1000ELT-10L

KM68V1000ELT-7L

Vendor:12000Package Cooled:SAMSUNG

RXD_21[1] RXD_21[0] CRSDV_21 TXEN_21 TXD_21[0] TXD_21[1] RESET# RXD_20[1] MDIO MDC GND Vdd RXD_20[0] CRSDV_20 TXEN_20 TXD_20[0] TXD_20[1] RXD_19[1] RXD_19[0] CRSDV_19 TXEN_19 GND Vcc TXD_19[0] TXD_19[1] RXD_18[1] RXD_18[0] CRSDV_18 TXEN_18 TXD_18[0] TXD_18[1] RXD_17[1] RXD_17[0] CRSDV_17 TXEN_17 GND Vdd TXD_17[0] TXD_17[1] RXD_16[1] RXD_16[0] CRSDV_16 TXEN_16 TXD_16[0] TX...

KM68V1000ELTG-7L

Vendor:SECD/C:96+/99+

Hynix HYMD132G725B(L)8M-M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to iden- tify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.

KM68V1000ELTGI10L

Vendor:SECPackage Cooled:TSSOPD/C:08+

The FIFO contains overflow circuitry to disallow additional writes when the FIFO is full, and underflow circuitry to disallow additional reads when the FIFO is empty. An empty FIFO maintains the data of the last valid read on its Q0-8 outputs even after additional reads occur.

KM68V1000ELTGI-7L

KM68V1000ELTI7L

KM68V1000ELTI-7L

Vendor:SAMPackage Cooled:2000D/C:896

Notes: 1. DQ-to-I/O wiring is shown as recom- mended but may be changed. 2. DQ/DQS/DM/CKE/CS relationships must be maintained as shown. 3. DQ, DQS, DM/DQS resistors: 22 Ohms. 4. VDDID strap connections (for memory device VDD, VDDQ): STRAP OUT (OPEN): VDD = VDDQ STRAP IN (VSS): VDD VDDQ.

KM68V1000ELTI-7L

Vendor:SAMPackage Cooled:2000D/C:896

Notes: 1. DQ-to-I/O wiring is shown as recom- mended but may be changed. 2. DQ/DQS/DM/CKE/CS relationships must be maintained as shown. 3. DQ, DQS, DM/DQS resistors: 22 Ohms. 4. VDDID strap connections (for memory device VDD, VDDQ): STRAP OUT (OPEN): VDD = VDDQ STRAP IN (VSS): VDD VDDQ.

KM68V1002

Package Cooled:TSOP32

The HIP6017 monitors all the output voltages. A single Power Good signal is issued when the core is within 10% of the DAC setting and the other levels are above their under- voltage levels. Additional built-in over-voltage protection for the core output uses the lower MOSFET to prevent output voltages above 115% of the DAC setting. The PWM over- current function monitors the output current by using the...

KM68V1002AJ15

Vendor:SAMSUNGPackage Cooled:SOJ32D/C:2006

• Packaged in 28 pin, 300 mil wide SOIC or in 28 pin, 150 mil wide SSOP • Provides all critical timing for the National Semiconductor CS5530 Geode companion chip • Four PCI clocks • Selectable PCIF on up to 2 outputs • Early PCI clock selectability • Up to 4 Reference clocks • 48 MHz USB and 24MHz SIO support • AC97 audio clock • Multiple po...

KM68V1002AJ-15

Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) IEEE 1284 Compliant Enhanced Capabilities Port (ECP) ChiProtect Circuitry for Protection Against Damage Due to Printer Power-On 480 Address, Up to 15 IRQ and Three DMA Options

KM68V1002AJE-15

Vendor:SAMSUNG

KM68V1002AJI-15

Vendor:SAMSUNGD/C:2005+

When both clock inputs (CK, CK) are logic low, the device enters in a low power mode. An input logic detection circuit on the differential inputs, independent from input buffers, detects the logic low level and performs in a low power state where all outputs, the feedback, and the PLL are off. When the clock inputs transition from being logic low to being differential signals, the PLL turns back on, the i...

KM68V1002AJI-15

Vendor:SAMSUNGD/C:2005+

When both clock inputs (CK, CK) are logic low, the device enters in a low power mode. An input logic detection circuit on the differential inputs, independent from input buffers, detects the logic low level and performs in a low power state where all outputs, the feedback, and the PLL are off. When the clock inputs transition from being logic low to being differential signals, the PLL turns back on, the i...

KM68V1002ALJ-12

Vendor:SAMSUNGD/C:2005+

KM68V1002ALJ-15

Vendor:SAMSUNGD/C:2005+

KM68V1002ALJ-20

Vendor:SAMSUNGD/C:2005+

KM68V1002ALTI-12

Vendor:SAMSUNG ?

KM68V1002ALTI-17

Vendor:SAMSUNG ?

KM68V1002AT-10

Vendor:SECPackage Cooled:TSOPD/C:00+

KM68V1002AT-12

Vendor:SAMSUNG ?

KM68V1002AT-15

Vendor:SECPackage Cooled:SOPD/C:N/A

KM68V1002BJ10

Vendor:SAMSPackage Cooled:SOJ

KM68V1002BJ-12

Vendor:SAMSUNGD/C:2005+

Power up State Programming At power up in serial mode the six control bits are set to the values available on the six parallel inputs P0.5 thru P16 (see Table 2). For parallel mode the power up state is set with the two bit word defined by U1 and U2. See the truth table in Table 4.

KM68V1002BJ-12

Vendor:SAMSUNGD/C:2005+

Power up State Programming At power up in serial mode the six control bits are set to the values available on the six parallel inputs P0.5 thru P16 (see Table 2). For parallel mode the power up state is set with the two bit word defined by U1 and U2. See the truth table in Table 4.

KM68V1002BJ-15

Vendor:N/APackage Cooled:N/AD/C:08+09+

pin signalised an interrupt (logic 0). However, if the Mode 0 & 1 pins are at logic 0, the transceiver returns to the sleep condition when the wake up bus voltage signal is not present. When not in sleep mode all valid bus signals will be sent out on the RxD pin. RxD will be placed in the undriven or off state when in sleep mode .

KM68V1002BJ-15

Vendor:N/APackage Cooled:N/AD/C:08+09+

pin signalised an interrupt (logic 0). However, if the Mode 0 & 1 pins are at logic 0, the transceiver returns to the sleep condition when the wake up bus voltage signal is not present. When not in sleep mode all valid bus signals will be sent out on the RxD pin. RxD will be placed in the undriven or off state when in sleep mode .

KM68V1002BJ-8

Vendor:SAMSUNGD/C:2005+

Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions that guarantee specific performance limits. This assumes that the device is within the Opera...

KM68V1002BJI-10

Vendor:SAMSUNGPackage Cooled:SOJ

The write cycle is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address.

KM68V1002BJI-10

Vendor:SAMSUNGPackage Cooled:SOJ

The write cycle is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the write cycle, the bus interface circuits are disabled, SDA is allowed to remain high, and the device does not respond to its slave address.

KM68V1002BJI8

KM68V1002BLJ-10

Vendor:SAMSUNGD/C:2005+

KM68V1002BLJ-12

Vendor:SAMSUNGD/C:2005+

KM68V1002BLJI-12

Vendor:SAMSUNGD/C:2005+

KM68V1002BLJI-8

Vendor:SAMSUNGD/C:2005+

KM68V1002BLSJI-10

Vendor:SAMSUNGD/C:2005+

KM68V1002BLT-10

Vendor:SAMSUNG ?

KM68V1002BLT-8

Vendor:SAMSUNG ?

KM68V1002BSJ-12

Vendor:SAMSUNGD/C:2005+

KM68V1002BSJ-8

Vendor:SAMSUNGD/C:2005+

KM68V1002BT-8

Vendor:SAMSUNG ?

KM68V1002BTI-10

Vendor:SAMSUNG ?

The Multi-Input Wake-Up (MIWU) module can be used for either of two purposes: to provide inputs for waking up (ex- iting) from the Halt, Idle, or Power Save mode; or to provide general-purpose edge-triggered maskable interrupts from external sources. This 16-channel module generates four programmable interrupts to the CPU based on the signals received on its 16 input channels. Channels can be individ- ...

KM68V1002BTI-10

Vendor:SAMSUNG ?

The Multi-Input Wake-Up (MIWU) module can be used for either of two purposes: to provide inputs for waking up (ex- iting) from the Halt, Idle, or Power Save mode; or to provide general-purpose edge-triggered maskable interrupts from external sources. This 16-channel module generates four programmable interrupts to the CPU based on the signals received on its 16 input channels. Channels can be individ- ...

KM68V1002BTI-12

Vendor:SAMSUNG ?

The #WP pin provides inadvertent write protection. The #WP pin must be held high for any Erase or Program operation. The #WP pin is don care for all other operations. In typical use, the #WP pin ist connected to VSS with a standard pull-down resistor. #WP is then driven high whenever an Erase or Program operation is required. If the #WP pin is tied to VDD with a pull-up resistor, then all operations may occ...

KM68V1002CJ

KM68V1002CJ-12

Vendor:SAMSUNG ?

The P87C51Mx2 provides greater functionality, increased performance and overall lower system cost. By offering an embedded memory solution combined with the enhancements to manage the memory extension, the P87C51Mx2 eliminates the need for software work-arounds. The increased program memory enables design engineers to develop more complex programs in a high- level language like C, for example, without struggl...

KM68V1002CJ15

Vendor:SAMSUNGPackage Cooled:SOJ32D/C:2006

KM68V1002CJ-15

Vendor:SAMSUNG ?

NOTES: (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may de- grade device reliability. (2) Input terminals are diode-clamped to the power supply rails. Input signals that can swing more than 0.3V beyond the supply rails should be current-limited to 10mA or less. (3) Short circuit to ground, one amplifier per package.

KM68V1002CJI-15

Vendor:SAMSUNG ?

The MTC50150 is a low cost ADSL bridge and LAN router. One 10/100Mbits Ethernet port allows the con- nection of a LAN to the WAN in bridged or routed mode. The data traffic can be routed through a local terminal by using the LAN port. The presence of NAT and DHCP and the API slots for firewall functions allow for a high-speed connection of LAN connected devices, like PC, to the public Internet in an isol...

KM68V1002CJI-20

Vendor:SAMSUNG ?

The SN74LVT16646 is available in TIs shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.

KM68V1002CLJ-20

Vendor:SAMSUNG ?

• International standard packages JEDEC TO-247 AD • Low RDS (on) HDMOSTM process • Rugged polysilicon gate cell structure • Unclamped Inductive Switching (UIS) rated • Low package inductance (< 5 nH) - easy to drive and to protect • Fast intrinsic Rectifier

KM68V1002CLJI-10

KM68V1002CLJI-12

Vendor:SAMSUNG ?

The 16-bit wide programming word or control word (see Table Input Data Protocol) is read in via the DI data input, and this is synchronized with the clock input CLK. The status word appears synchronously at the DO data output (see Table Diagnosis Data Protocol). It is also possible to connect two TLE 6208-3 G in a daisy chain configuration. The DO data output of one device is connected with the DI data inpu...

KM68V1002CLJI-15

Vendor:SAMSUNG ?

ones and six zeros switching at the input clock rate. The transmission of SYNC patterns enables the deserializer to lock to the serializer signal within a deterministic time frame. This transmission of SYNC patterns is selected via the SYNC1 and SYNC2 inputs on the serializer. Upon receiving valid SYNC1 or SYNC2 pulse (wider than 6 clock cycles), 1026 cycles of SYNC pattern are sent.

KM68V1002CLJI-20

Vendor:SAMSUNG ?

The HIP6017 provides the power control and protection for three output voltages in high-performance microprocessor and computer applications. The IC integrates a PWM controller, a linear regulator and a linear controller as well as the monitoring and protection functions into a single 28 lead SOIC package. The PWM controller regulates the microprocessor core voltage with a synchronous-rectified buck c...

KM68V1002CT-10

Vendor:SECPackage Cooled:TSOPD/C:99+

Note 13: Comparator thresholds are expressed in terms of a voltage differential at the Feedback terminal below the nominal reference voltage measured at VIN = VO(NOM)+1V. To express these thresholds in terms of output voltage change, multiply by the Error amplifier gain, which is VOUT/VREF = (R1+R2)/R2.

KM68V1002CT-12

Hewlett-Packard Application Note 923, Schottky Barrier Diode Video Detectors. Hewlett-Packard Application Note 986, Square Law and Linear Detection. [3] Hewlett-Packard Application Note 956-5, Dynamic Range Extension of Schottky Detectors.

KM68V1002CTI-15

Vendor:SAMSUNG ?

Ratiometry: The quiescent voltage output and sensitivity of these ratiometric linear Hall effect devices are proportional to the supply voltage. The change in quiescent voltage output with supply voltage is specified in percent by the calculation.

KM68V1002TI-12

Vendor:SAMSUNG ?

KM68V1002TI-20

Vendor:SAMSUNGD/C:2005+

KM68V10ELT-7L

KM68V2000ALFI-10L

Most modern speakerphones use half-duplex operation, which switches transmission between the far-end talker and the speakerphone user. This is done because the acoustic coupling between the speaker and microphone is much higher in speakerphones than in handsets where the coupling is mechanically suppressed.

KM68V2000ALFI-8L

Vendor:SAMSUNGPackage Cooled:SOP32D/C:2005+

Address (24) and data (32) pins can be used for general-purpose I/O in single-chip mode Nine general-purpose I/O pins in MIOS1 unit Many peripheral pins can be used for general-purpose I/O when not used for primary function 5-V tolerant inputs/outputs

KM68V2000ALTG1-8L

Vendor:SECD/C:98+/00+

KM68V2000ALTGI-10L

Vendor:SAMSUNGPackage Cooled:TSOPD/C:07+

There are two limitations on the power handling ability of a transistor: average junction temperature and second break- down. Safe operating area curves indicate IC C VCE limits of the transistor that must be observed for reliable operation, i.e., the transistor must not be subjected to greater dissipa- tion than the curves indicate. The data of Figure 5 is based on T J(pk) = 150_C; TC is variable d...

KM68V2000ALTGI-10L

Vendor:SAMSUNGPackage Cooled:TSOPD/C:07+

There are two limitations on the power handling ability of a transistor: average junction temperature and second break- down. Safe operating area curves indicate IC C VCE limits of the transistor that must be observed for reliable operation, i.e., the transistor must not be subjected to greater dissipa- tion than the curves indicate. The data of Figure 5 is based on T J(pk) = 150_C; TC is variable d...

KM68V2000ALTGI-7L

Vendor:SAMSUNGPackage Cooled:TSOP32D/C:2005+

KM68V2000ALTI-8L

KM68V2000BLT-8L

Vendor:SECD/C:98+/99+

KM68V2000LT-8L

Vendor:SAMSUNGPackage Cooled:TSOP32D/C:2005+

KM68V2000LTG-8L

ACCURACY Linearity of a D/A converter is the true measure of its performance. The linearity error of the DAC80 is specified over its entire temperature range. This means that the analog output will not vary by more than 1/2LSB, maximum, from an ideal straight line drawn between the end points (inputs all 1s and all 0s) over the specified temperature range of 0C to +70C.

KM68V2000LTG-8L

ACCURACY Linearity of a D/A converter is the true measure of its performance. The linearity error of the DAC80 is specified over its entire temperature range. This means that the analog output will not vary by more than 1/2LSB, maximum, from an ideal straight line drawn between the end points (inputs all 1s and all 0s) over the specified temperature range of 0C to +70C.

KM68V2000LTGE8L

Vendor:SAMSUNG

KM68V2000LTGI-10L

Vendor:SAMSUNGPackage Cooled:TSOPD/C:07+

The PTH05050 is one of the smallest non-isolated power modules from Texas Instruments that features Auto-Track™. Auto-Track simplifies supply voltage sequencing in power systems by enabling modules to track each other, or any other external voltage, during power up and power down. Although small in size (0.87 in 0.5 in), these modules are rated for up to 6 A of output current, and are an ...

KM68V2000LTGI8L

KM68V2000LTI10L

KM68V2000LTI-10L

Vendor:SAMSUNGPackage Cooled:TSOP32D/C:2005+

Offerings include ball grid array (BGA) packages with 0.80mm, 1.00mm, and 1.27mm pitches. In addition to tradi- tional wire-bond interconnects, flip-chip interconnect is used in some of the BGA offerings. The use of flip-chip intercon- nect offers more I/Os than is possible in wire-bond versions of the similar packages. Flip-Chip construction offers the combination of high pin count with high thermal c...

KM68V2000LTI-10L

Vendor:SAMSUNGPackage Cooled:TSOP32D/C:2005+

Offerings include ball grid array (BGA) packages with 0.80mm, 1.00mm, and 1.27mm pitches. In addition to tradi- tional wire-bond interconnects, flip-chip interconnect is used in some of the BGA offerings. The use of flip-chip intercon- nect offers more I/Os than is possible in wire-bond versions of the similar packages. Flip-Chip construction offers the combination of high pin count with high thermal c...

KM68V200LTG-8L

Vendor:SECD/C:98+/00+

KM68V257

KM68V257BJ-15

Vendor:SamsungPackage Cooled:STKD/C:0623+

KM68V257CJ15

Vendor:SAMSUNGPackage Cooled:SOJ28D/C:2006

The PTH03060W non-isolated power module is small in size but big on per- formance and flexibility. Its high output current, compact footprint, and industry- leading features offers system designers a versatile module for powering complex multi-processor digital systems. This product employs double-sided surface mount construction and provides high-performance step-down power conversion for up to ...

KM68V257CJ-1562256

KM68V257CJ20

Vendor:samPackage Cooled:samD/C:dc95

The MAX4106/MAX4107 require only 15mA of supply current while delivering a 350MHz or a 300MHz band- width, respectively. Voltage noise is an ultra-low 0.75nV/Hz, while a low-distortion architecture provides a spurious-free dynamic range (SFDR) of 63dB at 5MHz. These high-speed op amps have a wide output voltage swing of 3.2V and a high current-drive capability of 80mA.