K1213

D/C:05+

The pre-bias current is controlled by the pin VPRE and can be controlled from 0 mA to 50 mA. The pre-bias current control on pin VPRE is implemented as a current mirror and therefore sinks a cur- rent proportional to the pre-bias current. The current sink into the VPRE pin is ap- proximately 3/500 of the pre-bias current.

K1213

D/C:05+

The pre-bias current is controlled by the pin VPRE and can be controlled from 0 mA to 50 mA. The pre-bias current control on pin VPRE is implemented as a current mirror and therefore sinks a cur- rent proportional to the pre-bias current. The current sink into the VPRE pin is ap- proximately 3/500 of the pre-bias current.

K1217

D/C:05+

© Cypress Semiconductor Corporation, 2003. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as c...

K1221

D/C:05+

Hynix HYMD116645B(L)8-M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.

K1221

D/C:05+

Hynix HYMD116645B(L)8-M/K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.

K1222

D/C:05+

K1224

D/C:05+

K122J15C0GF5TL2

K1232

D/C:05+

K12395

RSDS INTERFACE WITH SKEW CONTROL This functional block transforms CMOS level signal to RSDS for the system clock (DCLK) and RGB color data. The RSDS skew is controlled by RSKEW[2:0] with delay steps between the RSF/BCKP/N and RSF/BR/G/B[3:0]P/N which is imple- mented in CLK & Data synchronizer.

K1246

D/C:05+

mode 5: slow mode, CS inactive (high) between conversion cycles, 11- to 16-clock transfer In this mode, CS is inactive (high) between serial I/O CLOCK transfers and each transfer can be 11 to 16 clocks long. The falling edge of CS begins the sequence by removing DATA OUT from the high-impedance state. The rising edge of CS ends the sequence by returning DATA OUT to the high-impedance state within the spe...

K1249

D/C:05+

Up to 10MHz Center Frequency on a Single 3V Supply Easy to UseA Single Resistor Value Sets Lowpass Cutoff Frequency (200kHz ƒC 5MHz), Unequal Resistor Values Extend Cutoff Frequency Up to 10MHz Extremely FlexibleDifferent Resistor Values Allow Lowpass Transfer Functions with or Without Gain (Butterworth, Chebyshev or Custom) SNR = 92dB (ƒC = 2MHz, 2VP-P) THD = C84dB (ƒC = 2MHz, 1VP-P) In...

K1250

D/C:05+

K1250

D/C:05+

K1265

D/C:05+

K1266

D/C:05+

• 100,000 erase/write cycle enhanced Flash program memory typical • 1,000,000 erase/write cycle data EEPROM memory typical • Flash/data EEPROM retention: 100 years • Self-programmable under software control • Priority levels for interrupts • 8 X 8 Single-cycle Hardware Multiplier • Extended Watchdog Timer (WDT): - Programmable period from 41 ms to 131s &...

K1271

D/C:05+

800 mA Continuous Output Current Rating 30 V Output Voltage Rating Internal PWM Current Control, Saturated Sink Drivers Internally Generated Precision 2.5 V Reference Internal Transient-Suppression Diodes Internal Thermal-Shutdown Circuitry Crossover-Current Protection, UVLO Protection Automotive Capable

K1271

D/C:05+

800 mA Continuous Output Current Rating 30 V Output Voltage Rating Internal PWM Current Control, Saturated Sink Drivers Internally Generated Precision 2.5 V Reference Internal Transient-Suppression Diodes Internal Thermal-Shutdown Circuitry Crossover-Current Protection, UVLO Protection Automotive Capable

K1276

D/C:05+

In an effort to provide up-to-date information to the customer regarding the status of any given device, Motorola has classified all devices into three categories: Preferred devices, Current products and Not Recommended for New Design products.

K1279

D/C:05+

The transmitter is an inverting level translator that con- verts CMOS-logic levels to EIA/TIA-232 compatible lev- els. It guarantees data rates up to 460kbps with worst-case loads of 3kΩ in parallel with 1000pF. When SHDN is driven low, the transmitter is disabled and put into tri-state. The transmitter input does not have an internal pullup resistor.

K12816.01

Vendor:N/APackage Cooled:50D/C:N/A

K1282

D/C:05+

K1286

D/C:05+

Drain- Source Voltage Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current  Power Dissipation ƒ Power Dissipation ƒ Linear Derating Factor Gate-to-Source Voltage Junction and Storage Temperature Range

K1286

D/C:05+

Drain- Source Voltage Continuous Drain Current, VGS @ -10V Continuous Drain Current, VGS @ -10V Pulsed Drain Current  Power Dissipation ƒ Power Dissipation ƒ Linear Derating Factor Gate-to-Source Voltage Junction and Storage Temperature Range

K1288

D/C:05+

K1289

D/C:05+

K1292

D/C:05+

This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.

K1294

D/C:05+

An output capacitor is also required to filter the output voltage and is needed for loop stability. The capacitor should be located near the TS2576 using short PC board traces. Low ESR types capacitors are recommended for low output ripple voltage and good stability. Generally, low value or low voltage (less than 12V) electrolytic capacitors usually have higher ESR numbers, For example, the lower capacitor v...

K1295

D/C:05+

These full reels are individually labeled and placed inside astanda intermediate made of recyclable corrugatedrd brown pap with a Fairchil d logo printing. One pizza boxer contains eight reels maximum. And thes intermediatee boxes are placed inside a labeled shipping box which comes in different sizes depending on t e nuhmber of parts shipped.

K12DI0024(R00)

K12PBK15N

Vendor:ITTPackage Cooled:04+D/C:5

trigger/retrigger input (nA1) , an overriding active LOW direct reset input (nRD), an output (nQ) and its complement (nQ), and two pins (nCTC and nRCTC) for connecting the external timing components Ct and Rt. Typical pulse width variation over temperature range is 0.2%.

K12PLGN1.55N

K12PLGN1.55NL306

K1300E

Vendor:availPackage Cooled:INFD/C:06+

Application Support Information The Application Engineering group in Agilent Technologies is available to assist you with the technical understanding associ- ated with HSDL-3203 infrared transceiver module. You can con- tact them through your local Agilent sales representative for additional details.

K1300E

Vendor:availPackage Cooled:INFD/C:06+

Application Support Information The Application Engineering group in Agilent Technologies is available to assist you with the technical understanding associ- ated with HSDL-3203 infrared transceiver module. You can con- tact them through your local Agilent sales representative for additional details.

K1300E70

Vendor:54904Package Cooled:TECCORD/C:N/A

- Output voltage: 3.3V, 5V, 12V and adjustable output version - Adjustable version output voltage range, 1.23V to 37V+4% - 150Khz +15% fixed switching frequency - Voltage mode non-synchronous PWM control - Thermal-shutdown and current-limit protection - ON/OFF shutdown control input - Operating voltage can be up to 40V - Output load current: 3A - TO220-5L TO220-5L(R) and TO263-5L packages - Low power s...

K1300G

Vendor:15008Package Cooled:Teccor/LittelfuseD/C:N/A

*Standard version is shown in bold. The first letter after the part number designates the reset output option. Insert the letter corresponding to the desired reset threshold level from Table 1 in the next position. Insert the two-letter code from Table 2 in the remaining two positions for the desired frequency range. Table 1 and Table 2 are located at the end of the data sheet.

K1300S

Vendor:LFPackage Cooled:DO214AAD/C:08+

Edition 08.95 Published by Siemens AG, Bereich Halbleiter, Marketing- Kommunikation, Balanstraße 73, 81541 Mnchen © Siemens AG 1995. All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies. The information descr...

K1300SRP

K1302000

Vendor:CENIUSPackage Cooled:SOP16D/C:93

K1302000

Vendor:CENIUSPackage Cooled:SOP16D/C:93

K1302PT4813R1

Vendor:fenwalPackage Cooled:fenwalD/C:dc80+

DESCRIPTION These I 2C-compatible electrically erasable pro- grammable memory (EEPROM) devices are orga- nized as 32Kx8 bits (M24256) and 16Kx8 bits (M24128), and operate down to 2.5 V (for the -W version of each device). The M24256B, M24128B and M24256A are also available, and offer the extra functionality of the chip enable inputs. Please see the separate data sheets for details of these product...

K1303012

Vendor:GENIUSPackage Cooled:SOP16D/C:97

• High-performance RISC CPU • Only 35 single-word instructions to learn - All single-cycle instructions except for program branches which are two-cycle • Operating speed: DC - 20 MHz clock input DC - 200 ns instruction cycle • Interrupt capability (up to 7 internal/external interrupt sources) • 8-level deep hardware stack • Direct, Indirect and Relative Addr...

K1303PT4814R4

Vendor:fenwalPackage Cooled:fenwalD/C:dc80+

This document is a general product description and is subject to change without notice. Hyundai electronics does not assume any responsibility for use of circuits described. No patent licences are implied Hyundai Semiconductor Rev.00 / Sep.97

K1304

D/C:05+

Teccor's line of sensitive gate triacs includes devices with current capabilities through 8 A. Voltage ranges are available from 200 V to 600 V. This line features devices with guaranteed gate control in Quadrants II and IV as well as control in the commonly used Quadrants I and III. Four-quadrant control devices require sensitive gate triacs. They can be controlled by digital circuitry where positive-only or...

K1305

D/C:05+

Optional accessories for module-type MCC 95 version 1 B Keyed gate/cathode twin plugs with wire length = 350 mm, gate = yellow, cathode = red Type ZY 200L (L = Left for pin pair 4/5)UL 758, style 1385, Type ZY 200R (R = right for pin pair 6/7)CSA class 5851, guide 460-1-1

K1306023

K1307

D/C:05+

Note 1: All currents into the device are positive; all currents out of the device are negative. All voltages are referenced to device ground, unless otherwise noted. Note 2: ∆VOD and ∆VOC are the changes in VOD and VOC, respectively, when DI changes state. Note 3: Only one output shorted at a time. Note 4: This input current is for the hot-swap enable (EN_, EN, EN) inputs and is present until the...

K1307

D/C:05+

Note 1: All currents into the device are positive; all currents out of the device are negative. All voltages are referenced to device ground, unless otherwise noted. Note 2: ∆VOD and ∆VOC are the changes in VOD and VOC, respectively, when DI changes state. Note 3: Only one output shorted at a time. Note 4: This input current is for the hot-swap enable (EN_, EN, EN) inputs and is present until the...

K130A008

Vendor:HYUNDAIPackage Cooled:QFP-44D/C:N/A

K130A033

Vendor:HMSD/C:05+

The AD7877 is a 12-bit successive approximation ADC with a synchronous serial interface and low on resistance switches for driving touch screens. The AD7877 operates from a single 2.7 V to 5.25 V power supply (functional operation to 2.2V), and features throughput rates of 125 kSPS. The AD7877 features direct battery measurement on two inputs, temperature and touch-pressure measurement.

K130A051

Package Cooled:SOP

The K4S560432E / K4S560832E / K4S561632E is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 16,785,216 / 4 x 8,392,608 / 4 x 4,196,304 words by 4bits, fabricated with SAMSUNG's high performance CMOS technology. Synchro- nous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of oper- ating frequencies, programma...

K1317

D/C:05+

The DS1089L is a clock generator that produces a spread spectrum (dithered) square-wave output of fre- quencies from 130kHz to 66.6MHz. The DS1089L is shipped from the factory programmed at a specific fre- quency. The DS1089L is pin-for-pin compatible with the DS1087L, however, the DS1089L dithers at equal per- centages above and below the center frequency. The user still has access to the internal frequency...

K1324

D/C:05+

K1335

Vendor:TOSHIBAPackage Cooled:TO-252D/C:5000

Parameter Total Gate Charge (turn-on) Gate - Emitter Charge (turn-on) Gate - Collector Charge (turn-on) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Switching Energy Turn-Off Switching Energy Total Switching Energy Input Capacitance Output Capacitance Reverse Transfer Capacitance Diode Reverse Recovery Time Diode Peak ReverseCurrent Diode Recovery Charge Diode Pea...

K1338

D/C:05+

SOFTWARE DATA PROTECTION: A software controlled data protection feature has been implemented on the AT28C010-12DK. When enabled, the software data protection (SDP), will prevent inadvertent writes. The SDP feature may be enabled or disabled by the user; the AT28C010-12DK is shipped from Atmel with SDP disabled.

K1338

D/C:05+

SOFTWARE DATA PROTECTION: A software controlled data protection feature has been implemented on the AT28C010-12DK. When enabled, the software data protection (SDP), will prevent inadvertent writes. The SDP feature may be enabled or disabled by the user; the AT28C010-12DK is shipped from Atmel with SDP disabled.

K1341

D/C:05+

• 1.5 Mbps data rate • On-chip 3.3V regulator • Endpoint 0 with 8-byte transmit buffer and 8-byte receive buffer • Endpoint 1 with 8-byte transmit buffer • Endpoint 2 with 8-byte transmit buffer and 8-byte receive buffer

K1351

Vendor:TOS/NEC/FUJIPackage Cooled:TO-220D/C:04+

The HT761X is a CMOS LSI chip designed for use in au- tomatic PIR lamp control. It can operate with a 2-wire configuration for triac applications or with a 3-wire con- figuration for relay applications. The chip is equipped with operational amplifiers, a comparator, timer, a zero crossing detector, control circuit, a voltage regulator, a system oscillator, and an output timing oscillator.

K1352

and Inductors 0.6 A Continuous Current Per Switch Low-side: RDSon < 1.5 Ω Versus Total Temperature Range High-side: RDSon < 2.0 Ω Versus Total Temperature Range Very Low Quiescent Current IS < 20 µA in Standby Mode Outputs Short-circuit Protected Overtemperature Prewarning and Protection Under- and Overvoltage Protection Various Diagnosis Functions Such as Shorted Output, Open L...

K1356

Vendor:TOS/NEC/FUJIPackage Cooled:TO-220D/C:04+

System integration unit (SIU) Bus monitor Software watchdog Periodic interrupt timer (PIT) Clock synthesizer Decrementer and time base Reset controller IEEE 1149.1 test access port (JTAG) Interrupts Seven external interrupt request (IRQ) lines Seven port pins with interrupt capability Eighteen internal interrupt sources Programmable priority between SCCs Programmable highest-pr...

K1357

Vendor:3500

PARAMETER Oscillator Switching Frequency Peak Voltage (5V typical, measured as % of VBIAS) Valley Voltage (1V typical, measured as % of VBIAS) VBIAS Regulator Output Voltage Current Limit Soft Start and Delay SS/DEL to FB Input Offset Voltage Charge Current Discharge Current Charge/Discharge Current Ratio Charge Voltage Delay Comparator Threshold Discharge Comparator Threshold Over-Current Com...

K1359

D/C:05+

Features qInternational standard packages qLow RDS (on) HDMOSTM process qRugged polysilicon gate cell structure qUnclamped Inductive Switching (UIS) rated qLow package inductance - easy to drive and to protect qFast intrinsic Rectifier

K1363

D/C:05+

The seven address inputs along with the STROBE and CS (Chip Select) are logically ANDed to form an enable signal for the resettable transparent latches. The DATA input is buffered and is used as the input to all latches. To write to a location, RESET must be low and CS must go high while the address and data are set up. Then the STROBE input is set high and then low causing the data to be latched. The data c...

K1366

D/C:05+

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this pub...

K1367

D/C:05+

The PI3C16215 is a 20-bit bus switch with low ON-State resistance. The bus switch creates no additional propagation delay. To minimize live-insertion noise, the device also precharges the B port to a user- selectable bias voltage (BIASV).

K1367

D/C:05+

The PI3C16215 is a 20-bit bus switch with low ON-State resistance. The bus switch creates no additional propagation delay. To minimize live-insertion noise, the device also precharges the B port to a user- selectable bias voltage (BIASV).

K1368

D/C:05+

1.700 (43.18mm) PCB Height 168-Pin Registered DIMM with Double Sided ECC support One 0.22µF and one 0.0022µF decoupling capacitors adopted Serial Presence Detect with Serial EEPROM Two Register Buffers & one Inverter used (with PLL) Supports Flow-through or Register mode by Pin No. 147 (REGE) Meets all the other JEDEC specifications Single 3.3V0.3V power supply All device pins are LVTTL ...

K1370

D/C:05+

To limit maximum duty cycle, the internal clock pulse blanks both outputs low during the discharge time of the oscillator. On the falling edge of the clock, the ap- propriate output(s) is driven high. The end of the pulse is controlled by the PWM comparator, current limit com- parator, or the overcurrent comparator.

K1370

D/C:05+

To limit maximum duty cycle, the internal clock pulse blanks both outputs low during the discharge time of the oscillator. On the falling edge of the clock, the ap- propriate output(s) is driven high. The end of the pulse is controlled by the PWM comparator, current limit com- parator, or the overcurrent comparator.

K1377

D/C:05+

Specifications at TA +25C are guaranteed by production testing. Specifications at TA < +25C are guaranteed by design. Nominal full-scale current IOUTFS = 32 x IREF. This parameter does not include update-rate depending effects of sin(x)/x filtering inherent in the MAX5878. Parameter measured single-ended into a 50Ω termination resistor. Not production tested. Guaranteed by design. No termination res...

K1379

D/C:05+

RSENSE - Are the connections to the bottom of the bridge. All power flowing through the bridge will flow through this point, and can be sensed by connecting a sense resistor from here to ground. The sense resistor will develop a voltage proportional to the current flowing. Size the value and power rating of the sense resistor according to the voltage necessary. 3 volts is the maximum voltage between thi...

K1382

Vendor:TOSHIBAPackage Cooled:TO-3PLD/C:960

The fourth, transient power due to switching current, is caused by the fact that whenever a CMOS device goes through a transition, with VCC 2 VT, there is a time when both N-channel and P-channel devices are both conducting. An expression for this current is derived in Application Note AN-77. The expression is:

K1384

D/C:05+

K1386

D/C:05+

K1387

Vendor:ESECTRIC

Note 1: Specifications are production tested at TA = +25C. Limits over temperature are guaranteed by design and characterization. Note 2: Tuning gain is measured at VTUNE = 0.4V with a 0.2V step to 0.6V. At low VTUNE, tuning gain is highest. Note 3: Measurements taken on MAX262_ EV kit.

K1388

D/C:05+

The Design Browser allows users to select and import precon- figured designs into the users project. Users can easily browse a catalog of preconfigured designs to facilitate time-to-design. Examples provided in the tools include a 300-baud modem, LIN Bus master and slave, fan controller, and magnetic card reader.

K1390

D/C:05+

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners.

K1393

D/C:05+

NOTES: 1. Typical values are at VCC = 3.3V, +25C ambient. 2. The increase in supply current is attributable to each input that is at the specified voltage level rather than VCC or GND. 3. This is measured by the voltage drop between the A and B terminals at the indicated current through the switch.

K1400

D/C:05+

LCD BIAS Output Voltage Range FB Threshold Voltage FB Input Current LCD Bias Shutdown Input Bias Current LCD Bias Shutdown High Input Voltage LCD Bias Shutdown Low Input Voltage Peak Inductor Current Limit Internal NFET On-resistance Switch Pin Leakage Current Efficiency Switch On-Time Switch Off-Time ADJ Input Voltage Range ADJ Input Bias Current ENTIRE REGULATOR Operating Voltage Minimum Start...

K1400E

Vendor:6008Package Cooled:Teccor/LittelfuseD/C:N/A

− Glueless Interface to Asynchronous Memories: SRAM and EPROM − Glueless Interface to Synchronous Memories: SDRAM and SBSRAM − 256M-Byte Total Addressable External Memory Space 16-Bit Host-Port Interface (HPI) Two Multichannel Buffered Serial Ports (McBSPs) − Direct Interface to T1/E1, MVIP, SCSA Framers − ST-Bus-Switching Compatible − Up to 256 Channels Each ...

K1400E70

Vendor:LF(TEC)Package Cooled:TO-92D/C:07+

(AVCC = OVCC = 1.8V, AGND = OGND = 0, fSAMPLE = 250.0057MHz, -0.5dBFS; see TOCs for detailed information on test condi- tions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins differential RL = 100Ω, TA = +25C.)

K1400G

Vendor:22458Package Cooled:TECCORD/C:N/A

Pb−Free Package is Available* VOUT Fixed @ 2.5 V 1.5% VPOWER Dropout < 0.40 V @ 3.0 A VCONTROL Dropout < 1.05 V @ 3.0 A 1.5% Trimmed Reference Fast Transient Response Remote Voltage Sensing Thermal Shutdown Current Limit Short Circuit Protection Drop−In Replacement for EZ1582 Backwards Compatible with 3−Pin Regulators Very Low Dropout Reduces Total Power Consumption

K1400S

Vendor:LFPackage Cooled:DO214AAD/C:08+

Dual 250 mA High-Performance RF LDOs Available in Fixed and Adjustable Voltage Options (1.2 V to 5.5 V) High PSRR: 65 dB at 10 kHz UltraLow Noise: 32 µVrms Fast Start-Up Time: 60 µs Stable with 2.2 µF Ceramic Capacitor Excellent Load/Line Transient Response Very Low Dropout Voltage: 125 mV at 250 mA Independent Enable Pins Thermal Shutdown and Independent Current Limit Available in The...

K14019A26

Vendor:.Package Cooled:2005D/C:500

Hynix HYMD564G726(L)8M-K/H/L series is Low Profile registered 184-pin double data rate Synchronous DRAM Dual In-Line Memory Modules (DIMMs) which are organized as 64Mx72 high-speed memory arrays. Hynix HYMD564G726(L)8M-K/H/L series consists of nine 64Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate. Hynix HYMD564G726(L)8M-K/H/L series provide a high performance 8-byte interface in 5...

K1401A

D/C:05+

K1401YA26

K1402A

D/C:05+

K1403

D/C:05+

An extension of the multiplex system application is a sample- and-hold circuit (Figure 9), using the strobing characteristics of the OTA amplifier bias-current (ABC) terminal as a means of control. Figure 9 shows the basic system using the CA3080A as an OTA in a simple voltage-follower configuration with the phase-compensation capacitor serving the additional function of sampled-signal storage. The maj...

K1403A

D/C:05+

K1404

D/C:05+

The HAL 57x, HAL 58x two-wire sensors are monolithic integrated circuits which switch in response to magnetic fields. If a magnetic field with flux lines perpendicular to the sensitive area is applied to the sensor, the biased Hall plate forces a Hall voltage proportional to this field. The Hall voltage is compared with the actual threshold level in the comparator. The temperature-dependent bias incre...

K1416

D/C:05+

Information in this document is provided in connection with Skyworks Solutions, Inc. (Skyworks) products. These materials are provided by Skyworks as a service to its customers and may be used for informational purposes only by the customer. Skyworks assumes no responsibility for errors or omissions in these materials. Skyworks may make changes to its documentation, products, specifications and product descri...

K1417

D/C:05+

Row Address Strobe Column Address Strobe Write Enable Output Enable Address Input(8K Product) Address Input(4K Product) Data Input / Output Check Bit Serial PD Clock Input Serial PD Data Input/Output Serial PD Address Input Power (+3.3V) Ground

K1423

D/C:05+

Note 1: The deviation parameters, Vref(dev) and Iref(dev) are defined as the differences between the maximum and the minimum values obtained over the rated tem- perature range. The average full range temperature coef- ficient of the reference input voltage is defined as:

K1423

D/C:05+

Note 1: The deviation parameters, Vref(dev) and Iref(dev) are defined as the differences between the maximum and the minimum values obtained over the rated tem- perature range. The average full range temperature coef- ficient of the reference input voltage is defined as:

K1425

D/C:05+

K1428

D/C:05+

K1429

D/C:05+

(red) lights indicate a faulty battery. This kit is shipped with a 10kΩ resistor to disable the temperature monitor- ing function. If temperature monitoring is required, con- nect the appropriate thermistor (see Jumper Selection section). For more information on the operation of the MAX1737, refer to the Detailed Description section of the MAX1737 data sheet.

K14324P

Vendor:N/APackage Cooled:DIPD/C:07+

Programs compiled natively on the host can run on the target. Programs need never be cross compiled. Native tools are easy to obtain and are usually supplied as part of the system package, for example GCC on any Linux system. Programs can be tested on the host system before the need to download them for final testing. The host and target both have the same touch and feel, i.e. both are the same architectur...

K1434

D/C:05+

HY5V26C(L/S)F is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchro- nized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.