L2A1361

Package Cooled:N/AD/C:08+

4.5-ns pin-to-pin logic delays with counter frequencies of up to 227.3 MHz MultiVoltTM I/O interface enables device core to run at 3.3 V, while I/O pins are compatible with 5.0-V, 3.3-V, and 2.5-V logic levels Pin counts ranging from 44 to 256 in a variety of thin quad flat pack (TQFP), plastic quad flat pack (PQFP), ball-grid array (BGA), space- saving FineLine BGATM , and plastic J-lead chip carrier (...

L2A1376

Vendor:LSIPackage Cooled:06+D/C:800

The MAX4104/MAX4105/MAX4304/MAX4305 op amps feature ultra-high speed, low noise, and low distortion in a SOT23 package. The unity-gain-stable MAX4104 requires only 20mA of supply current while delivering 625MHz bandwidth and 400V/µs slew rate. The MAX4304, compensated for gains of +2V/V or greater, delivers a 730MHz bandwidth and a 1000V/µs slew rate. The MAX4105 is compensated for a minimum gain...

L2A1380

Vendor:LSIPackage Cooled:BGA

These devices consist of a 32-bit shift register, 32 data latches, and control logic to perform polarity and blanking functions. Data is shifted through the shift register on the logic high-to-low transition of the clock. The HV45 shifts in the counterclockwise direction when viewed from the top of the package and the HV46 shifts in the clockwise direction. A data output buffer is provided for cascading...

L2A1392

The DDU7C tolerances are guaranteed for input pulse widths and periods greater than those specified in the test conditions. Although the device will function properly for pulse widths as small as 20% of the total delay and periods as small as 40% of the total delay (for a symmetric input), the delays may deviate from their values at low frequency. However, for a given input condition, the deviation will be ...

L2A1399

Package Cooled:N/AD/C:08+

Thus, for PC2, no phase difference exists between SIGIN and COMPIN over the full frequency range of the VCO. Moreover, the power dissipation due to the low-pass filter is reduced because both p and n-type drivers are OFF for most of the signal input cycle. It should be noted that the PLL lock range for this type of phase comparator is equal to the capture range and is independent of the low-pass filte...

L2A1399

Package Cooled:N/AD/C:08+

Thus, for PC2, no phase difference exists between SIGIN and COMPIN over the full frequency range of the VCO. Moreover, the power dissipation due to the low-pass filter is reduced because both p and n-type drivers are OFF for most of the signal input cycle. It should be noted that the PLL lock range for this type of phase comparator is equal to the capture range and is independent of the low-pass filte...

L2A1405

Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect device reliabi...

L2A1409

Vendor:LSIPackage Cooled:06+D/C:800

Temperature Sensor Two Quadrature Decoders Optional On-Chip Regulator FlexCAN module Two Serial Communication Interfaces (SCIs) Up to two Serial Peripheral Interfaces (SPIs) Up to four general-purpose Quad Timers Computer Operating Properly (COP) / Watchdog JTAG/Enhanced On-Chip Emulation (OnCE™) for unobtrusive, real-time debugging • Up to 62 GPIO lines • 144-pin LQFP Pac...

L2A1417

Vendor:CISCOSYSTEMSPackage Cooled:BGAD/C:99

H3 The third harmonic should be the dominant harmonic and is primarily affected by output load current which, of course, is unavoidable. However, this should encourage the user not to waste current in the gain setting resistors, and to use val- ues that consume only a small proportion of the load current, so long as peaking does not occur. The more load current, the worse the distortion, but depending o...

L2A1417

Vendor:CISCOSYSTEMSPackage Cooled:BGAD/C:99

H3 The third harmonic should be the dominant harmonic and is primarily affected by output load current which, of course, is unavoidable. However, this should encourage the user not to waste current in the gain setting resistors, and to use val- ues that consume only a small proportion of the load current, so long as peaking does not occur. The more load current, the worse the distortion, but depending o...

L2A1418

Vendor:TERAYONPackage Cooled:BGAD/C:5

L2A1418

Vendor:TERAYONPackage Cooled:BGAD/C:5

L2A1421

The 128Mb SDRAM includes an AUTO REFRESH MODE, and a power-saving, power-down mode. All signals are registered on the positive edge of the clock signal, CLK. All inputs and outputs are LVTTL compatible. The 128Mb SDRAM has the ability to synchronously burst data at a high data rate with automatic column-address generation, the ability to interleave between internal banks to hide precharge time and th...

L2A1423

Vendor:LSIPackage Cooled:06+D/C:800

Storage temperature range, TstgC 65C to 150C (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affe...

L2A1425

Vendor:CISCOSYSTEMSPackage Cooled:BGAD/C:99

Handle carefully Solder under the following conditions. 5 seconds max. at 230C (PCB) Do not apply extreme heat to the resonator. Recommended preheating is 150C for one minute. Avoid extreme fluctuations in temperature during use. There is no specific direction in resonator mounting. Oscillation data should be examined when used in oscillation circuit with micon or other ICs. This is for reflow solder,...

L2A1429

Vendor:LSIPackage Cooled:06+D/C:800

The IS22_ Series are optically coupled isolators consisting of a Gallium Arsenide infrared emitting diode coupled with a mono- lithic silicon detector performing the functions of a zero crossing bilateral triac mounted in a standard 6 pin dual-in-line package.

L2A1430

Vendor:LSIPackage Cooled:06+D/C:800

n One CD-ROM containing summary and full datasheets, datasheets with electrical and mechanical characteristics, application notes and getting started documents for all development boards and AT91 microcontrollers. An AT91 software package with C and assembly listings is also provided. This allows the user to begin evaluating the AT91 ARM® Thumb® 32-bit microcontroller quickly.

L2A1430

Vendor:LSIPackage Cooled:06+D/C:800

n One CD-ROM containing summary and full datasheets, datasheets with electrical and mechanical characteristics, application notes and getting started documents for all development boards and AT91 microcontrollers. An AT91 software package with C and assembly listings is also provided. This allows the user to begin evaluating the AT91 ARM® Thumb® 32-bit microcontroller quickly.

L2A1438

Vendor:VITESSEPackage Cooled:MQFPD/C:00+

Lead free product Leadless chip form , no lead damage Lead-free solder joint , no wire bond & lead frame Plastic package has Underwriters Laboratory Flammability Classification 94V-0 For surface mounted applications Low profile package Built-in strain relief Metal to silicon rectifier , majority carrier conduction Low power loss , High efficiency High current capability , Super low VF drop High surge...

L2A1442

L2A1447

Vendor:LSIPackage Cooled:BGAD/C:2000

operation essentially is zero, beyond the time needed for the serial protocol. That is, the memory is read or written at the speed of the SPI bus. Unlike an EEPROM, it is not necessary to poll the device for a ready condition since writes occur at bus speed. That is, by the time a new bus transaction can be shifted into the part, a write operation will be complete. This is explained in more detail in...

L2A1447

Vendor:LSIPackage Cooled:BGAD/C:2000

operation essentially is zero, beyond the time needed for the serial protocol. That is, the memory is read or written at the speed of the SPI bus. Unlike an EEPROM, it is not necessary to poll the device for a ready condition since writes occur at bus speed. That is, by the time a new bus transaction can be shifted into the part, a write operation will be complete. This is explained in more detail in...

L2A1449

Vendor:EMCPackage Cooled:BGAD/C:00+

DISCUSSION OF TILT APPLICATIONS AND RESOLUTION Tilt Applications: One of the most popular applications of the MEMSIC accelerometer product line is in tilt/inclination measurement. An accelerometer uses the force of gravity as an input to determine the inclination angle of an object.

L2A1452/020-137-901

Vendor:EMC2Package Cooled:BGAD/C:02+

Continuous Drain Current, V GS @ 4.5V Continuous Drain Current, V GS @ 4.5V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt ‚ Junction and Storage Temperature Range

L2A1457

Vendor:LSIPackage Cooled:BGA

L2A1462

HR700 Series DC/DC converters are designed to provide full power operation over the input voltage range of 19 to 40 VDC. Operation below an input of 19 volts is possible with derated output power. Outputs are available as 5, 12, and 15 VDC single, dual and triple outputs. The converters typically provide greater than 80% effi- ciency over the entire input range. Line regulation is typically within 0.1% ...

L2A1464

Package Cooled:BGA

L2A1473

The TMS4x100 and TMS4x100P are offered in a 20- / 26-lead plastic surface-mount small-outline ( TSOP) package (DGA suffix) and a 300-mil 20- / 26-lead plastic surface-mount SOJ package (DJ suffix). Both packages are characterized for operation from 0C to 70C.

L2A1492

• Highest sustained bandwidth per DRAM device C 1.6 GB/s sustained data transfer rate C Separate control and data buses for maximized efficiency C Separate row and column control buses for easy scheduling and highest performance C 32 banks: four transactions can take place simultaneously at full bandwidth data rates

L2A1494

Vendor:CISCOPackage Cooled:BGAD/C:00+

The integration time is pre-programmed via the two-wire serial interface and indicated by the EXPOSE signal going HIGH. When the sensor commences, the readout process the FRAME_VALID, ROW_VALID, and DATA signals are output, as shown in Figure 5 on page 5. The master mode row synchronization waveform relationships are as shown in Figure 5 on page 5. The FRAME_VALID signal goes HIGH, indicating the ...

L2A1494

Vendor:CISCOPackage Cooled:BGAD/C:00+

The integration time is pre-programmed via the two-wire serial interface and indicated by the EXPOSE signal going HIGH. When the sensor commences, the readout process the FRAME_VALID, ROW_VALID, and DATA signals are output, as shown in Figure 5 on page 5. The master mode row synchronization waveform relationships are as shown in Figure 5 on page 5. The FRAME_VALID signal goes HIGH, indicating the ...

L2A1498

L2A1502

Vendor:LSIPackage Cooled:BGAD/C:2000

The UPA831TC contains one NE856 and one NE681 NPN high frequency silicon bipolar chip. NEC's new ultra small TC package is ideal for all portable wireless applications where reducing board space is a prime consideration. Each transistor chip is independently mounted and easily configured for oscil- lator/buffer amplifier and other applications.

L2A1509

Vendor:AGILENTPackage Cooled:BGAD/C:08+09+

Please read CAUTION and Notice in this catalog for safety. This catalog has only typical specifications. Therefore you are requested to approve our product specification or to transact the approval sheet for product specification, before your ordering.

L2A1521

L2A153

Package Cooled:06+D/C:800

The HMU16/HMU17 are high speed 16 x 16-bit multipliers designed to perform very fast multiplication of two 16-bit binary numbers. The two 16-bit operands (X and Y) may be independently specified as either two's complement or unsigned magnitude format by the two's complement controls (TCX and TCY). When either of these control lines is LOW, the respective operand is treated as an unsigned 16-bit ...

L2A1537

The products described herein are manufactured under one or more of the following U.S. patents: 5,045,920; 5,264,783; 5,442,283; 5,389,889; 5,581,179; 5,517,112; 5,619,137; 5,621,319; 5,650,719; 5,686,894; 5,694,038; 5,729,130; 5,917,320; and other patents pending.

L2A1539

Package Cooled:06+D/C:800

• Live Insertion and Removal Power Manager • Adjustable Power-on slew rate • Autodetect of Load Open Circuit or -VIN Disconnection • Controlled Time-Delay • Operates from C9 V to External MOSFET Voltage Limit • Fault Indication Output (microprocessor reset). • Board Insertion/Removal Detector Input • Protection During Turn-On • Low frequency Power...

L2A1540

Vendor:LSIPackage Cooled:07+D/C:55

The device can be used as a three-terminal potentio- meter or as a two-terminal variable resistor in a wide variety of applications ranging from control, to signal processing, to parameter adjustment. Digitally- controlled potentiometers provide three powerful appli- cation advantages; (1) the variability and reliability of a solid-state potentiometer, (2) the flexibility of com- puter-based di...

L2A1541

Package Cooled:BGA

L2A1545

L2A1547

Vendor:LSI LOGIC CORPORATIOND/C:05+

ITM-M-SR turns a complete video camera into a component of your product. ITM-M-SR, a CMOS type video camera, is specially designed for the cost sensitive consumer electronics application. ITM-M-SR offers the unique benefits such as a low power consumption, low cost, small size together with consistent image quality.

L2A1553

Vendor:LSI LOGICPackage Cooled:04D/C:4

Acknowledge is a software convention used to provide a positive handshake between the master and slave devices on the bus to indicate the successful receipt of data. The transmitting device, either the master or the slave, will release the SDA bus after transmitting eight bits. The master generates a ninth clock cycle and dur- ing this period the receiver pulls the SDA line LOW to acknowledge that it...

L2A1556

Vendor:NORTENPackage Cooled:BGAD/C:2000

Carrier Detect. This input controls the recovery function of the Receive PLL and can be driven by the carrier detect output from optical modules or from external transition detection circuitry. When this input is at an ECL HIGH, the input data stream (RIN) is recovered normally by the Receive PLL. When this input is at an ECL LOW, the Receive PLL no longer aligns to RIN, but instead aligns with the REFCL...

L2A1556

Vendor:NORTENPackage Cooled:BGAD/C:2000

Carrier Detect. This input controls the recovery function of the Receive PLL and can be driven by the carrier detect output from optical modules or from external transition detection circuitry. When this input is at an ECL HIGH, the input data stream (RIN) is recovered normally by the Receive PLL. When this input is at an ECL LOW, the Receive PLL no longer aligns to RIN, but instead aligns with the REFCL...

L2A1557

Thaler Corporation has developed a nonlinear compensation network of thermistors and resistors that is used in the VRE series voltage references. This proprietary network eliminates most of the nonlinearity in the voltage vs. temperature function. By then adjusting the slope, Thaler Corporation produces a very stable voltage over wide temperature ranges. This network is less than 2% of the overall ...

L2A1557

Thaler Corporation has developed a nonlinear compensation network of thermistors and resistors that is used in the VRE series voltage references. This proprietary network eliminates most of the nonlinearity in the voltage vs. temperature function. By then adjusting the slope, Thaler Corporation produces a very stable voltage over wide temperature ranges. This network is less than 2% of the overall ...

L2A1560

Vendor:CIENAPackage Cooled:BGA

These PIN / Preamplifier combinations are coupled into a custom quantizer IC which provides the final pulse shaping for the logic output and the Signal Detect function. The data output is differential. The signal detect output is single-ended.

L2A1561

Vendor:CIENAPackage Cooled:BGAD/C:N/A

L2A1561

Vendor:CIENAPackage Cooled:BGAD/C:N/A

L2A1571

Vendor:LSIPackage Cooled:BGA

C Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel C Double PWM Generation, Capture/Waveform Mode, Up/Down Capability One Four-channel 16-bit PWM Controller (PWMC) One Two-wire Interface (TWI) C Master Mode Support Only, All Two-wire Atmel EEPROMs Supported One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os IEEE 1149.1 JTAG Boundary Scan on ...

L2A1571

Vendor:LSIPackage Cooled:BGA

C Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel C Double PWM Generation, Capture/Waveform Mode, Up/Down Capability One Four-channel 16-bit PWM Controller (PWMC) One Two-wire Interface (TWI) C Master Mode Support Only, All Two-wire Atmel EEPROMs Supported One 8-channel 10-bit Analog-to-Digital Converter, Four Channels Multiplexed with Digital I/Os IEEE 1149.1 JTAG Boundary Scan on ...

L2A160QEX02

L2A1629

Package Cooled:N/AD/C:08+

L2A1638

Vendor:VITESSEPackage Cooled:N/AD/C:9+

(3) Static Electricity Static electricity or surge voltage damages the BG-LEDs. It is recommended that a wrist band or an anti-electrostatic glove be used when handling the BG-LEDs. All devices, equipment and machinery must be properly grounded. It is recommended that measures be taken against surge voltage to the equipment that mounts the BG-LEDs. When inspecting the final products in which BG-LEDs ...

L2A1659

L2A1668

Vendor:LSIPackage Cooled:50D/C:N/A

2. Short-circuits from the output to VCC can cause excessive heating if VCC > 15V. The maximum output current is approximately 40mA independent of the magnitude of VCC. Destructive dissipation can result from simultaneous short-circuit on all amplifiers.

L2A1706

Package Cooled:LSID/C:BGA

Palladium plating is used on the terminal pins. A pin temperature (Tp) in excess of the solder fusing temperature (+183C for Sn/Pb 63/37) for more than 25 seconds and a peak temperature above 195C, is required to guarantee a reliable solder joint.

L2A1729

CS denotes wire-bond chip-scale ball grid array (BGA) (0.80 mm pitch). FG denotes wire-bond fine-pitch BGA (1.00 mm pitch). FF denotes flip-chip fine-pitch BGA (1.00 mm pitch). BG denotes standard BGA (1.27 mm pitch). BF denotes flip-chip BGA (1.27 mm pitch).

L2A1736

Vendor:CLSCO SYSTEMSPackage Cooled:03D/C:4

The output stage of the MD1810 has separate power connections enabling the output signal L and H levels to be chosen independently from the VDD and VSS supply voltages. As an example, the input logic levels may be 0 and 1.8 volts, the control logic may be powered by +5 and C5 volts, and the output L and H levels may be varied anywhere over the range of C5 to +5 volts. The output stage is capable of peak cur...

L2A1760

This advanced technology has been especially tailored to mini- mize on-state resistance, provide superior switching perfor- mance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high effi- ciency switched mode power supplies, active power factor cor- rection, electronic lamp ballasts based on half bridge topology.

L2A1764

L2A1776

L2A1782

Curve tracers have generally been designed for making measurements on bipolar transistors. While power MOSFETs can be tested satisfactorily on most curve tracers, the controls of these instruments are generally labeled with reference to bipolar transistors, and the procedure to follow in the case of MOSFETs is not immediately obvious. This application note describes methods for measuring HEXFET Power MOSF...

L2A1807

Vendor:SUNPackage Cooled:BGAD/C:01+

L2A1819-002

Vendor:LSILOGICPackage Cooled:TQFP-208D/C:2001

Of course, it is difficult for a microcontroller to make direct measurements when the supply voltage is coming straight off the mains: say, 230V at up to 50A. This makes it necessary to indirectly measure line voltage and current at a level consistent with a micro- controller, then rescale these measurements to arrive at the original value. The best way to do this is to reduce the voltage to a level ...

L2A1845

Vendor:LSIPackage Cooled:50D/C:N/A

L2A1850

Vendor:LSIPackage Cooled:06+D/C:800

The EM39LV040 uses Commands to initiate the memory operation functions. The Commands are written to the device by asserting WE# Low while keeping CE# Low. The address bus is latched on the falling edge of WE# or CE#, whichever occurs last. The data bus is latched on the rising edge of WE# or CE#, whichever occurs first.

L2A1919

Vendor:LSIPackage Cooled:06+D/C:800

Note: Human Body Model ESD test performance for this product was demonstrated to be 1.5 kV during product qualification. Industry standard test method used was IEA/JESD22-A114. Adherence to ESD handling precautionary procedures is advised at all times. All trademarks are the property of their respective owners.

L2A1932G

Vendor:LSIPackage Cooled:N/AD/C:3

If Autovectoring is enabled (AV2EN = 1 in the INTSET-UP register), the FX2LP substitutes its INT2VEC byte. Therefore, if the high byte (page) of a jump-table address is preloaded at location 0x0044, the automatically-inserted INT2VEC byte at 0x0045 will direct the jump to the correct address out of the 27 addresses within the page.

L2A1937

Vendor:LSIPackage Cooled:50D/C:N/A

L2A1943

Vendor:LSIPackage Cooled:BGAD/C:N/A

L2A1944

Vendor:LSIPackage Cooled:BGAD/C:08+09+

L2A1944 is a reflective photosensor with a long focal distance, in which a high efficiency GaAs infrared light emitting diode is used as a light emitting element and a high sensitivity Si phototransistor is used as the light detecting element.

L2A1999

Vendor:LSIPackage Cooled:06+D/C:800

The demodulated chrominance signal and the luminance signal are passed through a programmable output matrix, producing RGB, YUV, or YCBCR. When the clock is at 27MHz, a D1 signal can be produced on the R/V output with the embedded TRS words fixed to the external HSYNC and VSYNC timing.

L2A2018

Vendor:SUNPackage Cooled:BGAD/C:00+

Available in the Texas Instruments NanoStar and NanoFree Packages Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 4 ns at 3.3 V Low Power Consumption, 10-µA Max ICC 24-mA Output Drive at 3.3 V Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 C 2000-V Human-Body Model (A114...

L2A2018

Vendor:SUNPackage Cooled:BGAD/C:00+

Available in the Texas Instruments NanoStar and NanoFree Packages Supports 5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 4 ns at 3.3 V Low Power Consumption, 10-µA Max ICC 24-mA Output Drive at 3.3 V Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 C 2000-V Human-Body Model (A114...

L2A2020

• Compact type • GaAs infrared emitter (950 nm) • Silicon phototransistor detector with daylight-cutoff filter • Easy identification of emitter (clear component package) and transistor (black component package)

L2A20440

Vendor:A/NPackage Cooled:QFND/C:4

where TJ(max) is the maximum allowable junction tempera- ture of the die, which is 125C, and TA is the ambient operat- ing temperature. JA is dependent on the surrounding PC board layout and can be empirically obtained. While the JC (junction-to-case) of the SOT23-5 package is specified at 130C /W, the JA of the minimum PWB footprint will be at least 235C /W. This can be improved upon by providing ...

L2A2044OJ

Vendor:A/NPackage Cooled:QFPD/C:4

1. Be sure to connect the amplifier to 50 Ω RF in/ out cables. 2. No RF power should be applied to the amplifier prior to biasing. 3. Attach VCC1 and VCC2 first; then VREF and VMODE. 4. Turn the VREF supply to +2.85 V. Observe current draw of approximately 5 mA. 5. Turn on the VCC1 and VCC2 supply to +3.5 V. Observe current of ~100 mA from VCC supply. 6. Turn on RF power applying +5 dBm. G...

L2A2044OJ

Vendor:A/NPackage Cooled:QFPD/C:4

1. Be sure to connect the amplifier to 50 Ω RF in/ out cables. 2. No RF power should be applied to the amplifier prior to biasing. 3. Attach VCC1 and VCC2 first; then VREF and VMODE. 4. Turn the VREF supply to +2.85 V. Observe current draw of approximately 5 mA. 5. Turn on the VCC1 and VCC2 supply to +3.5 V. Observe current of ~100 mA from VCC supply. 6. Turn on RF power applying +5 dBm. G...

L2A2048

Vendor:COMPAQPackage Cooled:BGAD/C:08+09+

Settling Time, tS C The time required by the device, after tPO, and after a valid magnetic signal has been applied, to provide proper output transitions. Settling time is a function of magnetic offset, offset polarity, signal phase, signal frequency, and signal amplitude.

L2A2072

The analog input is sampled and tracked on the first 'H' cycle of the external clock and is held from the falling edge of CLK. The output remains valid (output hold time), and the new data becomes valid (output delay time) after the rising edge of CLK, delayed by 2.5 clock cycles. The clock input and output enable input must be driven at CMOS-compatible levels.

L2A2072

The analog input is sampled and tracked on the first 'H' cycle of the external clock and is held from the falling edge of CLK. The output remains valid (output hold time), and the new data becomes valid (output delay time) after the rising edge of CLK, delayed by 2.5 clock cycles. The clock input and output enable input must be driven at CMOS-compatible levels.

L2A2108

Vendor:SUNPackage Cooled:N/AD/C:08+

L2A2113

Vendor:LSILOGICPackage Cooled:BGAD/C:04+

Monitor sense/programmable output 1. The operation of this pin depends on whether the I2C interface is enabled or disabled. This pin has an open-drain output and is only 3.3-V tolerant. An external 5-kΩ pullup resistor connected to VDD is required on this pin. When I2C is disabled (ISEL = low), a low level indicates a powered on receiver is detected at the differential outputs. A high level indicat...

L2A2121

L2A2145

IC. Each display can be directly interfaced with a microprocessor, thus eliminating the need for cumbersome interface com- ponents. The serial IC interface allows higher character count information displays with a minimum of data lines. The easy to read 5x7 pixel format allows the display of upper case, lower case, Katakana, and custom user- defined characters. These displays are stackable ...

L2A2161

Vendor:LSIPackage Cooled:BGA

The DRAIN SENSE input monitors the voltage at the drain of the external power MOSFET switch with respect to VSS. An internal 10µA source pulls the DRAIN SENSE signal towards the 5V reference level. DRAIN SENSE must be held below 2.5V to enable the PG outputs.

L2A2205

Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not supported. (2) Short-circuit to ground, one amplifier per package.

L2A2205-002

Vendor:LSIPackage Cooled:BGAD/C:06+

Phase-Lock Loop Clock Driver for Double Data-Rate Synchronous DRAM Applications Spread Spectrum Clock Compatible Operating Frequency: 60 to 200 MHz Low Jitter (cycCcyc): 75 ps Distributes One Differential Clock Input to Ten Differential Outputs Three-State Outputs When the Input Differential Clocks Are <20 MHz Operates From Dual 2.5-V Supplies 48-Pin TSSOP Package Consumes < 200-µA Quiescent...

L2A2209

L2A2209

L2A2224

Vendor:COMPAQPackage Cooled:BGAD/C:08+09+

Very low VCE(sat) 1.5 V (typ.) Maximum Junction Temperature 175 C Short circuit withstand time C 5µs Designed for : - Frequency Converters - Uninterrupted Power Supply Trench and Fieldstop technology for 600 V applications offers : - very tight parameter distribution - high ruggedness, temperature stable behavior - very high switching speed - low VCE(sat) Positive temperature coefficient...

L2A2244

Vendor:EMC2Package Cooled:BGAD/C:03+

L2A2245

Vendor:EMULEXPackage Cooled:PBGAD/C:03+

L2A2245

Vendor:EMULEXPackage Cooled:PBGAD/C:03+

L2A2254

Vendor:COMPAQPackage Cooled:BGAD/C:08+09+

L2A2254

Vendor:COMPAQPackage Cooled:BGAD/C:08+09+

L2A2368

Vendor:LSIPackage Cooled:08+D/C:1500

PNPN devices designed for high volume, line-powered consumer applications such as relay and lamp drivers, small motor controls, gate drivers for larger thyristors, and sensing and detection circuits. Supplied in an inexpensive plastic TO-226AA package which is readily adaptable for use in automatic insertion equipment.

L2A2397

Vendor:AGIIENTPackage Cooled:BGAD/C:03+

The FPM includes an 8B/10B encoder and decoder, an elasticity buffer for clock skew management, and an FC-AL state machine. The FPM transmits and receives at the full Fibre Channel rate of 106.25 Mbytes/sec. The on-chip frame buffer includes separate areas for received data and transmit data, as well as areas for managing special frames such as command and response. The FPM receive