M24308/2-527

M24308/2-528

M24308/2-529

M24308/25-9

M24308/2-5F

The frequency capture range (2fc) is defined as the frequency range of input signals on which the PLL will lock if it was initially out-of-lock. The frequency lock range (2fL) is defined as the frequency range of input signals on which the loop will stay locked if it was initially in lock. The capture range is smaller or equal to the lock range.

M24308/26-1F

Serial data input; receives serial data from the control device; serial data transmitted to DI is an 16bit control word with the Least Significant Bit (LSB) being transferred first: the input has an active pull down and requires CMOS logic level inputs; DI will accept data on the falling edge of CLK-signal; see Table 1 for input data protocol.

M24308/3-1

M24308/3-1F

M24308/3-3

The bq4847 contains an internal battery and crystal. Through the use of the conditional chip enable output (CEOUT) and battery voltage output (VOUT) pins, the bq4847 can write- protect and make nonvolatile an external SRAM. The backup cell powers the real-time clock and maintains SRAM information in the absence of system voltage.

M24308/3-4

M24308/4-1

This familiy is a 64Mbit dynamic RAM organized 4,194,304 x 16bit configuration with Extented Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode which is useful for the read opera- tion. The advanced circuit and process allow this device to achieve high performance and low power dissi- pation. Features are access time(45ns or 50ns) and refresh cycle(4K ref) and power consumption(Normal o...

M24308/4-1

This familiy is a 64Mbit dynamic RAM organized 4,194,304 x 16bit configuration with Extented Data Out mode CMOS DRAMs. Extended data out mode is a kind of page mode which is useful for the read opera- tion. The advanced circuit and process allow this device to achieve high performance and low power dissi- pation. Features are access time(45ns or 50ns) and refresh cycle(4K ref) and power consumption(Normal o...

M24308/4-12

M24308/4-12F

M24308/4-13

M24308/4-15F

The ERASE instruction erases data at the specified ad- dresses in the programming enable mode. After the ERASE op-code and the specified address have been issued, the data erase is activated by the falling edge of CS. Since the internal auto-timing generator provides all timing signals for the internal erase, so the SK clock is not required. During the internal erase, we can verify the busy/ready status if C...

M24308/4-1F

Vendor:50Package Cooled:AMPD/C:0704

Output Voltage Options: Adjustable, 2.5 V, 3.3 V, 5.0 V 2.0% Output Low < 1.0 µA Sleep Current Low 200 µA Quiescent Current Fixed or Adjustable Output Voltage Active RESET ENABLE 400 mA Output Current Capability Fault Protection ♦ +60 V Peak Transient Voltage ♦ −15 V Reverse Voltage ♦ Short Circuit ♦ Thermal Overload • NCV Prefix for Auto...

M24308/4-2F

M24308/4-3

STMicroelectronics 32-bit, ARM core-based microcontrollers are supported by a complete range of high-end and low-cost development tools to meet the needs of application developers. This extensive line of hardware/software tools includes starter kits and complete development packages all tailored for STs ARM core-based MCUs. The range of development packages includes third-party solutions that come complete...

M24308/4-3F

M24308/4-4

HY57V56820 is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.

M24308/4-4F

Vendor:ITT

† Signaling rate by TIA/EIA-485-A definition restrict transition times to 30% of the bit length, and much higher signaling rates may be achieved without this requirement as displayed in the TYPICAL CHARACTERISTICS of this device. LinBiCMOS and LinASIC are trademarks of Texas Instruments.

M24308/4-4F

Vendor:ITT

† Signaling rate by TIA/EIA-485-A definition restrict transition times to 30% of the bit length, and much higher signaling rates may be achieved without this requirement as displayed in the TYPICAL CHARACTERISTICS of this device. LinBiCMOS and LinASIC are trademarks of Texas Instruments.

M24308/4-5

Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause perma- nent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

M24308/4-5

Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause perma- nent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

M24308/4-5F

On-chip communications peripherals include: USB control- ler, ACCESS.bus, Microwire/Plus, SPI, UART, and Ad- vanced Audio Interface (AAI). Additional on-chip peripherals include DMA controller, PCM/CSVD conversion module, Timing and Watchdog Unit, Versatile Timer Unit, Multi- Function Timer, and Multi-Input Wakeup.

M24308/9-2

M24308-12

M24308-4-4F

M2441

Notes: 1. Propagation Delays and Enable/Disable times are with Vcc = 3.3V 0.3V, normal range. For Vcc = 2.7V, extended range, all Propagation Delays and Enable/Disable times should be degraded by 20%. 2. See test circuit and wave forms. 3. Minimum limits are guaranteed but not tested on Propagation Delays. 4. This parameter is guaranteed but not production tested. 5. Skew between any two outputs, of th...

M24512-RDW6P

Vendor:stPackage Cooled:07+D/C:42000

M24512W6

Vendor:STPackage Cooled:SOP-8大体D/C:04+

s Digital Tuning of Crystal Frequency s PROM for Storing Frequency Correction Information s 12 or 24 Hour Timekeeping Option s Flashing Colon s Two Switches Control All Setting Functions s High Noise Immunity s Internal Power-Up Reset Circuitry

M24512W6

Vendor:STPackage Cooled:SOP-8大体D/C:04+

s Digital Tuning of Crystal Frequency s PROM for Storing Frequency Correction Information s 12 or 24 Hour Timekeeping Option s Flashing Colon s Two Switches Control All Setting Functions s High Noise Immunity s Internal Power-Up Reset Circuitry

M24512-WMW5T

Vendor:ＳＴ

M24512-WMW6/UHA

Vendor:STPackage Cooled:SOPD/C:02+

M24512-WMW6T

Vendor:STMD/C:45?N/A

Seventh Generation HEXFET® power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applic...

M24512-WMW6TG

Vendor:SOP-8Package Cooled:06+D/C:71870

SS/TRACK (Pin 9) - Soft-start and tracking pin. This pin is internally connected to the non-inverting input of the error amplifier during soft-start, and in fact any time the SS/ TRACK pin voltage happens to be below the internal refer- ence voltage. For the basic soft-start function, a capacitor of minimum value 1nF is connected from this pin to ground. To track the rising ramp of another power supplys...

M2-471

M24AP

M24C01

Vendor:STPackage Cooled:08+D/C:1500

eight CAT34AC02 may be individually addressed by the system. The last bit of the slave address specifies whether a Read or Write operation is to be performed. When this bit is set to 1, a Read operation is selected, and when set to 0, a Write operation is selected.

M24C01 6

Vendor:STPackage Cooled:DIP8D/C:0

M24C011

Vendor:STPackage Cooled:SOP8

M24C011

Vendor:STPackage Cooled:SOP8

M24C016

Vendor:STPackage Cooled:01+D/C:SOP8

ISO422 can be used in half duplex, or full duplex data communication bus systems. It is capable of continuously driving a 54Ω load, equivalent to a double-terminated trans- mission line, at the fully specified data rate. When connect- ing to the data bus, the voltage on the A and B input lines must remain between VSB and GNDB. This can be achieved by using a common bus ground connection, such as G...

M24C016

Vendor:STPackage Cooled:01+D/C:SOP8

ISO422 can be used in half duplex, or full duplex data communication bus systems. It is capable of continuously driving a 54Ω load, equivalent to a double-terminated trans- mission line, at the fully specified data rate. When connect- ing to the data bus, the voltage on the A and B input lines must remain between VSB and GNDB. This can be achieved by using a common bus ground connection, such as G...

M24C01-6M

M24C01-BN6(LKSA)

Vendor:STPackage Cooled:DIP-8D/C:01+

M24C01MN1

eight CAT34AC02 may be individually addressed by the system. The last bit of the slave address specifies whether a Read or Write operation is to be performed. When this bit is set to 1, a Read operation is selected, and when set to 0, a Write operation is selected.

M24C01MN3

The M24C01MN3 provides automatic cable equalization and high performance clock and data recovery for serial digital signals. The M24C01MN3 receives either single-ended or differential serial digital data and outputs differential clock and retimed data signals at PECL levels (800mV). The on- board cable equalizer provides up to 35dB of gain at 135MHz which typically results in equalization of greater than 350...

M24C01-MN3T

Vendor:STMPackage Cooled:SOP/8D/C:98+

TRI-STATE is a registered trademark of National Semiconductor Corporation WATCHDOGTM is a trademark of National Semiconductor Corporation Novell is a registered trademark of Novell Inc NetWareTM is a trademark of Novell Inc Unix is a registered trademark of AT T Bell Laboratories Windows and Windows 95 are registered trademarks of Microsoft Corporation Windows NTTM is a trademark of Microsoft Corporation

M24C01MN6

Vendor:sgsPackage Cooled:sgsD/C:dc01

These N-Channel power MOSFETs are manufactured using the innovative UltraFET™ process. This advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in...

M24C01MN6

Vendor:sgsPackage Cooled:sgsD/C:dc01

These N-Channel power MOSFETs are manufactured using the innovative UltraFET™ process. This advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in...

M24C01-MN6

Vendor:SGS THOMSOND/C:05+

SUPPLY VOLTAGE, +VS to CVS OUTPUT CURRENT, continuous within SOA POWER DISSIPATION, continuous @ TC = 25C2 INPUT VOLTAGE, differential INPUT VOLTAGE, common mode TEMPERATURE, pin solder - 10s max TEMPERATURE, junction2 TEMPERATURE, storage OPERATING TEMPERATURE RANGE, case

M24C01-MN6

Vendor:SGS THOMSOND/C:05+

SUPPLY VOLTAGE, +VS to CVS OUTPUT CURRENT, continuous within SOA POWER DISSIPATION, continuous @ TC = 25C2 INPUT VOLTAGE, differential INPUT VOLTAGE, common mode TEMPERATURE, pin solder - 10s max TEMPERATURE, junction2 TEMPERATURE, storage OPERATING TEMPERATURE RANGE, case

M24C01-MN6T/LBA

Vendor:STPackage Cooled:SOP/8D/C:02/P

We constantly strive to improve the quality of all our products and documentation. We have spent a great deal of time to ensure that this document is correct. However, we realize that we may have missed a few things. If you find any information that is missing or appears in error, please:

M24C01-RBN6

Vendor:STPackage Cooled:DIP-8D/C:00

Both pre- and post-radiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison. It should be noted that at a radiation level of 1 x 105 Rads (Si), no change in limits are specified in DC parameters. At a radiation level of 1 x106 Rads (Si), leakage remains low and the device is usable with no change in drive circuitry requi...

M24C01-RDW6T

Vendor:STMPackage Cooled:TSSOP-8D/C:04+

M24C01RMN6

Input Voltage Noise Non-Inverting Input Current Noise Inverting Input Current Noise DC PERFORMANCE(4) Open-Loop Transimpedance Gain (ZOL) Input Offset Voltage Average Offset Voltage Drift Non-Inverting Input Bias Current Average Non-Inverting Input Bias Current Drift Inverting Input Bias Current Average Inverting Input Bias Current Drift INPUT Least Positive Input Voltage(5) Most Positive I...

M24C01RMN6

Input Voltage Noise Non-Inverting Input Current Noise Inverting Input Current Noise DC PERFORMANCE(4) Open-Loop Transimpedance Gain (ZOL) Input Offset Voltage Average Offset Voltage Drift Non-Inverting Input Bias Current Average Non-Inverting Input Bias Current Drift Inverting Input Bias Current Average Inverting Input Bias Current Drift INPUT Least Positive Input Voltage(5) Most Positive I...

M24C01-RMN6

Vendor:STPackage Cooled:00+D/C:SOP-8

M24C01-RMN6T

Vendor:STPackage Cooled:SOP-8D/C:03+

Note 2: These specifications apply for −55˚C TA +125˚C for the LM129 and 0˚C TA +70˚C for the LM329 unless otherwise specified. The maximum junction temperature for an LM129 is 150˚C and LM329 is 100˚C. For operating at elevated temperature, devices in TO-46 package must be derated based on a thermal re- sistance of 440˚C/W junction to ambient or 80˚C/W junct...

M24C01-RMN6T

Vendor:STPackage Cooled:SOP-8D/C:03+

Note 2: These specifications apply for −55˚C TA +125˚C for the LM129 and 0˚C TA +70˚C for the LM329 unless otherwise specified. The maximum junction temperature for an LM129 is 150˚C and LM329 is 100˚C. For operating at elevated temperature, devices in TO-46 package must be derated based on a thermal re- sistance of 440˚C/W junction to ambient or 80˚C/W junct...

M24C01RMNX

For alternating current, such as that from the mains, average power also must account for power factor, which is the phase relationship between voltage and current. In simple terms, average AC power is V I cos, where V and I are average rms voltage and current, and is the phase angle between the two. Instanta- neous sampling does not directly use power factor; the value of the phase angle is essenti...

M24C01T

D/C:08+/09+

Schmitt-trigger inputs ( nVT = 210 mV between positive and negative input transitions) offer improved noise immunity during switching transitions, which is especially useful on analog-mixed mode designs. Schmitt-trigger inputs reject input noise, ensure integrity of output signals, and also allow for slow input signal transition.

M24C01W6

Vendor:STD/C:05+

To Diode Anode. Connected to remote discrete diode-connected transistor junction or to the diode-connected transistor junction on a remote IC whose die temperature is being sensed. A 2.2 nF diode bypass capacitor is required to filter high frequency noise. Place the 2.2 nF capacitor between and as close as possible to the LM89s D+ and D− pins. Make sure the traces to the 2.2 nF capacitor are m...

M24C01WDW6T

The Hynix HY5DU28422A(L)T and HY5DU28822A(L)T and HY5DU281622A(L)T are a 134,217,728-bit CMOS Double Data Rate(DDR) Synchronous DRAM, ideally suited for the main memory applications which requires large memory density and high bandwidth.

M24C01-WDW6TP

Vendor:N/AD/C:08+09+

* The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA for any infringements of patents or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of TOSHIBA or others.

M24C01WMN3

All local logic block outputs are brought back into the GRP so they can be connected to the inputs of any other logic block on the device. The device also has 224 I/O cells, each of which is directly connected to an I/O ball. Each I/O cell can be individually programmed to be a combinatorial input, a registered input, a latched input, an output or a bidirectional I/O with 3-state control. The signal l...

M24C01WMN6

Vendor:STPackage Cooled:SOP-8D/C:05+

The Transition Detector can be turned off by pulling the CD input to a TTL LOW (<0.8V). When CD is pulled to a TTL LOW the LFI will only be driven LOW if the incoming data stream frequency is not within 1000 ppm of the REFCLKX8 frequency. LFI LOW in this case will only indicate that the Receiver PLL is Out of Lock (OOL). When this pin is left unconnected, an internal pull-down resistor will pull thi...

M24C01-WMN6

Vendor:STPackage Cooled:SOPD/C:04+

Packaged in a small, 32-pin TDIP, the functionally complete ADS-944 contains a fast-settling sample-hold amplifier, a subranging (two-pass) A/D converter, an internal reference, timing and control logic, three-state outputs, and error- correction circuitry. Digital input and output levels are TTL.

M24C01-WMN6P

An on-chip 500 MHz oscillator is provided to allow current modula- tion when in the read mode. This is turned on when the EOSC pin is held high (floating not recommended). Complete control of amplitude and frequency is set by two external resistors connected to ground at pins RFREQ and RAMP (see graphs in this data sheet for further explanation).

M24C01-WMN6P

An on-chip 500 MHz oscillator is provided to allow current modula- tion when in the read mode. This is turned on when the EOSC pin is held high (floating not recommended). Complete control of amplitude and frequency is set by two external resistors connected to ground at pins RFREQ and RAMP (see graphs in this data sheet for further explanation).

M24C01-WMN6TR

Vendor:STPackage Cooled:01+D/C:SOP8

M24C02

Vendor:STPackage Cooled:N/AD/C:95+

API8208A is a high quality voice synthesizer capable of varying playback duration. A proprietary ADPCM algorithm is used. The audio message is stored in a 512K bits on-chip EPROM which can store up to 20 seconds of voice data at 6 KHz sample rate.

M24C02 1

Vendor:STPackage Cooled:P3-8D/C:06+

M24C023

Vendor:STPackage Cooled:01+D/C:SOP8

116dB CMRR Independent of Gain Maximum Offset Voltage: 10µV Maximum Offset Voltage Drift: 50nV/C Rail-to-Rail Input Rail-to-Rail Output 2-Resistor Programmable Gain Supply Operation: 2.7V to 5.5V Typical Noise: 2.5µVP-P (0.01Hz to 10Hz) Typical Supply Current: 750µA Available in an MS8 and 3mm 3mm 0.8mm DFN Packages

M24C02AB1

Vendor:STPackage Cooled:DIP8

This axial-lead components packaging requirements use in automatic testing and assembly equipment. And this standard practices for lead-tape packaging of axial-lead components meets the requirements of EIA Standard RS-296-D Lead-taping of Components on Axial Lead Configuration for Automatic Insertion.

M24C02CB1

Vendor:ST

Before registration of a decoded tone pair, the receiver checks for a valid signal duration (referred to as character recognition condition). This check is performed by an external RC time constant driven by ESt. A logic high on ESt causes vc (see Figure 3) to rise as the capacitor discharges. Provided signal condition is maintained (ESt remains high) for the validation period (tGTP), vc reaches the threshold...

M24C02MN1

The SK-2900 Series of quartz crystal oscillators provide DPECL Fast Edge compatible signals. This device is to operate using positive voltage and uses multiple ground pins for improved signal integrity. This device is intended to operate on positive voltage for PECL applications.

M24C02MN3

The Hynix HYM71V16M655B(L)T6 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 128Mbytes memory. The Hynix HYM71V16M655B(L)T6 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

M24C02-MN3

Vendor:STPackage Cooled:SOP-8D/C:99

When valid data on the TX pins detected, the jabber timer is started. If there is valid data for more than 20 ns, a latch is set which disables the transmitter output and enables the 10 MHz output on the CD pins. The latch is reset within 0.5 seconds after the valid data is removed from the transmitter input (TX). This action resets the jabber timer and disables the 10 MHz CD output. The TX inputs m...

M24C02-MN3T

Vendor:STMPackage Cooled:SOP/8D/C:01+

Chapter 6, "SAM88RCRI Instruction Set," describes the features and conventions of the instruction set used for all S3C9-series microcontrollers. Several summary tables are presented for orientation and reference. Detailed descriptions of each ins truction are presented in a standard format. Each instruction description includes one or more practical examples of how to use the instruction when writin...

M24C02-MN3T

Vendor:STMPackage Cooled:SOP/8D/C:01+

Chapter 6, "SAM88RCRI Instruction Set," describes the features and conventions of the instruction set used for all S3C9-series microcontrollers. Several summary tables are presented for orientation and reference. Detailed descriptions of each ins truction are presented in a standard format. Each instruction description includes one or more practical examples of how to use the instruction when writin...

M24C02MN6

In general, a higher operating frequency decreases the peak ripple current flowing in the output inductor, thus allowing the use of a smaller inductor value. operation at higher fre- quencies also decreases the amount of energy storage that must be provided by the bulk output capacitors during load transients.

M24C02-MN6

Vendor:SGS THOMSOND/C:05+

nous static RAM designed to provide a burstable, high- performance, secondary cache for the i486™, Pentium™, 680X0™, and PowerPC™ microprocessors. It is organized as 65,536 words by 36 bits, fabricated with ISSI's advanced CMOS technology. The device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit. All sy...

M24C02MN6T

Vendor:sgsPackage Cooled:sgsD/C:dc04

• Plastic package has Underwriters Laboratory Flammability Classification 94 V-0 • Metal silicon junction, majority carrier conduction • Low forward voltage drop, low power loss and high efficiency • Guardring for overvoltage protection • For use in low voltage, high frequency inverters, free wheeling, and polarity protection applications • High temperature solde...

M24C02-MV6T

Vendor:-Package Cooled:DIP/SMDD/C:04+05+

The HYM72V12C736B(L)S4 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 1Gbytes memory. The HYM72V12C736B(L)S4 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and out- puts are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

M24C02-RBN6

Vendor:STPackage Cooled:DIP-8D/C:99+

Addresses are generated for the burst access as shown below, The starting point of the burst sequence is provided by the external address. The burst address counter wraps around to its initial state upon completion. The burst sequence is determined by the state of the LBO pin. When this pin is Low, linear burst sequence is selected. When this pin is High, Interleaved burst sequence is selected.

M24C02-RDW6T

Vendor:STMicroelectronicsPackage Cooled:TSSOPD/C:2004

To integrate so many transistors on a piece of silicon, their physical geometry has been reduced to the sub-micron level. As a result of each geometry reduction, the corresponding operational voltage for each transistor has also been reduced. This changing CPU voltage demands the design of a pro- grammable power supplyCa design that is not completely re-engineered with every change in CPU voltage.

M24C02-RDW6T

Vendor:STMicroelectronicsPackage Cooled:TSSOPD/C:2004

To integrate so many transistors on a piece of silicon, their physical geometry has been reduced to the sub-micron level. As a result of each geometry reduction, the corresponding operational voltage for each transistor has also been reduced. This changing CPU voltage demands the design of a pro- grammable power supplyCa design that is not completely re-engineered with every change in CPU voltage.

M24C02-RDW6TP

Vendor:ST MICROELECTRONICS SEMID/C:05+

The XC6204 series are highly precise, low noise, positive voltage LDO regulators manufactured using CMOS processes. The series achieves high ripple rejection and low dropout and consists of a standard voltage source, an error correction, current limiter and a phase compensation circuit plus a driver transistor. Output voltage is selectable in 50mV increments within a range of 1.8V ~ 6.0V. The series i...

M24C02-RDW6TP

Vendor:ST MICROELECTRONICS SEMID/C:05+

The XC6204 series are highly precise, low noise, positive voltage LDO regulators manufactured using CMOS processes. The series achieves high ripple rejection and low dropout and consists of a standard voltage source, an error correction, current limiter and a phase compensation circuit plus a driver transistor. Output voltage is selectable in 50mV increments within a range of 1.8V ~ 6.0V. The series i...

M24C02RMN6

applied to the RESET pin while PWM inputs In1,...IN6 are held high (off condition). The FAULT condition can also be set by the controller through an active high signal on the STOP pin. After power-up, the RESET pin must be pulled low before any input signals are activated. The protection circuitry will set a FAULT for short-circuit, earth-fault, over-temperature, or over-voltage conditions as specified...

M24C02-RMN6

Vendor:STPackage Cooled:SOP8D/C:02+

) Valid for one branch C Gltig fr einen Brckenzweig ) Valid, if leads are kept at ambient temperature at a distance of 5 mm from case Gltig, wenn die Anschlußdrähte in 5 mm Abstand vom Gehäuse auf Umgebungstemperatur gehalten werden 11.02.2003

M24C02-RMN6

Vendor:STPackage Cooled:SOP8D/C:02+

) Valid for one branch C Gltig fr einen Brckenzweig ) Valid, if leads are kept at ambient temperature at a distance of 5 mm from case Gltig, wenn die Anschlußdrähte in 5 mm Abstand vom Gehäuse auf Umgebungstemperatur gehalten werden 11.02.2003

M24C02WBN6P

Vendor:STPackage Cooled:DIP8D/C:05+ROHS

Every device in the family has a JTAG Port with internal Logic Analyzer (ispTRACY) capability. The sysCONFIG™ port which allows for serial or parallel device configuration. The LatticeECP/EC devices use 1.2V as their core volt- age.

M24C02WDW

Enhanced Parallel Port (EPP) Compatible - EPP 1.7 and EPP 1.9 (IEEE 1284 Compliant) IEEE 1284 Compliant Enhanced Capabilities Port (ECP) ChiProtect Circuitry for Protection Against Damage Due to Printer Power-On 480 Address, Up to 15 IRQ and Three DMA Options

M24C02WDW6

Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

M24C02-WDW6T

Vendor:ST MICROELECTRONICS SEMID/C:05+

• Power-on Reset (POR) • Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) • Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation • Programmable code protection • Power saving SLEEP mode • Selectable oscillator options • In-Circuit Serial Programming (ICSP) via two pins

M24C02-WDW6T/K9B

Vendor:MITPackage Cooled:SSOP-8

1. Frequency tolerance (often called Calibration Accuracy). This is the allowable frequency error from a specified center frequency of the crystal at 25 c. This parameter is specified with a maximum and minimum frequency deviation, expressed in percent (%) or parts per million (ppm). It is typically +/-20ppm for IC VCXO crystal designs. The source of this error term is principally variation in the ma...