M27C400112F1

Vendor:STD/C:03+

formation regarding media compatibility in your application. Figure 4 shows a typical decoupling circuit for interfacing the integrated sensor to the A/D input of a microprocessor. Proper decoupling of the power supply is recommended. Figure 2 shows the sensor output signal relative to pres- sure input. Typical, minimum, and maximum output curves are shown for operation over a temperature range of 0 ...

M27C4001-12F1+

Vendor:STPackage Cooled:DIPD/C:0050+

M27C4001-12F6L

Vendor:STPackage Cooled:EPROM 4M 32DIPD/C:N/A

The HSMx-C150 has the industry standard 3.2 x 1.6 mm footprint that is excellent for all around use. The HSMx-C170 has the widely used 2.0 x 1.25 mm footprint. The HSMx-C190 has the industry standard 1.6 x 0.8 mm footprint, its low 0.8 mm profile and wide viewing angle make this LED exceptional for backlighting applications.

M27C4001-12FG

Vendor:STPackage Cooled:DIP32D/C:03+

Protect Register Disable (PRDS) The PRDS instruction is a ONE TIME ONLY instruction which renders the Protect Register unalterable in the future Therefore the specified registers become PERMANENTLY protected against data changes As in the PRWRITE in- struction the PRE and PE pins must be held high while loading the instruction and after loading the PRDS instruc- tion the PRE and PE pins become dont care...

M27C400112FI

This pin can be connected to either VSS, VCC or left floating. An internal pull-down resistor on this pin will keep the device in the unprotected state if left floating. If tied to VSS or left floating, normal memory operation is enabled (read/write the entire memory 0000-3FFF).

M27C4001-12FI

Vendor:STD/C:99+

Compensation Input. Connect a 0.1µF ceramic capacitor (CCOMP) from COMP to GND. CCOMP stabilizes the converter, controls soft-start, and lowpass filters direct PWM dimming at CTRL. CCOMP discharges to 0V through an internal 20kΩ resistor in shutdown.

M27C4001-12FI

Vendor:STD/C:99+

Compensation Input. Connect a 0.1µF ceramic capacitor (CCOMP) from COMP to GND. CCOMP stabilizes the converter, controls soft-start, and lowpass filters direct PWM dimming at CTRL. CCOMP discharges to 0V through an internal 20kΩ resistor in shutdown.

M27C4001-15F6

Vendor:105Package Cooled:STD/C:N/A

C 2.7 (VCC = 2.7V to 5.5V) C 1.8 (VCC = 1.8V to 5.5V) Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) Two-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 100 kHz (1.8V) and 400 kHz (2.7V, 5V) Compatibility Write Protect Pin for Hardware Data Protection 8-byte Page (1K, 2K), 16-byte Page (4K, 8...

M27C4001-35XFI

Vendor:ＳＴPackage Cooled:DIPD/C:02++

M27C400145XF1

Vendor:STD/C:03+

Typical Operating Current:11 mA at 3V Typical Power-down Current: 1 A Temperature Ranges: Commercial (0C to +70C), Industrial (-40C to +85C) Option: Extended Range (-55C to +125C) Packages: PDIL 40, PLCC 44 and VQFP 44, CDIL 40 and CQPJ 44 with Window Options: Known Good Dice and Ceramic Packages

M27C4001-55C1

Vendor:STPackage Cooled:PLCC-32D/C:4

HIGH SPEED: tPD = 5.3ns (TYP.) at VCC = 3.3 V COMPATIBLE WITH TTL OUTPUTS LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25C LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V 75Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RA...

M27C4001-55XF1

Vendor:STPackage Cooled:EPROM 4M 32DIPD/C:N/A

4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the conditions specified for subgroup testing in VIa (JANS) of 19500 and 4.4.2.1 herein. Electrical measurements (end-points) requirements shall be in accordance with group A, subgroup 2 herein. Delta requirements shall be in accordance with 4.5.6 herein. See 4.4.2.2 herein for JAN, JANTX, and JANTXV group B testing. Electr...

M27C4001-70C6

Vendor:ST MICROELECTRONICS SEMID/C:05+

A differential analog voltage input allows increased common-mode rejection and offset of the zero-input analog voltage value. Although a reference input (REF/2) is available to allow 8-bit conversion over smaller analog voltage spans or to make use of an external reference, ratiometric conversion is possible with the REF/2 input open. Without an external reference, the conversion takes place over a span f...

M27C4001-70XF1

Vendor:STPackage Cooled:EPROM 4M 32DIPD/C:N/A

Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout 3.3V, 5V, and 15V logic input compatible Matched propagation delay for both channels Outputs in phase with inputs (IR2101) or out of phase with inputs (IR2102)

M27C4001-8081

Vendor:STPackage Cooled:DIPD/C:06+

(13) Interrupts: 14 sources, 10 vectors 1) Three priority (low, high and highest) multiple interrupts are supported. During interrupt handling, an equal or lower priority interrupt request is postponed. 2) If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes precedence. In the case of equal priority levels, the vector with the lowest address takes ...

M27C4001-80F1

Vendor:STPackage Cooled:EPROM 4M 32DIPD/C:N/A

The MT88L70 monolithic DTMF receiver offers small size, low power consumption and high performance, with 3 volt operation. Its architecture consists of a bandsplit filter section, which separates the high and low group tones, followed by a digital counting section which verifies the frequency and duration of the received tones before passing the corresponding code to the output bus.

M27C4001-80XF6

Vendor:STPackage Cooled:EPROM 4M 32DIPD/C:N/A

Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the opera- tional sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

M27C400190C1

Loop enable. When LOOPEN is high (active), the internal loop-back path is activated. The transmitted serial data is directly routed to the inputs of the receiver. This provides a self-test capability in conjunction with the protocol device. The DOUT_TXP and DOUT_TXN outputs are held static during the loop-back test. LOOPEN is held low during standard operational state with external serial outputs and in...

M27C4001-90C6

Vendor:STPackage Cooled:PLCC/32D/C:03/0

1. No purposefully added lead. 2. Part mounted on FR-4 board with recommended pad layout, which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf. 3. Short duration pulse test used so as to minimize self-heating effect.

M27C4001-90F1

Vendor:STPackage Cooled:EPROM 4M 32DIPD/C:00+

Parameter VDD to GND VA, VB, VW to GND Maximum Current IWB, IWA Pulsed IWB Continuous (RWB 1 kΩ, A open)1 IWA Continuous (RWA 1 kΩ, B open)1 Digital Inputs and Output Voltage to GND Operating Temperature Range Maximum Junction Temperature (TJ max) Storage Temperature Lead Temperature (Soldering, 10 sec) Vapor Phase (60 sec) Infrared (15 sec) Thermal Resistance2 JA

M27C4002-100F1

Vendor:STPackage Cooled:EPROM 4M 40DIPD/C:N/A

The MX93000 Special Codec is especially powerful when applied to some DAM models which are intended to meet different countries' specifications in the same system hardware. User can achieve this goal by simply setting control firmware. This benifit will help DAM system makers to save developing time and R/D resources.

M27C4002-100F1

Vendor:STPackage Cooled:EPROM 4M 40DIPD/C:N/A

The MX93000 Special Codec is especially powerful when applied to some DAM models which are intended to meet different countries' specifications in the same system hardware. User can achieve this goal by simply setting control firmware. This benifit will help DAM system makers to save developing time and R/D resources.

M27C4002-10C1B

Vendor:STPackage Cooled:95D/C:450

Output Drive Capability: 15 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7A • Chip Complexity: 136 FETs or 34 Equivalent Gates

M27C400210F1

Vendor:availPackage Cooled:STD/C:00+

Disclaimer Alcor Micro Corp. reserves the right to change this product without prior notice. Alcor Micro Corp. makes no warranty for the use of its products and bears no responsibility for any error that appear in this document. Specifications are subject to change without prior notice.

M27C4002-10F1(E

Vendor:STPackage Cooled:08+D/C:180

M27C4002-10F1L

Vendor:DIP40Package Cooled:96D/C:ST

External Access enable: EA must be externally held low to enable the device to fetch code from external program memory locations 0000H to FFFFH. If EA is held high, the device executes from internal program memory unless the program counter contains an address greater than internal ROM seze.

M27C4002-10F6

Vendor:ST MICROELECTRONICS SEMID/C:05+

The second step is to load byte address and byte data. During the Byte Program operation, the addresses are latched on the falling edge of either CE# or WE#, whichever occurs last; and the data is latched on the rising edge of either CE# or WE#, whichever occurs first.

M27C4002-10FI

Vendor:STPackage Cooled:NEW PARTD/C:96

The FS612509 is a zero-delay buffer intended for use on buffered PC133 SDRAM DIMMs. The FS612509 precisely aligns the frequency and phase of the output clocks to the input CLK by use of an on-chip phase-lock loop (PLL). The PLL generates up to 9 low- skew, low-jitter copies of the CLK, with the outputs ad- justed for 50% duty cycle. The FBOUT clock must be hardwired to the FBIN pin to complete the loop. The...

M27C4002-120F1

Vendor:STPackage Cooled:CDIP-40D/C:98+

Auxiliary receive filter output. The output signal is inverted with respect to the VFO output with a gain of 1. The output signal swings above and below the SG voltage (VDD/2), and can drive a minimum load of 0.5 kW with respect to the SG voltage. The output can be mute controlled externally. During power saving and power down, AUXO outputs the SG voltage (VDD/2) in the high impedance state.

M27C4002-12C6

Vendor:STPackage Cooled:PLCC

Note: Stresses greater than those listed under MAXIMUM RAT- INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for ex- tended periods may affect reliability.

M27C4002-12C6

Vendor:STPackage Cooled:PLCC

Note: Stresses greater than those listed under MAXIMUM RAT- INGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for ex- tended periods may affect reliability.

M27C400212F1

Vendor:availPackage Cooled:STD/C:04+

The switch-over mode time enables the synchronous operation of microcontroller and watchdog. When the power-up reset time has elapsed, the watchdog has to be switched to monitoring mode by the microcontroller by a low signal transmitted to the mode pin (pin 12) within the time-out period, t1. If the low signal does not occur within t1, (see Fig- ure 4) the watchdog generates a reset pulse, t 6 , and the t...

M27C4002-12F1

Vendor:105Package Cooled:STD/C:N/A

In addition to the programmable 1024-bits of memory, are 64 bits of status information contained in the EPROM STATUS memory. The STATUS memory is accessible with separate commands. The STATUS bits are EPROM and are read or programmed to indicate various conditions to the software interrogating the bq2022. The first byte of the STATUS memory contains the write protect page bits, that inhibit programming of...

M27C4002-12F6

Vendor:STPackage Cooled:04+D/C:DIP

M27C4002-15C6

Vendor:ST

The transceiver can also replace parallel data transmission architectures by providing a reduction in the number of traces, connector pins, and transmit/receive pins. Parallel data loaded into the transmitter is delivered to the receiver over a serial channel, which can be a coaxial copper cable, a controlled impedance backplane, or an optical link. The data is then reconstructed into its original paralle...

M27C400215F1

Vendor:sgsPackage Cooled:sgsD/C:dc02

The on-chip status register allows the progress of various operations to be monitored. The status register is interrogated by entering a read-status-register command into the CSM (cycle 1) and reading the register data on I/O pins DQ0 C DQ7 (cycle 2). Status-register bits SB0 through SB7 correspond to DQ0 through DQ7.

M27C4002-15F1

Vendor:ST MICROELECTRONICS SEMID/C:05+

n 832 Mbps LVDS 16-bit serializer and deserializer interface Suitable for cable, printed circuit board, and backplane transmission paths 10m cable at max LVDS data rate and greater than 16m at min LVDS data rate Embedded clock with random data lock capability for clock recovery PRBS (x31 + x28 + 1) based LVDS link BER test facility

M27C400215F1PULLS

Vendor:sgsPackage Cooled:sgsD/C:dc00

To interpolate, the chip accepts incoming data on alternate clock cycles, inserting zeroes on the remaining clock cycles. In decimation mode, the chips output register is strobed at half the clock rate. In bypass and equal-rate filter modes, these input zero insertion and output register hold functions are disabled.

M27C4002-15FI

The device is always in the Software Data Protected mode for all Write operations Write operations are controlled by toggling WE# or CE#. The falling edge of WE# or CE#, whichever occurs last, latches the address. The rising edge of WE# or CE#, whichever occurs first, latches the data and initiates the Erase or Program cycle.

M27C4002-15XF1

M27C40021CI

Package Cooled:00+

The U6209B is controlled via a 2-wire I2C bus format by feeding data and clock signals into the SDA and SCL lines respectively. The table I2CCBUS DATA FORMAT describes the format of the data and shows how to select the device address by applying a voltage at pin 10. When the correct address byte has been received, the SDA line is pulled low by the device during the acknowledge period, and then also dur...

M27C4002-45F1

Vendor:300

The microphone input transfers its signal to the on-chip preamplifier. An on-chip Automatic Gain Control (AGC) circuit controls the gain of this preamplifier from -15 to 24 dB. An external micro- phone should be AC coupled to this pin via a series capacitor. The capacitor value, together with the internal 10 Kohm resistance on this pin, determines the low-frequency cutoff for the ISD1000A Series passband. S...

M27C4002-45F1

Vendor:300

The microphone input transfers its signal to the on-chip preamplifier. An on-chip Automatic Gain Control (AGC) circuit controls the gain of this preamplifier from -15 to 24 dB. An external micro- phone should be AC coupled to this pin via a series capacitor. The capacitor value, together with the internal 10 Kohm resistance on this pin, determines the low-frequency cutoff for the ISD1000A Series passband. S...

M27C400280XF1

DESCRIPTION The HCF4069UB is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4069UB consists of six COS/MOS inverter circuits. This device is intended for all

M27C4002-80XFI

Vendor:STPackage Cooled:DIP陶瓷D/C:96+

The EP7211 is designed for ultra-low-power applica- tions such as organizers/PDAs, two-way pagers, smart cellular phones, and industrial hand-held infor- mation appliances. The core-logic functionality of the device is built around an ARM720T processor with 8 kbytes of four-way set-associative unified cache and a write buffer. Incorporated into the ARM720T is an enhanced memory management unit (MMU),...

M27C4007

M27C401AZB

Vendor:OKIPackage Cooled:04+D/C:TSOP

Temperature data is converted from the on-chip thermal sensing element and translated into a fractional fan speed from 40% to 100%. A temperature selection guide in the data sheet is used to choose the low and high temperature limits to control the fan. The TC650/TC651 also include a single trip point over temperature alert (TOVER) that eliminates the need for additional temperature sensors. In addit...

M27C401AZB

Vendor:OKIPackage Cooled:04+D/C:TSOP

Temperature data is converted from the on-chip thermal sensing element and translated into a fractional fan speed from 40% to 100%. A temperature selection guide in the data sheet is used to choose the low and high temperature limits to control the fan. The TC650/TC651 also include a single trip point over temperature alert (TOVER) that eliminates the need for additional temperature sensors. In addit...

M27C401C2

Vendor:OKIPackage Cooled:DIP

Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 25mH, IAS = 8.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25C 3. ISD 8.0A, di/dt 200A/µs, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature

M27C402CZ

Vendor:OKIPackage Cooled:DIPD/C:2005+

Notes: 5. LL disables outputs if TEST = MID and sOE# = HIGH. 6. When 4Q[0:1] are set to run inverted (HH mode), sOE# disables these outputs HIGH when PE = HIGH or MID, sOE# disables them LOW when PE = LOW. 7. These outputs are undivided copies of the VCO clock. Therefore, the formulas in this column can be used to calculate the VCO operating frequency (FNOM) at a given reference frequency (FREF) and div...

M27C402CZ

Vendor:OKIPackage Cooled:DIPD/C:2005+

Notes: 5. LL disables outputs if TEST = MID and sOE# = HIGH. 6. When 4Q[0:1] are set to run inverted (HH mode), sOE# disables these outputs HIGH when PE = HIGH or MID, sOE# disables them LOW when PE = LOW. 7. These outputs are undivided copies of the VCO clock. Therefore, the formulas in this column can be used to calculate the VCO operating frequency (FNOM) at a given reference frequency (FREF) and div...

M27C402ZB

Vendor:OKIPackage Cooled:SOPD/C:N/A

W r it e E n a b le , a c t iv e L o w. Co nt r o ls w r it ing o f c o mma nd s o r c o mma nd sequences in order to program data or erase sectors of the memory array. A write operation takes place when WE# is asserted while CE# is Low and OE# is High. BY TE# determines whether a byte or a word is written during the write operation.

M27C402ZB

Vendor:OKIPackage Cooled:96+D/C:N/A

W r it e E n a b le , a c t iv e L o w. Co nt r o ls w r it ing o f c o mma nd s o r c o mma nd sequences in order to program data or erase sectors of the memory array. A write operation takes place when WE# is asserted while CE# is Low and OE# is High. BY TE# determines whether a byte or a word is written during the write operation.

M27C4096-10F1

Vendor:STPackage Cooled:EPROM 4M 40DIPD/C:N/A

The W83877ATF provides two high-speed serial communication ports (UARTs), one of which supports serial Infrared communication. Each UART includes a 16-byte send/receive FIFO, a programmable baud rate generator, complete modem control capability, and a processor interrupt system. One of the UARTs supporting infrared (IR) includes 32-byte FIFO, serial IR, 1.152M bps MIR, 0.576M bps, 4M bps FIR, and TV remote ...

M27C4096-12F1

Vendor:STPackage Cooled:EPROM 4M 40DIPD/C:N/A

Inside 5B45 & 5B46 Modules C The 5B45/46 internal circuitry compares the input signal to the user-selected threshold (VT) and hysteresis (VH). Signals of virtually any wave shape that exceed the combined threshold and hystersis levels (VT +VH)will trigger a comparator at a rate determined by the input frequency. The comparator output is then transmitted across a proprietary transformer-coupled iso...

M27C4096DC-12

Vendor:N/APackage Cooled:N/AD/C:08+09+

Collector-Emitter Cutoff Current VCE = 50 Vdc VCE = 75 Vdc Collector-Emitter Cutoff Current VCE = 120 Vdc, VBE = -1.5 Vdc VCE = 180 Vdc, VBE = -1.5 Vdc Emitter-Base Cutoff Current VEB = 6.0 Vdc Collector-Base Cutoff Current VCB = 120 Vdc VCB = 180 Vdc

M27C4096DC-12

Vendor:N/APackage Cooled:N/AD/C:08+09+

Collector-Emitter Cutoff Current VCE = 50 Vdc VCE = 75 Vdc Collector-Emitter Cutoff Current VCE = 120 Vdc, VBE = -1.5 Vdc VCE = 180 Vdc, VBE = -1.5 Vdc Emitter-Base Cutoff Current VEB = 6.0 Vdc Collector-Base Cutoff Current VCB = 120 Vdc VCB = 180 Vdc

M27C40ICZ

Vendor:OKIPackage Cooled:DIPD/C:00+

7) Optional: Another method of determining gain is by using a network analyzer. This has the advantage of displaying gain vs. a swept frequency band, in addi- tion to displaying input and output return loss. Refer to the user manual of the network analyzer for setup details.

M27C4160-90F1

M27C452CZ

Vendor:OKIPackage Cooled:DIP40D/C:04+

M27C452CZ

Vendor:OKIPackage Cooled:DIP40D/C:04+

M27C512-10/12F1

Vendor:STPackage Cooled:DIP

M27C512-10C1

Vendor:STPackage Cooled:PLCC-32D/C:3

Protection features of this controller IC include a set of sophisticated overvoltage and overcurrent protection. Overvoltage results in the converter turning the lower MOSFETs ON to clamp the rising output voltage and protect the load. An OVP output is also provided to drive an optional crowbar device. The overcurrent protection level is set through a single external resistor. Other protection features inclu...

M27C512-10C6

NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. V...

M27C512-10C6TR

Vendor:ＳＴ

M27C512-10E1

M27C51210F1

Available in the Texas Instruments NanoStar and NanoFree Packages Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation Ioff Supports Partial-Power-Down Mode Operation Sub 1-V Operable Max tpd of 1.7 ns at 1.8 V Low Power Consumption, 10-µA Max ICC 8-mA Output Drive at 1.8 V Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Pro...

M27C512-10F1(NOPB)

M27C512-10F1L

Vendor:STPackage Cooled:DIP

Reference Inputs The voltage differential between the VL and VH inputs sets the full-scale output voltage range. VL must be equal to or greater than ground (i.e. a positive voltage). VH must be greater than VL and less than or equal to VDD. See table on page 3 for guaranteed operating limits.

M27C512-10F6

Vendor:STPackage Cooled:DIPD/C:08+

W83877TF is made to fully comply with MicrosoftTM PC97 Hardware Design Guide. IRQs, DMAs, and I/O space resources are flexible to adjust to meet ISA PnP requirement. Moreover W83877TF is made to meet the specification of PC97's requirement in the power management: ACPI and DPM (Device Power Management).

M27C512-10F6

Vendor:STPackage Cooled:DIPD/C:08+

W83877TF is made to fully comply with MicrosoftTM PC97 Hardware Design Guide. IRQs, DMAs, and I/O space resources are flexible to adjust to meet ISA PnP requirement. Moreover W83877TF is made to meet the specification of PC97's requirement in the power management: ACPI and DPM (Device Power Management).

M27C512-10FI

Vendor:STPackage Cooled:DIP-28D/C:00+

M27C512-10FI

Vendor:STPackage Cooled:DIP-28D/C:00+

M27C512-12

Vendor:STPackage Cooled:5438

The MAX3873A is implemented in Maxim's second-generation SiGe process and consumes only 260mW at 3.3V supply (output clock disabled, low output swing). The device is available in a 4mm x 4mm 20-pin QFN exposed-pad package and operates from -40C to +85C.

M27C512-12

Vendor:STPackage Cooled:5438

The MAX3873A is implemented in Maxim's second-generation SiGe process and consumes only 260mW at 3.3V supply (output clock disabled, low output swing). The device is available in a 4mm x 4mm 20-pin QFN exposed-pad package and operates from -40C to +85C.

M27C512-12BI

H3 The third harmonic should be the dominant harmonic and is primarily affected by output load current which, of course, is unavoidable. However, this should encourage the user not to waste current in the gain setting resistors, and to use val- ues that consume only a small proportion of the load current, so long as peaking does not occur. The more load current, the worse the distortion, but depending o...

M27C512-12C1DA

Vendor:STPackage Cooled:PLCC/32D/C:97+

M27C512-12C1TR

Vendor:STPackage Cooled:0012+D/C:00+

The MMUs support multiprocessing, virtual memory systems by translating logical addresses to physical addresses using translation tables stored in memory. The MMUs store recently used address mappings in two separate ATCs-on-chip. When an ATC contains the physical address for a bus cycle requested by the processor, a translation table search is avoided and the physical address is supplied immediately, incu...

M27C51212C6K

Vendor:sgsPackage Cooled:sgsD/C:dc00

This DAC uses a double-buffered 3-wire serial interface that is compatible with SPI™, QSPI, MICROWIRE™, and most DSP interface standards. In addition, a serial data out pin (SDO) allows for daisy-chaining when multiple packages are used. Data readback allows the user to read the contents of the DAC register via the SDO pin. On power-up, the internal shift register and latches are filled w...

M27C51212F1

Vendor:TOSD/C:03+

The CMX866 has the capability to generate single or dual user-defined tones. Four transmit tone pairs are provided in the CMX866 for programmable tone generation; TA, TB, TC, and TD. Information corresponding to the desired frequency and amplitude must be supplied for each tone of each desired tone pair, so frequency and amplitude information for eight different tones can be loaded into the CMX866. Formulas ...

M27C512-12F1LN

Vendor:STPackage Cooled:DIP-28D/C:07+

The crystal is the frequency reference of the VCXO and the overall performance of the circuit depends on the characteristics of it. It is important that the crystal meets all required specifications if the VCXO is expected to work reliably. ICS works with crystal vendors to define, build, and certify crystals that meet these requirements, and the crystal vendors maintain an inventory of these devices...

M27C512-12F3

Vendor:STPackage Cooled:DIP

The AC ACT843 consists of nine D-type latches with TRI-STATE outputs The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH This allows asyn- chronous operation as the output transition follows the data in transition On the LE HIGH-to-LOW transition the data that meets the setup times is latched Data appears on the bus when the Output Enable (OE) is LOW When OE is HIGH the bus ou...

M27C512-12F6

Vendor:STPackage Cooled:CDIPD/C:00+

FEATURES PIN COMPATABLE Upgrade to ADuC812/ADuC832 INCREASED PERFORMANCE Single Cycle 16MIPS 8052 core High Speed 400kSPS 12-Bit ADC INCREASED MEMORY 62Kbytes On-Chip Flash/EE Program Memory 4KBytes On-Chip Flash/EE Data Memory In circuit re-programmable Flash/EE, 100 Yr Retention, 100 Kcycles Endurance 2304 Bytes On-Chip Data RAM SMALLER PACKAGE Available in 8mm x 8mm Chip Scale Package Al...

M27C512-12FI

Vendor:STPackage Cooled:DIP28D/C:9823+

Case: GSIB-3G Epoxy meets UL-94V-0 Flammability rating Terminals: Matte tin plated (E3 Suffix) leads, solder- able per J-STD-002B and MIL-STD-750, Method 2026 Polarity: As marked on body Mounting Torque: 10 cm-kg (8.8 inches-lbs) max. Recommended Torque: 5.7 cm-kg (5 inches-lbs)

M27C512-12T-1

Vendor:STPackage Cooled:DIP

M27C512-15

The SY88713V low-power limiting post amplifier is designed for use in fiber optic receivers. The device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88713V quantizes these signals and outputs PECL level waveforms.

M27C512-150F6

Vendor:STPackage Cooled:EPROM 512K 28DIPD/C:N/A

Functional improvements have also been implemented in this family. The UC3825 shutdown comparator is now a high-speed overcurrent comparator with a threshold of 1.2 V. The overcurrent comparator sets a latch that ensures full discharge of the soft-start capacitor before allowing a restart. While the fault latch is set, the outputs are in the low state. In the event of continuous faults, the soft-start cap...

M27C512-15B6

Vendor:STPackage Cooled:DIP-28D/C:06+

The 3K bytes of static RAM are used for temporary storage of data and for the program stack and interrupt stack. Read and write operations can be byte-wide or word-wide, depend- ing on the instruction executed by the CPU. Each memory access requires one clock cycle; no wait cycles or hold cycles are required.

M27C512-15B6

Vendor:STPackage Cooled:DIP-28D/C:06+

The 3K bytes of static RAM are used for temporary storage of data and for the program stack and interrupt stack. Read and write operations can be byte-wide or word-wide, depend- ing on the instruction executed by the CPU. Each memory access requires one clock cycle; no wait cycles or hold cycles are required.

M27C512-15BI

Vendor:STD/C:95

M27C512-15C1

Vendor:SGS THOMSOND/C:05+

The MC100EP809 is a low skew 1CtoC9 differential clock driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The part is designed for use in low voltage applications which require a large number of outputs to drive precisely aligned low skew signals to their destination. The two clock inputs are differential HSTL or PECL and they are selected by the CLK...

M27C512-15C3

Clear To Send: When low this pin indicates that the MODEM or data set is ready to exchange data The CTS0(1)*.signal is a MODEM status input whose conditions can be tested by the CPU reading bit4(CTS)of the MODEM Status Register Bit4 is the complement of the CTS0(1) signal Bit 0 (DCTS )of the MODEM status register indicates whether the CTS(1)* input has changed state since the previous reading of the modem sta...

M27C51215C6L

M27C512-15F

In this application note, we will discuss the implementa- tion of a basic watthour meter using PICmicro® Flash microcontrollers. In the process, we will show how one ADC with a single sample-and-hold circuit can effectively measure both voltage and load current and maintain Class 1 accuracy. The firmware discussed measures and displays rms voltage and current, as well as kWh, presented in a clear...

M27C512-15F

In this application note, we will discuss the implementa- tion of a basic watthour meter using PICmicro® Flash microcontrollers. In the process, we will show how one ADC with a single sample-and-hold circuit can effectively measure both voltage and load current and maintain Class 1 accuracy. The firmware discussed measures and displays rms voltage and current, as well as kWh, presented in a clear...

M27C51215F1

Vendor:SGS THOMSOND/C:05+

The MCP1700 is a family of CMOS low dropout (LDO) voltage regulators that can deliver up to 250 mA of current while consuming only 1.6 µA of quiescent current (typical). The input operating range is specified from 2.3V to 6.0V, making it an ideal choice for two and three primary cell battery-powered applications, as well as single cell Li-Ion-powered applications.

M27C512-15F1L

Vendor:ST

processor for small transfers such as fetching commands from and writing status information to the host memory over the PCI bus. The data DMA channels transfer data between the SCSI bus and the PCI bus. The PBIU internally arbitrates between the data DMA channel and the command DMA channel and alternately services them. Each DMA channel has a set of DMA registers that are programmed for transfers by...

M27C512-15F1TR

Vendor:ＳＴ

M27C51215F6

Vendor:STD/C:07+

Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param- eters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.

M27C51215F6L