OA-982

The PTHxx050Y are a series of ready- to-use switching regulator modules from Texas Instruments designed specifically for bus termination in DDR and QDR memory applications. Operating from either a 3.3-V, 5-V or 12-V input, the modules generate a VTT output that will source or sink up to 6 A of current (8 A transient) to accu- rately track their VREF input. VTT is the required bus termination suppl...

OA-982-LP

Vendor:OASISPackage Cooled:PQFP240D/C:05+

OABB039

OAC-5A

Vendor:GUNTHER

Note 1: This device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board level solder attach and rework. This limit permits only the use of solder profiles recom- mended in the industry standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow. Preheating is required. Hand or wave ...

OACM-UR

Vendor:POTTER & BRUMFIELD Package Cooled:MODULED/C:07+

Similarly, the bq24400 suspends fast charge if the battery temperature is outside the VLTF to VHTF range. (See Table 4.) For safety reasons, however, it disables the pulse trickle, in the case of a battery over-temperature condition (i.e., VTS < VHTF). Fast charge begins when the battery temperature and voltage are valid.

OAFI(OPA691IDB)

Vendor:BB/TIPackage Cooled:SOT23-6D/C:无铅08+

OAH100-66.000MHZ

OAKCE22V10Q-25PC

Vendor:AMDPackage Cooled:DIP

The two current limit sense lines are to be connected directly across the current limit sense resistor. For the current limit to work correctly pin 28 must be connected to the amplifier output side and pin 27 connected to the load side of the current limit resistor RLIM as shown in Figure 2. This connection will bypass any parasitic resistances RP, formed by socket and solder joints as well as inter...

OAMB094

Any offset and/or gain calibration procedures should not be implemented until devices are fully warmed up. To avoid interaction, offset must be adjusted before gain. The ranges of adjustment for the circuit in Figure 2 are guaranteed to compensate for the ADS-944's initial accuracy errors and may not be able to compensate for additional system errors.

OAOK-1275

Vendor:OPTiPackage Cooled:QFP

The MC145532 allows for the encoding and decoding of data at one of four rates on a sampleCbyCsample basis. Each data sample that is provided to the part is accompanied by an indication of the rate at which it is to be encoded or decoded. The width of the enable pulse determines the encoding/decoding rate chosen for each sample. The 64 kbps rate allows for PCM data to be passed directly through the ...

OAP12

OAP2343UA

Given that a total systems components and processor core determine its power consumption, the instruction set architecture (ISA) for the M•CORE is designed to optimize the trade-off between performance and total power consumption. The result is system-wide reduction of total energy consumption with maintenance of acceptable performance levels. Memory power consumption (both on-chip and external) is a m...

OAP2L

OAP548

Vendor:BBD/C:07+

OAR3-R020-FLF

OAR5-0.005-F

OAR5R040FLF

The ADSP-21262 features an enhanced Harvard architecture in which the data memory (DM) bus transfers data and the pro- gram memory (PM) bus transfers both instructions and data (see Figure 1 on Page 1). With the ADSP-21262s separate pro- gram and data memory buses and on-chip instruction cache, the processor can simultaneously fetch four operands (two over each data bus) and one instruction (from the c...

OAR5-R050-JLF

OARS-1-R003-1TRLF

The MC100ES6039 is a low skew 2/4, 4/6 clock generation chip designed explicitly for low skew clock generation applications. The internal dividers are synchronous to each other, therefore, the common output edges are all precisely aligned. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, LVPECL input signals. In addition, by using the VBB outp...

OARS1R005JI

The OARS1R005JIM is an I/O switching audio signal-processing IC for use in facsimile units and telephones. It integrates a crosspoint switch, a BTL power amplifier, an electronic volume control, a microphone amplifier, and other functions on a single chip.

OARS1R050FLF

Vendor:IRD/C:06+

OARSR030FLF

Vendor:IRD/C:06+

Address, active High. In word mode, these 20 inputs select one of 1,048,576 (1M) words within the array for read or write operations. In byte mode, these inputs are combined with the DQ[15]/A[-1] input (LSB) to select one of 2,097,152 (2M) bytes within the array for read or write operations.

OAS001/6K

Vendor:STPackage Cooled:SOP-8P

- Low current consumption: In operation: 100µA max. Power off: 2µA max. - Input voltage: 2.5V to 7V. Adjustable version (+2.5%) - PWM/PFM dual Mode - Oscillation frequency: 300KHz (Typ.) - With a power-off function. - Built-in internal SW P-channel MOS - SOP-8L/TSSOP-8L Package.

OAS001/6K

Vendor:ST

- Low current consumption: In operation: 100µA max. Power off: 2µA max. - Input voltage: 2.5V to 7V. Adjustable version (+2.5%) - PWM/PFM dual Mode - Oscillation frequency: 300KHz (Typ.) - With a power-off function. - Built-in internal SW P-channel MOS - SOP-8L/TSSOP-8L Package.

OAS2006D

Vendor:N/APackage Cooled:SMDD/C:98+

The GS82032A is an SCD (Single Cycle Deselect) pipelined synchronous SRAM. DCD (Dual Cycle Deselect) versions are also available. SCD SRAMs pipeline deselect commands one stage less than read commands. SCD RAMs begin turning off their outputs immediately after the deselect command has been captured in the input registers.

OAS546PUFAA

OASA-OAA

Vendor:ALCATELPackage Cooled:PLCCD/C:07+

For applications requiring powerful I/O capabilities, the Z86C83/C84 devices can have up to 21/17 (C83/C84 respectively) pins dedicated to input and output. These lines are grouped into three ports, and are configured by software to provide digital/analog I/O timing and status signals.

OASP 2A01

Vendor:ALCATELPackage Cooled:08+D/C:78

OASP 2A01

Vendor:ALCATELPackage Cooled:PLCC-68

OASP1A01

Vendor:ALCATELPackage Cooled:PLCC68D/C:10

OASP-2A01

Vendor:ALCATEL 2840Package Cooled:TQFPD/C:04+

− Dynamic Range (A-Weighted): 118dB − THD+N: −100dB Linear Phase, 8x Oversampling Digital Interpolation Filter Digital De-Emphasis Filters for 32kHz, 44.1kHz, and 48kHz Sampling Rates Soft Mute Function − All-Channel Mute via the MUTE Input Pin − Per-Channel Mute Available in Software Mode

OASP-2A01

Vendor:ALCATEL 2840Package Cooled:PLCCD/C:04+

− Dynamic Range (A-Weighted): 118dB − THD+N: −100dB Linear Phase, 8x Oversampling Digital Interpolation Filter Digital De-Emphasis Filters for 32kHz, 44.1kHz, and 48kHz Sampling Rates Soft Mute Function − All-Channel Mute via the MUTE Input Pin − Per-Channel Mute Available in Software Mode

OAT518221-30

Vendor:369

OAT-HF-135-FC-10

Vendor:WRIPackage Cooled:N/AD/C:33

CRS[3:1] are dual purpose pins. When RESET is active, the value on these pins are sampled to determine the transceiver address for the mgmt interface. These pins have internal pull-ups, a 2.7 kΩ pull down resistor is required to program a logic 0.

OATIAAE

OAW39422

Vendor:TSSOPPackage Cooled:00+D/C:00+

sizing, and programmable I/O (PIO) pins on one chip. Compared to the 80C186/188 microcontrollers, the Am186ED/EDLV microcontrollers enable designers to reduce the size, power consumption, and cost of em- bedded systems, while increasing reliability, functional- ity, and performance.

OAW39422

Vendor:TSSOPD/C:00+

sizing, and programmable I/O (PIO) pins on one chip. Compared to the 80C186/188 microcontrollers, the Am186ED/EDLV microcontrollers enable designers to reduce the size, power consumption, and cost of em- bedded systems, while increasing reliability, functional- ity, and performance.

OAZ203

OAZ208

OAZ213

OAZ223

OAZ224S

OB20545

Vendor:HITACHIPackage Cooled:BGA

A collision occurs when two or more transmitters simultaneously transmit on the transmission media. A collision is detected by comparing the average DC level of the transmission media to a collision threshold. The received signal at RXI is buffered and sent through a low pass filter, then compared in the collision threshold circuit. If the average DC level exceeds a collision threshold, a 10 MHz sign...

OB20545

Vendor:HITACHIPackage Cooled:BGA

A collision occurs when two or more transmitters simultaneously transmit on the transmission media. A collision is detected by comparing the average DC level of the transmission media to a collision threshold. The received signal at RXI is buffered and sent through a low pass filter, then compared in the collision threshold circuit. If the average DC level exceeds a collision threshold, a 10 MHz sign...

OB2262MP

Package Cooled:N/AD/C:07+

The OB2262MP includes a proprietary Hitless Switching (HS) feature that prevents an excessive phase transient of the output clocks upon input reference rearrangement. Upon the occurance of an input reference phase change, or phase transient, PLL bandwidth is lowered by the HS function. This limits the rate of phase change in the output clocks. With proper configuration of the external loop filter, th...

OB2263

Vendor:OBD/C:07+

OB2263AP

Package Cooled:D/SD/C:05+06+07+

MOSFET gates can be efficiently switched up to 2MHz using the ISL6208. Each driver is capable of driving a 3000pF load with propagation delays of 8ns and transition times under 10ns. Bootstrapping is implemented with an internal Schottky diode. This reduces system cost and complexity, while allowing the use of higher performance MOSFETs. Adaptive shoot-through protection is integrated to prevent both MOSFETs...

OB2263MP

Vendor:LITE OND/C:06+/NOPB

Note 8: CIN, COUT, C1, and C2: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics. Note 9: Output resistance is a model for the voltage drop at the output, resulting from internal switch resistance, capacitor ESR, and charge pump charge transfer characteristics. Output voltage can be predicted with the following equation: VOUT = -[VIN - (IOUT x ROUT)]

OB2268CPA

Vendor:LITE ONPackage Cooled:SOP8D/C:06+/NOPB

Tutte le informazioni contenute nel presente manuale sono state accuratamente verifi- cate, ciononostante grifo® non si assume nessuna responsabilit per danni, diretti o indiretti, a cose e/o persone derivanti da errori, omissioni o dall'uso del presente manuale, del software o dell' hardware ad esso associato. grifo® altresi si riserva il diritto di modificare il contenuto e la veste di questo ma...

OB2269

Vendor:ONS BRIGHTD/C:06+/07+

These N-Channel enhancement mode power field effect transistors are produced using Fairchilds proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for DC to DC converters, sychronous rectific...

OB2269CCP

D/C:08+

Ripple Rejection Output Voltage Temperature Coefficient Short Current Limit Pull-down resistance for CE pin CE Input Voltage H CE Input Voltage L Thermal Shutdown Detector Threshold Temperature Thermal Shutdown Released Temperature

OB2279

Vendor:ONS BRIGHTD/C:06+/07+

OB2279CPAT

OB3318

Vendor:ONS BRIGHTD/C:06+/07+

Fourth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications.

OB3328

Vendor:ONS BRIGHTD/C:06+/07+

In many applications, the card or tag manufacturer may choose to overwrite the serial number stored as an ID in page 0 with a specific ID value of their choosing. If so desired, the final ID value can then be locked to prevent further changes. If the ID is not locked, or if additional validation of the ID is required, the manufacturer may choose to hash or encrypt the ID, serial number and another fix...

OB3338

Vendor:ONS BRIGHTD/C:06+/07+

Notes: 1. Operation of this device in excess of any one of these parameters may cause permanent damage. 2. Assumes DC quiescent conditions. 3. Board (package belly) temperatureTB is 25C. Derate 22 mW/C for TB > 83C. 4. Channel to board thermal resistance measured using 150C Liquid Crystal Measurement method. 5. Device can safely handle +27dBm RF Input Power provided IGS is limited to 46mA. IG...

OB500-424S05

Vendor:YCLPackage Cooled:N/AD/C:05+

OB5019ASA

Vendor:N/APackage Cooled:N/AD/C:6248

This ISOSMARTTM chipset is a pair of integrated circuits providing isolated high- and low-side drivers for phase- leg motor controls, or any other application which utilizes a half bridge, 2- or 3-phase drive configuration. They consist of two drive control inputs (INL and INH) for two Power-MOSFET/IGBT gate-drive outputs. Both inputs operate from a common ground and are activated by HCMOS comp...

OB5019ASA

Vendor:N/APackage Cooled:N/AD/C:6248

This ISOSMARTTM chipset is a pair of integrated circuits providing isolated high- and low-side drivers for phase- leg motor controls, or any other application which utilizes a half bridge, 2- or 3-phase drive configuration. They consist of two drive control inputs (INL and INH) for two Power-MOSFET/IGBT gate-drive outputs. Both inputs operate from a common ground and are activated by HCMOS comp...

OB5UT00B30

Vendor:NVIDIAPackage Cooled:PBGAD/C:03+

DESCRIPTION The 74V2G74 is an advanced high-speed CMOS SINGLE D-TYPE FLIP FLOP WITH PRESET AND CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. A signal on the D INPUT is transfered to the Q and Q OUTPUTS during the positive going transition of the clock pulse.

OBF0202

OBG-415L42-C1033(R)

OBG-415P44-C1033

OBH100-2.048MHZ

OBPM-WA(IN-48VOUT-2V/3.0A)

Vendor:DONGAHPackage Cooled:module

All PICmicro™ microcontrollers employ an advanced RISC architecture. The PIC12C67X microcontrollers have enhanced core features, eight-level deep stack, and multiple internal and external interrupt sources. The separate instruction and data buses of the Harvard architecture allow a 14-bit wide instruction word with the separate 8-bit wide data. The two stage instruction pipeline allows all inst...

OBQ12SC2448

Vendor:MPackage Cooled:08+D/C:1200

• High-speed access time: 8, 10, 12, 15, and 20 ns • CMOS low power operation 250 mW (typical) operating 250 µW (typical) standby • TTL compatible interface levels • Single 3.3V power supply • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Industrial temperature available

OBQ12SC2448

Vendor:MPackage Cooled:OOD/C:1200

• High-speed access time: 8, 10, 12, 15, and 20 ns • CMOS low power operation 250 mW (typical) operating 250 µW (typical) standby • TTL compatible interface levels • Single 3.3V power supply • Fully static operation: no clock or refresh required • Three state outputs • Data control for upper and lower bytes • Industrial temperature available

OBS017ZE

The AD581 is easy to use in virtually all precision reference applications. The three terminals are simply primary supply, ground, and output, with the case grounded. No external com- ponents are required even for high precision applications; the degree of desired absolute accuracy is achieved simply by select- ing the required device grade. The AD581 requires less than 1 mA quiescent current from an op...

OBS017ZE-9

Between t7 and t8, the converter reaches its peak current limit which is determined by RPL and VIN. Once the limit is reached, the converter operates in continuous mode with approximately 200mA of ripple current. At time t8, the output voltage is satisfied, and the converter can ser- vice VGD, which occurs at t9.

OBS025ZH

Vendor:COSEL

The LTC®1751 family are micropower charge pump DC/ DC converters that produce a regulated output voltage at up to 100mA. The input voltage range is 2V to 5.5V. Extremely low operating current (20µA typical with no load) and low external parts count (one flying capacitor and two small bypass capacitors at VIN and VOUT) make them ideally suited for small, battery-powered applica- tions.

OBSDMDFIN

Vendor:NSCD/C:95

OBSDMDKKM

Vendor:NSCD/C:95

OBTBC

OBTI(AAA)

OBTI(AAB)

OBTI(AAF)

OBTI(ABB)

OBTI(ABW)

OBV6F

OC/9102AK

OC0360

The OC0360 also features fan fault sensing for enhancing system protection and reliability. It detects the presence of a fan, when the running fan fails or jams using the voltage on VSENSE pin and asserts the fault signal. The fault condition also triggers the maximum PWM applied to the running fan. The fault is also asserted when the thermistor resistance is less than 1.5 KΩ (temperature is over ...

OC0804T006

OC1071

OC122

Package Cooled:金属帽

The TL594 contains two error amplifiers, an on-chip adjustable oscillator, a dead-time control (DTC) comparator, a pulse-steering control flip-flop, a 5-V regulator with a precision of 1%, an undervoltage lockout control circuit, and output control circuitry.

OC123

Vendor:MULLARDD/C:08+

OC1305

OC139

Package Cooled:CAN

OC1602

OC1614

OC170

Vendor:TESLAPackage Cooled:金属帽

Source current: In stand-by condition Source current: While detecting leakage Source current: While detecting abnormal voltage Source current: Immediately after driving of SCR Source current: In stand-by condition Source current: While detecting leakage Source current: Immediately after driving of SCR ISO variation with ambient temperature Maximum current voltage Leakage detecting DC input voltag...

OC170

Vendor:TESLAPackage Cooled:金属帽

Source current: In stand-by condition Source current: While detecting leakage Source current: While detecting abnormal voltage Source current: Immediately after driving of SCR Source current: In stand-by condition Source current: While detecting leakage Source current: Immediately after driving of SCR ISO variation with ambient temperature Maximum current voltage Leakage detecting DC input voltag...

OC171

Package Cooled:金属帽D/C:7313

Minimum Quiet Time required between Bus Relinquish and start of next conversion Minimum CS Pulse Width CS to SCLK Setup Time Delay from CS Until SDATA 3-State Disabled Data Access Time After SCLK Falling Edge SCLK Low Pulse Width SCLK High Pulse Width SCLK to Data Valid Hold Time SCLK falling Edge to SDATA High Impedance Power up time from Full Power-down.

OC1820

Vendor:GPSPackage Cooled:SSOPD/C:07+

When transmitting (T/R high), the parity select (ODD/EVEN) input is made high or low as appropriate. The A port is then polled to determine the number of high bits.The PARITY output goes to the logic state determined by ODD/EVEN and the number of high bits on A port. When ODD/EVEN is low (for even parity) and the number of high bits on A port is odd, the PARITY will be high, transmitting even parity. If t...

OC1847-1

Vendor:KOREAPackage Cooled:DIP

The HYS64/72D32000GU and HYS64/72D64020GU are industry standard 184-pin 8-byte Dual in- line Memory Modules (DIMMs) organized as 32M 64 and 64M 64 for non-parity and 32M x 72 and 64M x 72 for ECC main memory applications. The memory array is designed with 256Mbit Double Data Rate Synchronous DRAMs. A variety of decoupling capacitors are mounted on the PC board. The DIMMs feature serial presence detect b...

OC201

Vendor:ASIPackage Cooled:金属帽D/C:8446

audio integrated circuits were designed specifically to provide high quality audio while requiring few external components. Since the OC201 incorporates tone and vol- ume controls, a stereo audio power amplifier and a micro- phone preamp stage, it is optimally suited to multimedia monitors and desktop computer applications.

OC201

Vendor:ASIPackage Cooled:NOD/C:8446

audio integrated circuits were designed specifically to provide high quality audio while requiring few external components. Since the OC201 incorporates tone and vol- ume controls, a stereo audio power amplifier and a micro- phone preamp stage, it is optimally suited to multimedia monitors and desktop computer applications.

OC203

3.7 UTP Transmission and Output Driver The UTP transmission circuit takes the Manchester decoded data and converts it into a coded format that meets IEEE 802.3-required transmission templates. The coded data is fed into an oversampling D/A and filters for waveform shaping. The output buffer of the transmitter is an open-drain type current source. The output voltage of the transmitter is developed on the ext...

OC2610

OC303

Package Cooled:NO

A resistor can be added from the RESET pin to ground to ensure the RESET output remains low with VCC down to 0V. A 100kΩ resistor connected from RESET to ground is recommended. The size of the resistor should be large enough to not load the RESET output and small enough to pull-down any stray leakage currents.

OC3043