Index "O"Vendor:ADPackage Cooled:DIPD/C:9910
The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable out- put. Protection circuits ensure that 0V to 7V can be applied to the input pins without regard to the supply voltage and to the output pins with VCC0V. These circuits prevent device destruction due to mismatched supply and input/ output voltages. This device can be used to interface 3...
Vendor:PMI/ADID/C:99+/00+
Vendor:PMI/ADID/C:99+/00+
Vendor:PMIPackage Cooled:扁平 陶封10PinD/C:8643
1.700 (43.18mm) PCB Height 168-Pin Registered DIMM with Double Sided ECC support One 0.22µF and one 0.0022µF decoupling capacitors adopted Serial Presence Detect with Serial EEPROM Two Register Buffers & one Inverter used (with PLL) Supports Flow-through or Register mode by Pin No. 147 (REGE) Meets all the other JEDEC specifications Single 3.3V0.3V power supply All device pins are LVTTL ...
Output write current pulses are enabled when a high is applied to the WEN2-WEN2B, WEN3-WEN3B, or WEN- WEN4B pin. The write current will flow to the selected output. When SEL1 is high IOUT1 is selected. WENRB enables read and oscillator current when low.
Vendor:AD
Low voltage operation VDD = 3.3V 1:4 fanout Single-input configurable for LVDS, LVPECL, or LVTTL Four differential pairs of LVPECL outputs Drives 50-ohm load Low input capacitance Low output skew Low propagation delay Typical (tpd < 4 ns) • Industrial versions available • Available packages include TSSOP, SOIC
Vendor:AD
Low voltage operation VDD = 3.3V 1:4 fanout Single-input configurable for LVDS, LVPECL, or LVTTL Four differential pairs of LVPECL outputs Drives 50-ohm load Low input capacitance Low output skew Low propagation delay Typical (tpd < 4 ns) • Industrial versions available • Available packages include TSSOP, SOIC
Any data, prices, descriptions or specifications presented herein are subject to revision by C&D Technologies, Inc. without notice. While such information is believed to be accurate as indicated herein, C&D Technologies, Inc. makes no warranty and hereby disclaims all warranties, express or implied, with regard to the accuracy or completeness of such information. Further, because the product(s) feat...
Vendor:PMI/ADPackage Cooled:CAN8
Vendor:PMI/ADPackage Cooled:CAN8
RX Loss-of-Signal Level Set. A resistor (RLOSLVL) connected between LOSLVL and VCC sets the threshold for the data input amplitude at which the LOS output is asserted. Default is max sensitivity. LOSLVL is used to set the Loss-of-Signal (LOS) voltage. It is internally connected to a 2.8kΩ pull-down resistor to an internal VREF voltage source. See Typical Operating Characteristics, and Application Impl...
Vendor:ADD/C:08+
nanoseconds at the processor pins, which translates to an approximately 300 to 500ns current step at the regu- lator. In addition, the output voltage tolerances are also extremely tight and they include the transient response as part of the specification. For example Intel VRE specification calls for a total of 100mV including initial tolerance, load regulation and 0 to 4.6A load step.
Vendor:15D/C:N/A
Vendor:200Package Cooled:ADD/C:N/A
Please read Application Note 1 "General Operating Consid- erations" which covers stability, power supplies, heat sinking, mounting, current limit, SOA interpretation, and specification interpretation. Visit www.apexmicrotech.com for design tools that help automate tasks such as calculations for stability, internal power dissipation, current limit, heat sink selection, Apex's complete Applica...
Vendor:ADIPackage Cooled:DIPD/C:08+
(see Reference 2 for derivation) where q is the charge on an electron, is the ratio of collector current to emitter current of the differential amplifier transistors, (assumed to be 0.99 in this case), IC is the collector current of the constant- current source (IABC in this case), K is Boltzman's constant, and T is the ambient temperature in degrees Kelvin. At room temperature, gM = 19.2 x IABC, whe...
Vendor:ADIPackage Cooled:DIPD/C:08+
(see Reference 2 for derivation) where q is the charge on an electron, is the ratio of collector current to emitter current of the differential amplifier transistors, (assumed to be 0.99 in this case), IC is the collector current of the constant- current source (IABC in this case), K is Boltzman's constant, and T is the ambient temperature in degrees Kelvin. At room temperature, gM = 19.2 x IABC, whe...
Vendor:ADD/C:08+
sGENERAL DESCRIPTION The NJU7108 is a super small-sized package single C-MOS comparator with push pull output. The operating voltage is from 1V to 5.5V, and the interface can be connected with most of TTL and C-MOS type standard logic ICs. Furthermore, The input offset voltage is lower than 4mV and the package is super small-sized SC88A, therefore they can be suitable for battery use items and other po...
Vendor:ADD/C:08+
sGENERAL DESCRIPTION The NJU7108 is a super small-sized package single C-MOS comparator with push pull output. The operating voltage is from 1V to 5.5V, and the interface can be connected with most of TTL and C-MOS type standard logic ICs. Furthermore, The input offset voltage is lower than 4mV and the package is super small-sized SC88A, therefore they can be suitable for battery use items and other po...
Package Cooled:CAND/C:99+
Hynix HYMD525G726(L)S4-K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both ris- ing and falling edges of it. The data paths are internally pip...
Vendor:ADID/C:08+
Vendor:ADID/C:08+
DESCRIPTION The ST24/25E64 are 64K bit electrically erasable programmable memories (EEPROM), organized as 8 blocks of 1024 x 8 bits. The ST25E64 operates with a power supply value as low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline pack- ages are available.
Vendor:ADID/C:08+
DESCRIPTION The ST24/25E64 are 64K bit electrically erasable programmable memories (EEPROM), organized as 8 blocks of 1024 x 8 bits. The ST25E64 operates with a power supply value as low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline pack- ages are available.
Vendor:ADID/C:08+
• Plastic package has Underwriters Laboratory Flammability Classification 94 V-0 • For surface mounted applications • Low Zener impedance • Low regulation factor • High temperature soldering guaranteed: 260 C/10 seconds at terminals • Standard voltage tolerance is 10 %, Suffix A 5 %.
Vendor:ADIPackage Cooled:DIPD/C:08+
• Plastic package has Underwriters Laboratory Flammability Classification 94 V-0 • For surface mounted applications • Low Zener impedance • Low regulation factor • High temperature soldering guaranteed: 260 C/10 seconds at terminals • Standard voltage tolerance is 10 %, Suffix A 5 %.
Vendor:ADID/C:08+
Vendor:ADIPackage Cooled:DIPD/C:08+
Vendor:PMI/ADPackage Cooled:CAN8
This is the voltage that would be reflected from any line termination. As ZL becomes equal to Z0, this quantity becomes zero. Often this is expressed in dB and is called return loss. Reflection coefficient values less than 0.1 corresponding to a return loss of -20dB are generally seen as adequate. The OP12CJ/OP12CJ/ OP12CJ will typically provide reflection coefficients below 0.01 or -40dB return loss. In mo...
Vendor:AD/PMI
The on-chip address lookup engine supports up to 2K MAC addresses and up to 256 IEEE 802.1Q Virtual LANs (VLAN). Each port may be programmed to recognize VLANs, and will transmit frames along with their VLAN Tags, for interoperability, to systems that support VLAN Tagging.
Vendor:PMI/ADPackage Cooled:CAND/C:11667
The DS1543 is a full-function real-time clock/calendar (RTC) with a RTC alarm, watchdog timer, power- on reset, battery monitor, and 8k x 8 non-volatile static RAM. User access to all registers within the DS1543 is accomplished with a bytewide interface as shown in Figure 1. The RTC registers contain year, month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for day of mo...
Vendor:PMI/ADPackage Cooled:CAN8
Raw PCB, PowerInfo™ 2 Firmware Specification, PowerInfo™ 2 Main MCU Firmware Specification, PowerInfo™/PowerCal™ USB MCU Capacitor, Ceramic, 22 pF, 50V, +/-5%, C0G dielectric, 0603 Capacitor, Ceramic, 100 nF, 25V, +80%/-20%, Y5V dielectric, 0603
Vendor:PMI/ADPackage Cooled:CAN
These octal transparent D-type latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
Vendor:ADID/C:08+
Vendor:PMI/ADPackage Cooled:CAN8
DESCRIPTION The HCF4013B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4013B consists of two identical, independent data type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and
Vendor:PMI
Description The HYS 72Dxx0x0GR are industry standard 184-pin 8-byte Dual in-line Memory Modules (DIMMs) organized as 32M 72 (256MB), 64M 72 (512MB) and 128M 72 (1GB). The memory array is designed with Double Data Rate Synchronous DRAMs for ECC applications. All control and address signals are re-driven on the DIMM using register devices and a PLL for the clock distribution. This reduces capacitive l...
Vendor:N/APackage Cooled:CAND/C:N/A
Vendor:N/APackage Cooled:CAND/C:N/A
Vendor:PMI/ADPackage Cooled:CAN8
Vendor:PMI/AD
NOTE: 1.Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Vendor:600Package Cooled:ADD/C:N/A
Using C4 = 8.2 pF 5%, C5 = 10 pF 5%, a switch port with CSwitch = 3 pF 10%, stray capacitances on each side of the crystal of C Stray1 = CStray2 = 1 pF 10%, a parallel capacitance of the crystal of C0 = 3.2 pF 10% and a crystal with CM = 13 fF 10%, an FSK deviation of 21.5 kHz typical with worst case tolerances of 16.25 kHz to 28.01 kHz results.
Vendor:580Package Cooled:ADD/C:N/A
The device has low power dissipation with a 40-mA active read for the byte mode, 50-mA active read for the word mode, 60-mA typical program/erase current mode, and less than 100-mA standby current with a 5-mA deep-power-down mode. These devices are offered with 80-, 90-, 100-, and 120-ns access times. Table 1 and Table 2 show the sector-address ranges. The TMS29F800T/B is offered in a 44-pin plastic smal...
Vendor:580Package Cooled:N/AD/C:N/A
The device has low power dissipation with a 40-mA active read for the byte mode, 50-mA active read for the word mode, 60-mA typical program/erase current mode, and less than 100-mA standby current with a 5-mA deep-power-down mode. These devices are offered with 80-, 90-, 100-, and 120-ns access times. Table 1 and Table 2 show the sector-address ranges. The TMS29F800T/B is offered in a 44-pin plastic smal...
Vendor:ADIPackage Cooled:DIPD/C:08+
The HT82K628A will respond with ACK, clears its output buffer and prepares to receive key identification. Key identification is accomplished by the host identifying each key by its scan code value as defined in scan code set 3. Only scan code set 3 values are valid for key iden- tification. The type of each identified key is set to the value indicated by the command. Although these com- mands can be sent usi...
Vendor:ADID/C:08+
Vendor:ADID/C:08+
Vendor:ADID/C:08+
Vendor:ADID/C:08+
DEVICE IDENTIFICATION: An extra 128 bytes of EEPROM memory are available to the user for device identification. By raising A9 to 12V 0.5V and using address locations 1FF80H to 1FFFFH the bytes may be written to or read from in the same manner as the regular memory array.
In addition, the TSC80C31/80C51 has two software-selectable modes of reduced activity for further reduction in power consumption. In the Idle Mode the CPU is frozen while the RAM, the timers, the serial port, and the interrupt system continue to function. In the Power Down Mode the RAM is saved and all other functions are inoperative.
Configured as an 8-Port M-LVDS Repeater − SN65MLVD128 2 LVTTL Receivers and Eight Line Drivers Configured as Dual 4-Port M-LVDS Repeaters − SN65MLVD129 Drivers Meet or Exceed the M-LVDS Standard (TIA/EIA-899) Low-Voltage Differential 30-Ω to 55-Ω Line Drivers for Data Rates(1) Up to 250 Mbps or Clock Frequencies Up to 125 MHz Power Up/Down Glitch Free Controlled Driver Output Volt...
The Master begins a transmission by sending a START condition. The Master then sends the address of the particular slave device it is requesting. The four most significant bits of the 8-bit slave address are fixed as 1010 for the CAT24FC17 (see Fig. 5). The next three significant bits (A10, A9, A8) are the memory array address bits. The last bit of the slave address specifies
Vendor:AD
Unicorn II is an evolution of the field-proven and mass deployed Unicorn modem that dramatically lowers the overall system cost when designing and producing a USB ADSL modem. The Unicorn II chipset is designed using cost effective CMOS technology, further integrating external compo- nents which leads to even lower E-BOM costs, re- duced component count and lower PCB complexity; All of this while in...
Vendor:AD
Unicorn II is an evolution of the field-proven and mass deployed Unicorn modem that dramatically lowers the overall system cost when designing and producing a USB ADSL modem. The Unicorn II chipset is designed using cost effective CMOS technology, further integrating external compo- nents which leads to even lower E-BOM costs, re- duced component count and lower PCB complexity; All of this while in...
Vendor:ADID/C:08+
HOLD is used in conjunction with the CS pin to select the device. Once the part is selected and a serial sequence is underway, HOLD may be used to pause the serial communication with the controller without resetting the serial sequence. To pause, HOLD must be brought LOW while SCK is LOW. To resume communication, HOLD is brought HIGH, again while SCK is LOW. If the pause feature is not used, HOLD sho...
Vendor:ADID/C:08+
5V TOLERANT INPUTS HIGH SPEED: tPD = 4.2ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 32 LATCH-UP PERFORMANC...
Vendor:ADID/C:08+
5V TOLERANT INPUTS HIGH SPEED: tPD = 4.2ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 1.65V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 32 LATCH-UP PERFORMANC...
Vendor:ADIPackage Cooled:CAND/C:08+
† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltag...
Vendor:ADD/C:08+
The bq2022 SDQ interface (TIs proprietary serial communications protocol) requires only a single connection and a ground return. The DATA pin is also the sole power source for the bq2022. The bus architecture allows multiple SDQ devices to be connected to a single host.
Vendor:ADPackage Cooled:CAND/C:N/A
The ISL6614A drives both the upper and lower gates simultaneously over a range from 5V to 12V. This drive- voltage provides the flexibility necessary to optimize applications involving trade-offs between gate charge and conduction losses.
Vendor:PMI/ADPackage Cooled:CAND/C:1625
Vendor:ADIPackage Cooled:1000D/C:CDIP
Vendor:PMIPackage Cooled:DIP-8D/C:03+
The 33996 is a 16-output low-side switch with a 24-bit serial input control. It is designed for a variety of applications including inductive, incandescent, and LED loads. The Serial Peripheral Interface (SPI) provides both input control and diagnostic readout. A Pulse Width Modulation (PWM) control input is provided for pulse width modulation of multiple outputs at the same duty cycle. A dedicated reset inp...
Vendor:220Package Cooled:CDIP8D/C:N/A
OSC1, OSC2 are connected to an RC network or Crystal (determined by ROM code option) for the internal system clock. In the case of RC operation, OSC2 is the output terminal for 1/4 system clock. These two pins also can bePull-high* Crystal or RC or optioned as an RTC oscillator (32768Hz) or I/O lines. In these two cases, the Int. RC+I/O or Int. system clock comes from an internal RC oscillator whose fr...
Vendor:ADIPackage Cooled:DIPD/C:08+
n Input frequency range from 30 MHz to 95 MHz n Support display resolutions XGA (1024x768), WXGA (1280x768), HDTV I (1280x768), HDTV II (1366x768) and HDTV - (1280x800) n Embedded gate array for custom panel timing n LVDS single pixel input (8-bit/6-bit) interface (FPD-Link) n RSDS dual bus output (8-bit/6-bit) n Drives RSDS column drivers up to 47.5 MHz clock n Flexible RSDS data output mapping f...
Vendor:ADID/C:99+
This device is intended for use as a free wheeling or boost diode in power supplies and other power switching applications. The low IRM(REC) and short ta phase reduce loss in switching transistors. The soft recovery minimizes ringing, expanding the range of conditions under which the diode may be operated without the use of additional snubber circuitry. Consider using the Stealth™ diode with a 1...
Vendor:ADID/C:99+
This device is intended for use as a free wheeling or boost diode in power supplies and other power switching applications. The low IRM(REC) and short ta phase reduce loss in switching transistors. The soft recovery minimizes ringing, expanding the range of conditions under which the diode may be operated without the use of additional snubber circuitry. Consider using the Stealth™ diode with a 1...
Vendor:PMIPackage Cooled:91+
The numerical value of the voltage is positive if the potential at the arrow tail is higher than at the arrow head; i.e., the potential difference from the measuring point (A) to the reference point (B) is positive. The numerical value of the voltage is negative if the potential at the arrow head is higher than the tail; i.e., the potential difference from the measuring point to the reference point i...
Vendor:PMIPackage Cooled:428
The numerical value of the voltage is positive if the potential at the arrow tail is higher than at the arrow head; i.e., the potential difference from the measuring point (A) to the reference point (B) is positive. The numerical value of the voltage is negative if the potential at the arrow head is higher than the tail; i.e., the potential difference from the measuring point to the reference point i...
Package Cooled:CAND/C:99+
• PI74FCT861/863T/864T is pin compatible with bipolar FAST™ Series at a higher speed and lower power consumption • TTL input and output levels • Extremely low static power • Hysteresis on all inputs • Industrial operating temperature range: C40C to +85C • Packages available: C 24-pin 300 mil wide plastic DIP (P) C 24-pin 150 mil wide plastic QSOP (Q) C 24-pi...
Vendor:30Package Cooled:PMID/C:N/A
† Measured on typical two-sided PWB with power tabs (terminals 1, 2, 11, 12, 22, 23, 34, and 35) connected to copper foil with an area of 3.8 square inches (2452 mm2) on each side. See Application Note 29501.5, Improving Batwing Power Dissipation, for additional information.
Vendor:30Package Cooled:PMID/C:N/A
† Measured on typical two-sided PWB with power tabs (terminals 1, 2, 11, 12, 22, 23, 34, and 35) connected to copper foil with an area of 3.8 square inches (2452 mm2) on each side. See Application Note 29501.5, Improving Batwing Power Dissipation, for additional information.
Vendor:ADIPackage Cooled:DIPD/C:04+
Vendor:ADID/C:04+
Vendor:ADID/C:0327+
The Micron® Imaging MT9M001 is an SXGA-format with a 1/2-inch CMOS active-pixel digital image sen- sor. The active imaging pixel array of 1,280H x 1,024V. It incorporates sophisticated camera functions on-chip such as windowing, column and row skip mode, and snapshot mode. It is programmable through a simple two-wire serial interface.
Vendor:ADID/C:0327+
The Micron® Imaging MT9M001 is an SXGA-format with a 1/2-inch CMOS active-pixel digital image sen- sor. The active imaging pixel array of 1,280H x 1,024V. It incorporates sophisticated camera functions on-chip such as windowing, column and row skip mode, and snapshot mode. It is programmable through a simple two-wire serial interface.
Vendor:ADID/C:08+
memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDTs CMOS high-performance technol- ogy, these devices typically operate on only 350mW of power. The IDT70V25 is packaged in a ceramic 84-pin PGA, an 84-Pin PLCC and a 100-pin Thin Quad Plastic Flatpack.
Vendor:ADID/C:08+
memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDTs CMOS high-performance technol- ogy, these devices typically operate on only 350mW of power. The IDT70V25 is packaged in a ceramic 84-pin PGA, an 84-Pin PLCC and a 100-pin Thin Quad Plastic Flatpack.
Vendor:ADPackage Cooled:DIP-8D/C:03+
Features • Fully compliant to IrDA 1.3 specifications: C 2.4 kb/s to 1.152 Mb/s C Excellent nose-to-nose operation C Typical link distance > 1.5 m • Guaranteed temperature performance, C20 to 70 C C Critical parameters are guaranteed over specified temperatures and supply voltages • Low power consumption C Low shutdown current (10 nA typical) C Complete shutdown for ...
Vendor:ADID/C:07+
The 'LVTH16373 devices are 16-bit transparent D-type latches with 3-state outputs designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
Vendor:ADIPackage Cooled:DIPD/C:07+
The 'LVTH16373 devices are 16-bit transparent D-type latches with 3-state outputs designed for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
Vendor:ADID/C:07+
Vendor:ADID/C:07+
Vendor:CAN8Package Cooled:892D/C:AD
Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • JAC/W) Note 4: Failure to solder the exposed back side of the MS8E package to the PC board will result in a thermal resistance much higher than 40C/W.
Vendor:PMI(advnatage series)Package Cooled:DIP-8D/C:04+(new original )
Vendor:PMI
1) CPD is defined as the value of the ICs internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + I CC/2 (per FLIP/ FLOP)
Vendor:PMID/C:05+
Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, with- out exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.
Vendor:PMIPackage Cooled:CDIP-8
The Samsung M390S2858DT1 is a 128M bit x 72 Synchro- nous Dynamic RAM high density memory module. The Sam- sung M390S2858DT1 consists of eighteen CMOS Stacked 128Mx4 bit Synchronous DRAMs in two TSOP-II 400mil pack- ages, three 18-bits Drive ICs for input control signal, one PLL in 24-pin TSSOP package for clock and one 2K EEPROM in 8- pin TSSOP package for Serial Presence Detect on a 168-pin glass-epoxy s...
Vendor:PMI/ADPackage Cooled:CAND/C:1557
Slew-Rate Control (Input): A capacitor connected between this pin and ground will reduce (slow) the output slew-rate. The output turn-on time must be less than the nominal flag delay of 32ms in order to avoid nuisance tripping of the /FAULT output since VOUT must be fully on (i.e., within 200mV of the voltage at the input) before the /FAULT signal delay elapses. The slew-rate limiting capacitor requires...
Vendor:PMI/ADPackage Cooled:CAND/C:1550
Package Cooled:CAND/C:99+
The ML2250 family is a 2-channel mixing speech synthesis device with an on-chip voice data (i.e., phrases) storing mask ROM and a flash memory. Besides playing the built-in voice data, this device can output voice data that is input from outside the device. This ML2250 family allows to select the playback method from the 8-bit PCM, non-linear 8-bit PCM, 16-bit PCM, 2-bit ADPCM2, and 4-bit ADPCM2 algorithm...
Package Cooled:CAND/C:99+
The ML2250 family is a 2-channel mixing speech synthesis device with an on-chip voice data (i.e., phrases) storing mask ROM and a flash memory. Besides playing the built-in voice data, this device can output voice data that is input from outside the device. This ML2250 family allows to select the playback method from the 8-bit PCM, non-linear 8-bit PCM, 16-bit PCM, 2-bit ADPCM2, and 4-bit ADPCM2 algorithm...
STANDARD DEFINITION MODE Hue Accuracy Color Saturation Accuracy Chroma Nonlinear Gain Chroma Nonlinear Phase Chroma/Luma Intermodulation Chroma/Luma Gain Inequality Chroma/Luma Delay Inequality Luminance Nonlinearity Chroma AM Noise Chroma PM Noise Differential Gain Differential Phase SNR SNR SNR
Vendor:PMI/ADPackage Cooled:CAND/C:1540
† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input ...
Vendor:246Package Cooled:ADD/C:N/A
SDRAM device attributes: Minimum clock delay back-to-back column access SDRAM device attributes: Burst length supported SDRAM device attributes: Number of banks on SDRAM device SDRAM device attributes: /CAS latency SDRAM device attributes: /CS latency SDRAM device attributes: /WE latency
Vendor:PMI
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus, EPIC-IIB are trademarks of Texas Instruments.
Package Cooled:SOP-8D/C:05+
RTCX2, RTCX1 C Timekeeping crystal. Connect a 32.768 KHz crystal between RTCX2 and RTCX1 to supply the timeCbase for the real time clock. The OP14G supports both 6 pF and 12.5 pF load capacitance crystals as selected by an SFR bit described below. To prevent noise from affecting the RTC, the RTCX2 and RTCX1 pin should be guardCringed with GND2.
Vendor:PMIPackage Cooled:DIPD/C:800
NOTES: 1. Power supply requirement applies as indicated in the DC electrical characteristics tables. 2. Skews are valid across specified voltage range. 3. Duty cycle skew is the difference between a tPLH and tPHL propagation delay through a device. 4. Minimum input swing for which AC parameters are guaranteed. The device has a DC gain of ~40. 5. The VCMR is referenced to the most positive side of the di...
Vendor:PMIPackage Cooled:DIPD/C:800
NOTES: 1. Power supply requirement applies as indicated in the DC electrical characteristics tables. 2. Skews are valid across specified voltage range. 3. Duty cycle skew is the difference between a tPLH and tPHL propagation delay through a device. 4. Minimum input swing for which AC parameters are guaranteed. The device has a DC gain of ~40. 5. The VCMR is referenced to the most positive side of the di...
Vendor:ADID/C:07+
As an alternative to a full chip erase, the device is organized into sectors that can be individually erased. There are two 8K-byte parameter block sections and four main memory blocks. The 8K- byte parameter block sections and the four main memory blocks can be independently erased and reprogrammed. The Sector Erase command is a six bus cycle operation. The sector address is latched on the falling WE edge...