Index "P"Vendor:STPackage Cooled:1AA3D/C:06+
A current sense methodology is implemented to disable the output drive signal to the MOSFETs when an over-current condition is detected. The voltage drop created by the output current flowing across a sense resistor is presented to an internal comparator. When the voltage developed across the sense resistor exceeds the comparator threshold voltage, the chip reduces the output drive signal to the ...
Vendor:STPackage Cooled:TO-92D/C:0
Switching Performance Encode Pulsewidth High Encode Pulsewidth Low Aperture Delay (tA) Aperture Uncertainty (Jitter) & Noise Data Sync Setup Time (tSDS) Data Sync Hold Time (tHDS) Data Sync Pulsewidth Time (tPWDS) Output Valid Time (tV) Output Prop. Delay (tPD)
Vendor:STPackage Cooled:TO-92D/C:0
Switching Performance Encode Pulsewidth High Encode Pulsewidth Low Aperture Delay (tA) Aperture Uncertainty (Jitter) & Noise Data Sync Setup Time (tSDS) Data Sync Hold Time (tHDS) Data Sync Pulsewidth Time (tPWDS) Output Valid Time (tV) Output Prop. Delay (tPD)
Vendor:1600
• Wide frequency rangeC80.0MHz to 180.0MHz • User specified tolerance available • Will withstand vapor phase temperatures of 253C for 4 minutes maximum • Space-saving alternative to discrete component oscillators • 3.3 Volt operation • High shock resistance, to 1000g • Low Jitter - Wavecrest jitter characterization available
Vendor:1600
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. +18VSupply Voltage (VS+ to VL) Input VoltageVL -0.3V, VL+ +0.3V Continuous Output Current200mA
SRAM Compliant with PCI Specification, Revision 2.1 PCI Interface Operates up to 66 MHz/5.0V Compatible IEEE 1149.1 Compliant, JTAG Boundary-scan Interface PD Max = 1W (66 MHz), Full Operating Conditions Nap, Doze and Sleep Modes for Power Savings Two-channel Integrated DMA Controller Message Unit C Intelligent Input/Output (Two-wire Interface) Message Controller C Two Door Bell Registers C Inbound an...
Vendor:STPackage Cooled:SOT-223D/C:05+
Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produc- es the true total Turn-Off Energy Loss.
Vendor:1200
Peripheral Features D 34 I/O Pins D Additional 32-Bit Accumulator D Three 16-Bit Timer/Counters D System Timers D Programmable Watchdog Timer D Full-Duplex Dual USARTs D Master/Slave SPI D 16-Bit PWM D Power Management Control D Idle Mode Current < 1mA D Stop Mode Current < 1mA D Programmable Brownout Reset D Programmable Low Voltage Detect D 21 Interrupt Sources D Two Hardware Breakpoi...
Vendor:STMICROELECTRONICSD/C:O9+
MAX 7000A devices use CMOS EEPROM cells to implement logic functions. The user-configurable MAX 7000A architecture accommodates a variety of independent combinatorial and sequential logic functions. The devices can be reprogrammed for quick and efficient iterations during design development and debug cycles, and can be programmed and erased up to 100 times.
Vendor:STPackage Cooled:SOT-223
Vendor:STPackage Cooled:TO-223D/C:0
COMPLETE INTERFACE BETWEEN LNB AND I2CTM BUS BUILT-IN DC/DC CONTROLLER FOR SINGLE 12V SUPPLY OPERATION AND HIGH EFFICIENCY (Typ. 94% @ 750mA) TWO SELECTABLE OUTPUT CURRENT LIMIT (450mA / 750mA) ACCURATE BUILT-IN 22KHz TONE OSCILLATOR SUITS WIDELY ACCEPTED STANDARDS FAST OSCILLATOR START-UP FACILITATES DiSEqCTM ENCODING BUILT-IN 22KHz TONE DETECTOR SUPPORTS BI-DIRECTIONAL DiSEqCTM 2.0 13/18V...
Vendor:STPackage Cooled:SOT-223D/C:05+
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to a...
Vendor:STPackage Cooled:ORG PACKINGD/C:08+
Vendor:N/APackage Cooled:SOT223D/C:08+09+
+5V Analog Supply Voltage Left Voltage Common No Connection Left Current Output (0 to 1.2mA) Servo Decoupling Capacitor Reference Decoupling Capacitor Right Current Output (0 to 1.2mA) No Connection Right Voltage Common Analog Common Digital Common Mode Control 2 Right Data Input Bit Clock System Clock Word Clock Left Data Input Mode Control 3 Mode Control 1 +5V Digital Supply Voltage
Vendor:N/APackage Cooled:SOT223D/C:08+09+
+5V Analog Supply Voltage Left Voltage Common No Connection Left Current Output (0 to 1.2mA) Servo Decoupling Capacitor Reference Decoupling Capacitor Right Current Output (0 to 1.2mA) No Connection Right Voltage Common Analog Common Digital Common Mode Control 2 Right Data Input Bit Clock System Clock Word Clock Left Data Input Mode Control 3 Mode Control 1 +5V Digital Supply Voltage
Package Cooled:QFND/C:N/A
Vendor:STPackage Cooled:TO-92
The P0103DA surface mount, center tap, Schottky rectifier series has been designed for applications requiring low forward drop and small foot prints on PC board. Typical applications are in disk drives, switching power supplies, converters, free-wheeling diodes, battery charging, and reverse battery protection.
Vendor:sgsPackage Cooled:sgsD/C:dc03
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be m...
Package Cooled:SOT-89D/C:08+
200 mA Source Capability Output Tracks within 10 mV Worst Case Low Dropout (0.35 V Typ. @ 200 mA) Low Quiescent Current Thermal Shutdown Short Circuit Protection Wide Operating Range Internally Fused Leads in SO−8 Package For Automotive and Other Applications Requiring Site and Change Control
Vendor:SOT223PLANARandTOPGLASSPackage Cooled:7850D/C:ST
Vendor:STPackage Cooled:SOT-223D/C:05+
n CAN I/F CAN serial bus interface block as described in the CAN specification part 2.0B (Passive) Interface rates up to 250k bit/s are supported utilizing standard message identifiers n Programmable double buffered USART n A/D 8-bit, 8 channel, 1-LSB Resolution, with improved Source Impedance and improved channel to channel cross talk immunity n Multi-Input-Wake-Up (MIWU) edge selectable wa...
Vendor:STPackage Cooled:SOT-223D/C:05+
n CAN I/F CAN serial bus interface block as described in the CAN specification part 2.0B (Passive) Interface rates up to 250k bit/s are supported utilizing standard message identifiers n Programmable double buffered USART n A/D 8-bit, 8 channel, 1-LSB Resolution, with improved Source Impedance and improved channel to channel cross talk immunity n Multi-Input-Wake-Up (MIWU) edge selectable wa...
Vendor:STPackage Cooled:0519+PBD/C:860
READ: The AT28C010-12DK is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state when either CE or OE is high. This dual-line control gives designers flexibility in preventing bus contention in their system.
Vendor:NECPackage Cooled:QFP
Vendor:NECPackage Cooled:QFP
Passive components affect the electrical performance of electronic systems. In reality, every resistor has some parasitic series inductance and a parasitic capacitance; and every capacitor has both series resistance and inductance. At low speeds, these parasitics do not affect the performance of resistors and capacitors. However, at higher speeds, these parasitics cause mismatch in a termination. To preven...
Vendor:STPackage Cooled:TO-92D/C:1
Device internal reset In order to prevent inadvertent Write operations during Power-up, a Power On Reset (POR) circuit is included. At Power-up (continuous rise of VCC), the device will not respond to any instructions until the VCC has reached the Power On Reset threshold voltage (this threshold is lower than the VCC min. operating voltage defined in DC and AC PARAMETERS). When VCC has passed over t...
Vendor:68000Package Cooled:STD/C:TO-92
Fast Function Blocks (FFB) The XC7336 provides four Fast Function Blocks which have 24 inputs that can be individually selected from the UIM, 12 fast input pins, or the 9 Macrocell feedbacks from the Function Block. The programmable AND array in each Fast Function Block generates 45 product terms to drive nine Macrocells in each FFB. Each Macrocell (Figure 2), can be configured for registered or...
The IDT70V3319/99 is a high-speed 256/128K x 18 bit synchronous Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very short cycle times. With an input data register...
Vendor:SAMSUMGPackage Cooled:05+D/C:4000
NON-MASKABLE INTERRUPT: is an edge triggered input which causes a type 2 interrupt. An interrupt service routine is called via an interrupt vector lookup table located in system memory. NMI is not maskable internally by software. A transition from LOW to HIGH initiates the interrupt at the end of the current instruction. This input is internally synchronized.
Vendor:SAMSUNGPackage Cooled:SAMSUNGD/C:02+
The left and right audio outputs are available at RCA jacks CN104 and CN105 respectively. The outputs are taken from the low-pass filter, which has a gain of 2. The low-pass filter may be configured for one of two cutoff frequencies: 54kHz or 108kHz. Typically, the 54kHz cutoff frequency is used for all measurements. For f-3dB = 54kHz, jumpers JP101 through JP106 must all be installed. For f-3dB = 108...
Vendor:STPackage Cooled:TO-223D/C:0
Direct Interface to ISA and PCMCIA with No Wait States High Impedance Speaker Interface Flexible Bus Interface 16-Bit Data and Control Paths Fast Access Time (40 ns) Pipelined Data Path Handles Block Word Transfers for Any Alignment High Performance Chained ("Back-to- Back") Transmit and Receive Flat Memory Structure for Low CPU Overhead Dynamic Memory Allocation Between Transmit and Receive...
Vendor:STPackage Cooled:TO-92D/C:0
Vendor:STPackage Cooled:TO-92D/C:0
Vendor:STPackage Cooled:TO-92D/C:1
Analog composite video signal output or Cb or B signal output current drive(positive) Analog composite video signal output or Cb or B signal output current drive(negative) Power Supply for CVBS / Cb / B DAC1 circuit Analog luminance or G signal output current drive(positive) Analog luminance or G signal output current drive(negative) Power Supply for Y / G DAC1 circuit Analog chrominance signal output o...
Vendor:STPackage Cooled:TO-92D/C:0
Data file management software Flash Translation Layer (FTL) provides data file storage and memory man- agement much like a disk operating system Intels Series 2 Flash Memory Cards coupled with flash file management software effectively provide a removable all-silicon mass storage solution with higher perform- ance and reliability than disk-based memory architectures
Vendor:PULSEPackage Cooled:SMD电感D/C:04+
The information and specifications herein are believed to be correct at time of publication. However, V-INFINITY LLC ac cepts no responsibility for consequences arising from printing errors or inaccuracies. Specifications are subject to change without notice. No rights under any patent accompany the sale of any such product(s) or information contained herein.
Vendor:PULSEPackage Cooled:SMD电感D/C:04+
The information and specifications herein are believed to be correct at time of publication. However, V-INFINITY LLC ac cepts no responsibility for consequences arising from printing errors or inaccuracies. Specifications are subject to change without notice. No rights under any patent accompany the sale of any such product(s) or information contained herein.
Package Cooled:SMD-8D/C:04+
Vendor:ROHMPackage Cooled:TSSOPD/C:02
Vendor:ROHMPackage Cooled:TSSOPD/C:02
All Ports Fast Switching High On-Off Output-Voltage Ratio Low Crosstalk Between Switches Extremely Low Input Current Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101)
Vendor:ENEPackage Cooled:LQFP144D/C:2003
When using the minimum 0.1µF capacitors, make sure the capacitance does not degrade excessively with temperature. If in doubt, use capacitors with a larger nominal value. The capacitors equivalent series resis- tance (ESR) usually rises at low temperatures and influ- ences the amount of ripple on V-. To reduce the output impedance at V-, use larger capacitors (up to 10µF). Bypass VCC to ground w...
Vendor:ENE TECHNOLOGY INCD/C:06+
The output stages consist of a DMOS H-bridge. Integrated circuits protect the outputs against short-circuit to ground and to the supply voltage. Positive and negative voltage spikes, which occur when switching inductive loads, are limited by integrated freewheeling diodes. A monitoring circuit for each output transistor detects whether the particular transitor is active and in this case prevents the corr...
Vendor:PHID/C:98
NOTES: 1. Dimension are in inches. 2. Metric equivalents are given for general information only. 3. Beyond r (radius) maximum, TL shall be held for a minimum length of .011 (0.28 mm). 4. Dimension TL measured from maximum HD. 5. Body contour optional within zone defined by HD, CD, and Q. 6. Leads at gauge plane .054 +.001 -.000 inch (1.37 +0.03 -0.00 mm) below seating plane shall be within .008 inch (...
Vendor:PHID/C:98
NOTES: 1. Dimension are in inches. 2. Metric equivalents are given for general information only. 3. Beyond r (radius) maximum, TL shall be held for a minimum length of .011 (0.28 mm). 4. Dimension TL measured from maximum HD. 5. Body contour optional within zone defined by HD, CD, and Q. 6. Leads at gauge plane .054 +.001 -.000 inch (1.37 +0.03 -0.00 mm) below seating plane shall be within .008 inch (...
Vendor:SHARPPackage Cooled:SOT-23-5
The Hyundai HYM76V16C755HGT4 Series are 16Mx72bits ECC Synchronous DRAM Modules. The modules are composed of eigh- teen 16Mx4bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. One 0.22uF and one 0.0022uF decoupling capacitors per each SDRAM are mounted on the PCB.
Vendor:ST
The transient response of the circuit is enhanced by allowing a much faster charge/discharge of the voltage amplifier output capacitance when the output voltage falls outside a certain regulation window. A number of additional features such as UVLO circuit with selectable hysteresis levels, an accurate reference voltage for the voltage amplifier, zero power detect, OVP/enable, peak current limit, power li...
Vendor:ATMELPackage Cooled:01+D/C:08+
† NOTICE: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Package Cooled:PLCC-44D/C:99
If the command byte is a MUX command byte, any additional data bytes sent after the MUX command code will not be acknowledged. If the read/write bit in the address is a logic 1, then a read operation follows and the data sent out depends on the previously stored command code.
Vendor:STPackage Cooled:DO214AAD/C:08+
If the state of the selected CAP/MAT signal is 1 and EDGE is set to detect rising edges (EDGE = 0) or, if detection of falling edges is selected (EDGE = 1) and the state of the selected CAP/MAT signal is 0, an ADC conversion will immediately be initiated when the START bits are written to. So the first conversion behaves as a level triggered event rather than edge triggered.
Vendor:TECCORPackage Cooled:DO214AAD/C:08+
INPUT - Is an analog input for controlling the PWM pulse width of the bridge. A voltage lower than Vcc/2 will produce greater than 50% duty cycle pulses out of OUTPUT A. A voltage higher than Vcc/2 will produce greater than 50% duty cycle pulses out of OUTPUT B.
Vendor:Littelfu..Package Cooled:DO214AAD/C:08+
NOTES: 1. WE is high in read Cycle. 2. Device is continuously selected when CE1 = VIL and CE2= VIH. 3. Address valid prior to or coincident with CE1 transition low and/or CE2 transition high. 4. OE = VIL . 5. The parameter is guaranteed but not 100% tested.
Vendor:STPackage Cooled:DO214AAD/C:08+
The XC95144 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of eight 36V18 Function Blocks, providing 3,200 usable gates with propagation delays of 7.5 ns. See Figure 2 for the architec- ture overview.
Vendor:STPackage Cooled:DO214AAD/C:08+
The HAL 805 features a temperature-compensated Hall plate with choppered offset compensation, an A/D converter, digital signal processing, a D/A converter with output driver, an EEPROM memory with redun- dancy and lock function for the calibration data, a serial interface for programming the EEPROM, and protection devices at all pins. The internal digital signal processing is of great benefit because...
Vendor:STPackage Cooled:DO214AAD/C:08+
Performance Latest processor technology, Intel® Pentium® 4 Processor with HT Technology 3.40 GHz Max. 4.0 GB DDR-SDRAM for memory demanding applications AGP 8x Pro 50 to deliver enough energy to accommodate even the most powerful graphics subsystems Optional SCSI controller with 10k and 15k rpm hard disk drives for high speed storage access RAID (0) support for SCSI disks to enhanc...
Vendor:STPackage Cooled:DO-214AAD/C:08+
Performance Latest processor technology, Intel® Pentium® 4 Processor with HT Technology 3.40 GHz Max. 4.0 GB DDR-SDRAM for memory demanding applications AGP 8x Pro 50 to deliver enough energy to accommodate even the most powerful graphics subsystems Optional SCSI controller with 10k and 15k rpm hard disk drives for high speed storage access RAID (0) support for SCSI disks to enhanc...
Vendor:Littelfu..Package Cooled:DO214AAD/C:08+
During the first 30 ms after enabling VCO1 the modulator phase comparator is in speed- up mode. In this mode the current of the pase comparator which charges the loop filter is much larger than in normal mode. Additionally to the automatically switched 30 ms speed-up mode, the speed-up can be activated for any time by setting the bit SU1.
Vendor:TECCORPackage Cooled:DO214AAD/C:08+
2. When using this product, please observe the absolute maximum ratings and the instructionsfor use outlined in these specificationsheets, as well as the precautionsmentioned below. Sharp assumes no responsibility for any damage resulting from use of the product which does not comply with the absolute maximum ratings and the instructionsincluded in these specificationsheets, and the precautionsmentionedbe...
Vendor:STPackage Cooled:DO214AAD/C:08+
VOX output The VOX detection signal is output from this pin. This pin should be connected through a resistor (100-200kΩ) to the power supply. VOX detection control This pin should be connected through a resistor (10 to 470kΩ) and a capacitor in parallel to the ground. The resistance determines the sensitivity of VOX detection. Internal reference supply voltage output This pin should be ground...
Vendor:TECCORPackage Cooled:DO214AAD/C:08+
PARAMETER VCC Turn On Voltage VCC Turn Off Voltage VCC Hysteresis VCC Shunt Regulator Voltage VCC Shunt Regulator Voltage VCLAMP1mA C VTURNON Margin Input DC Supply Current Normal Operation Start-Up Shutdown Threshold (at ITH/RUN) Start-Up Current Source Regulated Feedback Voltage
Vendor:Littelfu..Package Cooled:5D/C:08+
The key parameters of a damper diode are the peak forward voltage (VFP), the forward voltage (VF ) and the recovery time (trr). Reverse recovery time : trr The table in fig.1 gives the maximum reverse recovery time for the three high frequency damper diodes.
Vendor:STPackage Cooled:DO214AAD/C:08+
Chip Select (Pin 23) Chip Select Input. A high on this input produces a low level on all outputs, regardless of what appears at the address or Latch Enable inputs. A low level on the Chip Select input allows the selected output to produce a high level.