Index "P"Vendor:50000
Vendor:36Package Cooled:TYCOD/C:N/A
Stresses above those listed under "Absolute Maximum Ratings" may causes permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Vendor:N/APackage Cooled:SMDD/C:96
Vendor:XILINXPackage Cooled:01+D/C:3
After the software data protections three-byte command code is given, a byte load is performed by applying a low pulse on the WE or CE input with CE or WE low (respec- tively) and OE high. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE. The 64 bytes of data must be loaded into each sector by the same procedure as outli...
Vendor:XILINXPackage Cooled:01+D/C:161
➀ Typical at TA = +25C under nominal line voltage and balanced "full-load" (5V @7.5A, 3.3V @ 7.5A) conditions unless otherwise noted. ➁ Ripple/Noise (R/N) measured over a 20MHz bandwidth. All models are specified with 22µF, low-ESR, input capacitor and 10µF tantalum in parallel with 1µF ceramic output capacitors.
Vendor:LITTELFUSEPackage Cooled:SMBD/C:04+PB
With reference to WG 2 Resolution M33.31 in document N 2927, and WG 3 Resolution M12.11 in document N 2933, SC 2 instructs WG 2, in corporation with WG 3 to prepare a proposal to cover the requirements for Collection Identifiers for 10646 subsets and report to the next SC 2 Plenary. SC 2 further invites National Bodies and Liaison Organizations to communicate their needs to WG 2. SC 2 invites US and Canadia...
Vendor:TIPackage Cooled:QFP
HyperTransport o HyperTransport Tunnel is compliant to the HyperTransport I/O Link Specification, version 1.03 o Side A of the HyperTransport Tunnel is a 16-bit interface; Side B is 8-bit o Either side of the tunnel can be connected to a host or another downstream HT device o Supports double hosted chains (CPU on each port) o Each side of the tunnel has independently programmable 8-bit...
Vendor:TLDPackage Cooled:SOPD/C:2008+
drop over the input signal source resistances RINC, RINF is minimized with extremely low input bias currents I INC, IINF. The above mentioned resistors (RINC, RINF) are necessary for the input current limitation during the transients on the VBAT line. The input source resistors must be dimensioned so that in case of a line transient the input current in the input pin, clamped with the internal inpu...
Vendor:PSCPackage Cooled:DIP24D/C:2007+
The MAX4785CMAX4788 family of switches feature inter- nal current limiting to prevent host devices from being damaged due to faulty load conditions. These analog switches have a low 0.7Ω on-resistance and operate from a 2.3V to 5.5V input voltage range. They are avail- able with guaranteed 50mA and 100mA current limits, making them ideal for load-switching applications. When the switch is on and a load...
Vendor:PERFPackage Cooled:DIP/24
Carrier Detect (Active-LOW). These inputs are associated with individual UART channels A and B. A logic LOW on these pins indicates that a carrier has been detected by the modem for that channel. The state of these inputs is reflected in the modem status register (MSR).
Vendor:PERFORMAD/C:07+
Flexible control options for power management are available when the serial port is inactive. The auto-powerdown feature functions when FORCEON is low and FORCEOFF is high. During this mode of operation, if the device does not sense a valid RS-232 signal on the receiver input, the driver output is disabled. If FORCEOFF is set low and EN is high, both the driver and receiver are shut off, and the supply cu...
Vendor:GEC PLESSEYPackage Cooled:CDIP28金面D/C:8742
Vendor:PERFPackage Cooled:DIP/28
Controller (host) sends a start bit. Controller (host) sends the write address D2 (H) ICS clock will acknowledge Controller (host) sends the begining byte location = N ICS clock will acknowledge Controller (host) sends the data byte count = X ICS clock will acknowledge Controller (host) starts sending Byte N through Byte N + X -1 (see Note 2) • ICS clock will acknowledge each byte one...
Vendor:PERFPackage Cooled:DIP/28
Controller (host) sends a start bit. Controller (host) sends the write address D2 (H) ICS clock will acknowledge Controller (host) sends the begining byte location = N ICS clock will acknowledge Controller (host) sends the data byte count = X ICS clock will acknowledge Controller (host) starts sending Byte N through Byte N + X -1 (see Note 2) • ICS clock will acknowledge each byte one...
Vendor:PERF
The CKE input determines whether the CLK input is enabled. The next rising edge of the CLK signal will be valid when is CKE HIGH and invalid when LOW. When CKE is LOW, the device will be in either power-down mode, CLOCK SUSPEND mode, or SELF-REFRESH mode. CKE is an asynchronous input.
Vendor:PERFORMANCEPackage Cooled:STKD/C:0623+
The device converts the balanced 2-Wire input, presented by the line at Tip and Ring, to a ground referenced signal at TX. This circuit operates with or without loop current; signal reception with no loop current is required for on-hook reception enabling the detection of Caller Line Identification (CLI) signals.
Vendor:PERFORMANCEPackage Cooled:STKD/C:0623+
The device converts the balanced 2-Wire input, presented by the line at Tip and Ring, to a ground referenced signal at TX. This circuit operates with or without loop current; signal reception with no loop current is required for on-hook reception enabling the detection of Caller Line Identification (CLI) signals.
Vendor:ASIPackage Cooled:CDIP28金面D/C:——
Ground Key Detection - A low active LS TTL - compatible logic output. This output is enabled if the DC current into the ring lead exceeds the DC current out of the tip lead by more than 20mA, and disabled if this current difference is less than 10mA.
Vendor:IDTPackage Cooled:DIPD/C:00+
Vendor:PERFORMANCEPackage Cooled:CDIP24金面锡脚
Vendor:PERFPackage Cooled:DIP/20
The measured distortion of a linear amplifier, normally called Intermodulation Distortion (IMD), is expressed as the power in decibels below the amplifiers peak power or below that of one of the tones employed to produce the complex test signal. A signal of three or more tones is used in certain video IMD tests, but two tones are common for HF SSB. The two-tone test signal provides a standard, contr...
Vendor:perfPackage Cooled:perfD/C:dc91
Device programming is performed a byte/word at a time by executing the four-cycle Program Com- mand write sequence. This initiates an internal algorithm that automatically times the program pulse widths and verifies proper cell margin. Faster programming times can be achieved by placing the HY29DS16x in the Unlock Bypass mode, which requires only two write cycles to program data in- stead of four.
Vendor:GEC PLESSEYPackage Cooled:CDIP24D/C:88/89
Isolation in Power-Down Mode, V+ = 0 Specified Break-Before-Make Switching Low ON-State Resistance (1 Ω) Control Inputs Are 5.5-V Tolerant Low Charge Injection Excellent ON-State Resistance Matching Low Total Harmonic Distortion (THD) 1.65-V to 5.5-V Single-Supply Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 C 2000-V Human-Body Model (A114...
Vendor:GEC PLESSEYPackage Cooled:CDIP24D/C:88/89
Isolation in Power-Down Mode, V+ = 0 Specified Break-Before-Make Switching Low ON-State Resistance (1 Ω) Control Inputs Are 5.5-V Tolerant Low Charge Injection Excellent ON-State Resistance Matching Low Total Harmonic Distortion (THD) 1.65-V to 5.5-V Single-Supply Operation Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Performance Tested Per JESD 22 C 2000-V Human-Body Model (A114...
Vendor:perfPackage Cooled:perfD/C:dc92
The Bluetooth controller consists of a number of functional blocks that operate under control of the embedded microcontroller. The microcontroller has access to these blocks via the AMBA System Bus (ASB) and the VLSI Peripheral Bus (VPB).
Vendor:perfPackage Cooled:perfD/C:dc92
The internal circuit is composed of 3 stages in- cluding buffer output, which enables high noise immunity and stable output. All inputs and outputs are equipped with protec- tion circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
Vendor:perfPackage Cooled:perfD/C:dc92
The internal circuit is composed of 3 stages in- cluding buffer output, which enables high noise immunity and stable output. All inputs and outputs are equipped with protec- tion circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
Vendor:PERFPackage Cooled:DIP/20
The following are trademarks of Conexant Systems, Inc.: Conexant™, the Conexant C™ symbol, and Whats Next in Communications Technologies™. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners.
Vendor:n/aPackage Cooled:DIP-20D/C:06+
Hynix HYMD232M646A(L)8-J/M/K/H/L series is unbuffered 200-pin double data rate Synchronous DRAM Small Outline Dual In-Line Memory Modules (SO-DIMMs) which are organized as 32Mx64 high-speed memory arrays. Hynix HYMD232M646A(L)8-J/M/K/H/L series consists of eight 32Mx8 DDR SDRAM in 400mil TSOP II packages on a 200pin glass-epoxy substrate. Hynix HYMD232M646A(L)8-J/M/K/H/L series provide a high performance 8-b...
Vendor:PERFPackage Cooled:DIP/22
The KM4110 offers superior dynamic performance with a 75MHz small signal bandwidth and 50V/µs slew rate. The combination of low power, high output current drive, and rail-to-rail performance make the KM4110 well suited for battery-powered communication/ computing systems.
If the I/O is configured as an output, then either Q1 or Q2 is enabled, depending on the state of the output port register. Care should be exercised if an external voltage is applied to an I/O configured as an output because of the low-impedance paths that exist between the pin and either VDD or VSS.
Vendor:PERFPackage Cooled:DIP/22
2. These Yamaha Products are designed only for commercial and normal industrial ap- plications, and are not suitable for other uses, such as medical life support equipment, nuclear facilities, critical care equipment or any other application the failure of which could lead to death, personal injury or environmental or property damage. Use of the Products in any such application is at the customer's sol...
Vendor:PERFORMANCEPackage Cooled:LCC22
Vendor:perfPackage Cooled:perfD/C:dc92
Notes: 1. ZZZZ or ZZZ denotes the assigned product dash number. This number will be assigned by factory after the output frequency and spread percent programming data is received from the customer. 2. FJXC or FX suffix is used for products programmed in field by Cypress distributors.
Vendor:PERFPackage Cooled:DIP/22
Vendor:464
Vendor:PERFPackage Cooled:DIP/22
The information and specifications herein are believed to be correct at time of publication. However, V-INFINITY LLC ac cepts no responsibility for consequences arising from printing errors or inaccuracies. Specifications are subject to change without notice. No rights under any patent accompany the sale of any such product(s) or information contained herein.
Vendor:PERFPackage Cooled:DIP/22
The information and specifications herein are believed to be correct at time of publication. However, V-INFINITY LLC ac cepts no responsibility for consequences arising from printing errors or inaccuracies. Specifications are subject to change without notice. No rights under any patent accompany the sale of any such product(s) or information contained herein.
Vendor:PERFPackage Cooled:DIP/22
These octal D-type transparent latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
Vendor:perfPackage Cooled:perfD/C:dc87
Over a Dynamic Range 1000 to 1 Over a Dynamic Range 1000 to 1 Over a Dynamic Range 1000 to 1 Over a Dynamic Range 1000 to 1 Over a Dynamic Range 1000 to 1 Line Frequency = 45 Hz to 65 Hz, HPF On AVDD = DVDD = 5 V + 175 mV rms/120 Hz Channel 1 = 20 mV rms/60 Hz, Gain = 16, Range = 0.5 V Channel 2 = 175 mV rms/60 Hz, Gain = 4 AVDD = DVDD = 5 V 250 mV dc Channel 1 = 20 mV rms/60 Hz, Gain = 16, Range =...
Note 8: tRNMI-LEFT and tRNMI-RIGHT are a measure of how much phase noise (jitter) the deserializer can tolerate in the incoming data stream before bit errors occur. The Deserializer noise margin specification does not include transmitter jitter and is Guaranteed By Statistical Analysis (GBSA). Please see Figure 8 for a graphical representation.
Vendor:PACEMIPS
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Vendor:PACEMIPS
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Vendor:PERFORMANCE
Atmel Corporation 2004. All rights reserved. Atmel ® and combinations thereof are the registered trademarks of Atmel Corporation or its sub- sidiaries. ARM ®, ARM7 ®, and ARM7TDMI® are the registered trademarks of ARM, Ltd. Inc. CompactFlash® is the registered trademark of Sandisk Corporation. Memory Stick Pro ™ is the trademark of Sony Electronics Inc. Other terms and product name...
If the CPE is a telephone, one way to achieve good CAS speech immunity is to put CAS detection on the telephone hybrid or speech IC receive pair instead of on Tip and Ring. Talkdown immunity improves because the near end speech has been attenuated while the CAS level is the same as on Tip/Ring, resulting in improved signal to speech ratio. Talkoff immunity is also improved because the near end speech has be...
Vendor:PERFORMAPackage Cooled:DIP/22
Bidirectional I/O lines. Software instructions deter- mine the CMOS output or SCHMITT trigger input with a pull-high resistor (determined by pull-high op- tions). The external interrupt and timer input are pin-shared with the PC0 and PC1, respectively. The external interrupt input is activated on a high to low transition.
Vendor:NECD/C:2004+
Background An industry leader in high brightness LED technology, Agilent Technologies offers a wide range of surface-mount (SMT) LEDs, including Subminia- ture lamps, ChipLEDs and High flux LEDs. As more applications demand SMT LEDs, we have introduced the Agilent PLCC-2 SMT LEDs. These new products deliver top emission in the industry-standard PLCC-2 package.
Vendor:ACME RADIATORD/C:N/A
Vendor:GS ?Package Cooled:N/A?D/C:3000
NOTES: 11. Measured using Eastman Kodak neutral white test card having 90% diffuse reflectance located a distance from the front surface of the reflective sensors. Reference: Eastman Kodak catalog number #1257795. 12. Crosstalk is the output voltage measured with the indicated current on the LED and with no reflecting surface. Ambient light is excluded with a black box approximately 20 cm in each dimens...
Vendor:gsPackage Cooled:gsD/C:dc94
When operated in its default mode, the sensor gener- ates a VGA image at 30 frames per second (fps). An on- chip analog-to-digital converter (ADC) generates a 10- bit value for each pixel. The pixel data is output on a 10-bit output bus and qualified by an output data clock (PIXCLK), together with LINE_VALID and FRAME_VALID signals. A FLASH output strobe is pro- vided to allow an external Xenon or LE...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
There are two limitations on the power handling ability of a transistor: average junction temperature and second break- down. Safe operating area curves indicate IC C VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipa- tion than the curves indicate. The data of Figures 5 and 6 is based on T J(pk) = 150_C; T C is va...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
If the FIFO is configured to have two write enables, when Write Enable (WEN1) is LOW and Write Enable 2/Load (WEN2/LD) is HIGH, data can be loaded into the input register and RAM array on the LOW-to-HIGH transition of every write clock (WCLK). Data is stored in the RAM array sequentially and independently of any on-going read operation.
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
The equivalent circuit for the sensing element is shown in the figure below; when a linear acceleration is applied, the proof mass displaces from its nominal position, causing an imbalance in the capacitive half-bridge. This im- balance is measured using charge integration in response to a voltage pulse applied to the sense capacitor.
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
The equivalent circuit for the sensing element is shown in the figure below; when a linear acceleration is applied, the proof mass displaces from its nominal position, causing an imbalance in the capacitive half-bridge. This im- balance is measured using charge integration in response to a voltage pulse applied to the sense capacitor.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?71609.
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
During the preamble, each period of the carrier signal decreases the gain if the internal signal exceeds the reference level. If the signal does not achieve the reference level, each period increases the gain. After 192 preamble periods, the standard gain control mode is activated. In this mode, the gain is decreased every two periods if the internal signal exceeds the reference level and increased every e...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
During the preamble, each period of the carrier signal decreases the gain if the internal signal exceeds the reference level. If the signal does not achieve the reference level, each period increases the gain. After 192 preamble periods, the standard gain control mode is activated. In this mode, the gain is decreased every two periods if the internal signal exceeds the reference level and increased every e...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
The Hyundai HYM72V16M656TU6 Series are 8Mx64bits Synchronous DRAM Modules. The modules are composed of four 16Mx16bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. Two 0.33uF and one 0.1uF decoupling capacitors per each SDRAM are mounted on the PCB.
Vendor:VISHAYPackage Cooled:DO-41D/C:07+
Vendor:100Package Cooled:2007
The 78253 series of converter transformers are specifically designed for use with the MAX253 chip set to provide isolated power supplies. The 5V version can supply 1W and the 3.3V version can supply 500mW. A centre tapped secondary winding allows for full bridge, half bridge or voltage doubling. The surface mount devices are fully compatible with CECC00802 to 280C which allows them to be placed an...
Vendor:100
The 78253 series of converter transformers are specifically designed for use with the MAX253 chip set to provide isolated power supplies. The 5V version can supply 1W and the 3.3V version can supply 500mW. A centre tapped secondary winding allows for full bridge, half bridge or voltage doubling. The surface mount devices are fully compatible with CECC00802 to 280C which allows them to be placed an...
Vendor:GS ?Package Cooled:N/A?D/C:5300
Figure 5 shows the effects of a fast transient on the output voltage of the regulator. As shown in this figure, the ESR of the output capacitor produces an instanta- neous drop equal to the (DVESR=ESR3DI) and the ESL effect will be equal to the rate of change of the output current times the inductance of the capacitor. (DVESL =L3DI/Dt). The output capacitance effect is a droop in the output voltage proportio...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
HR700 Series DC/DC converters are designed to provide full power operation over the input voltage range of 19 to 40 VDC. Operation below an input of 19 volts is possible with derated output power. Outputs are available as 5, 12, and 15 VDC single, dual and triple outputs. The converters typically provide greater than 80% effi- ciency over the entire input range. Line regulation is typically within 0.1% ...
Vendor:SEMIWILLPackage Cooled:DO-15
In 2-channel mode, Transistors A1, B2, C1, and D2 are turned on by a Logic 1 on inputs INA and INC, and Transistors A2, B1, C2, and D1 are turned on by a Logic 0 on inputs INA and INC. In 4-channel mode, Transistors A1, B1, C1, and D1 are turned on by a Logic 1 on the four inputs, and Transistors A2, B2, C2, and D2 are turned on by a Logic 0 on the four inputs (see the Functional Block Diagrams).
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
The LTC®1730 is a complete pulse charger for 1-cell lithium-ion batteries. When charging a depleted cell, the internal MOSFET is fully on allowing the current limited input power source to provide charge current to the battery, virtually eliminating heat generation in the charger.
Vendor:VISHAYPackage Cooled:2007D/C:2008+
The LTC®1730 is a complete pulse charger for 1-cell lithium-ion batteries. When charging a depleted cell, the internal MOSFET is fully on allowing the current limited input power source to provide charge current to the battery, virtually eliminating heat generation in the charger.
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
When using the board as a stand alone unit or with the HSC- INTERFACE BOARD, external supplies must be provided. This evaluation board has five power supply inputs: VDD, AGND, VSS, VDRIVE and DGND. +5 V must be connected to the VDD input to supply the AVDD and DVDD pins on the AD7472, the AD780 voltage reference, the positive supply pin of all three op-amps and the digital control logic. 0 V is connected...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
The DAC7811 offers excellent 4-quadrant multipli- cation characteristics, with large signal multiplying bandwidth of 10 MHz. The applied external reference input voltage (VREF) determines the full-scale output current. An integrated feedback resistor (RFB) pro- vides temperature tracking and full-scale voltage output when combined with an external cur- rent-to-voltage precision amplifier.
The TPS736xx family of low-dropout (LDO) linear voltage regulators uses a new topology: an NMOS pass element in a voltage-follower configuration. This topology is stable using output capacitors with low ESR, and even allows operation without a capacitor. It also provides high reverse blockage (low reverse current) and ground pin current that is nearly constant over all values of output current.
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
Select data in or data out on SDA or Measurement latching for transmission or output for negative power Input of internal crystal oscillator or input for external measure clock or current setting input for internal RC oscillator Output of internal RC or crystal oscillator Serial clock input for the synchronous serial interface or for No Load Condition Led indicator Serial Data. Send and receiver data ...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
Select data in or data out on SDA or Measurement latching for transmission or output for negative power Input of internal crystal oscillator or input for external measure clock or current setting input for internal RC oscillator Output of internal RC or crystal oscillator Serial clock input for the synchronous serial interface or for No Load Condition Led indicator Serial Data. Send and receiver data ...
Vendor:VISHAYPackage Cooled:2007D/C:2008+
In the fixed-voltage configuration, connecting a capacitor between the bypass pin and ground can significantly reduce noise on the output. Values ranging from 470pF to 10nF can be used, depending on the sensitivity to output noise in the application.
Vendor:台半 ?Package Cooled:06+p/b?D/C:10000
Self-discharge of NiMH and NiCd batteries is estimated based on an internal timer and temperature sen- sor. Compensations for battery tem- perature and rate of charge or dis- charge are applied to the charge, dis- charge, and self-discharge calcula- tions to provide available charge in- formation across a wide range of op- erating conditions. Battery capacity is automatically recalibrated, or learned, in...
Vendor:台半 ?Package Cooled:06+p/b?D/C:10000
Self-discharge of NiMH and NiCd batteries is estimated based on an internal timer and temperature sen- sor. Compensations for battery tem- perature and rate of charge or dis- charge are applied to the charge, dis- charge, and self-discharge calcula- tions to provide available charge in- formation across a wide range of op- erating conditions. Battery capacity is automatically recalibrated, or learned, in...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
Operating Voltage Breakdown Voltage Active Diameter Responsivity at 1300 nm Ceramic (D1)/TO-18 (D2) Fiber (D6)/FC (D4)/ST (D3)/SC (D5)1 Responsivity at 1550 nm Ceramic (D1)/TO-18 (D2) Fiber (D6)/FC (D4)/ST (D3)/SC (D5)1 Dark Current Spectral Noise Current (10 kHz, 1.0 Hz) Capacitance at VR = VOP (typ)
The TVS low capacitance device configuration is shown in Figure 4. As a further option for unidirectional applications, an additional low capacitance rectifier diode may be used in parallel in the same polarity direction as the TVS as shown in Figure 5. In applications where random high voltage transients occur, this will prevent reverse transients from damaging the internal low capacitance rectifier diode and...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
The P4KE160A provides an on-chip MIB statistics register to collect, receive, and transmit statistics for each port. Additionally it provides direct hardware support for the EtherLike MIB, Bridge MIB, MIB II (interfaces) and the first four groups of the RMON MIB. All nine groups of RMON can be supported by using additional capabilities, such as port mirroring/snooping, together with an external microcon...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
Designed for automotive ignition applications in 12 V systems, the P4KE160CADW provides outstanding control of the ignition coil when used with an appropriate Motorola Power Darlington Transistor. Engine control systems utilizing these devices for ignition coil control exhibit exceptional fuel efficiency and low exhaust emissions. The device is designed to be controlled from a singleCended Hall Sensor i...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
Designed for automotive ignition applications in 12 V systems, the P4KE160CADW provides outstanding control of the ignition coil when used with an appropriate Motorola Power Darlington Transistor. Engine control systems utilizing these devices for ignition coil control exhibit exceptional fuel efficiency and low exhaust emissions. The device is designed to be controlled from a singleCended Hall Sensor i...
Vendor:VISHAYPackage Cooled:DO-41D/C:2008+
DEVICE IDENTIFICATION: An extra 128 bytes of EEPROM memory are available to the user for device identification. By raising A9 to 12V 0.5V and using address locations 1FF80H to 1FFFFH the bytes may be written to or read from in the same manner as the regular memory array.