PSB45030P V1SIE PSB45030P V1SIE PSB45030PV1SIE

PSB45030PV1 PSB45030PV1 PSB45030PV1

PSB45030PV1.2 PSB45030PV1.2 PSB45030PV12

PSB45030PV1.2G

Vendor:SIEMENSPackage Cooled:SMDD/C:07+

The input stage of op amps are nominal PMOS differential amplifiers (see the following dia- gram), therefore the common mode input volt- age can extend to VSS-0.6V. On the other hand the common mode input voltage has to be main- tained below (VDD-1)V to keep the input device (M2 and M3) active. This implies that when us- ing HT9274 as a voltage follower, the input as well as output active range will ...

PSB45030PV1.2G

Vendor:SIEMENSPackage Cooled:SMDD/C:07+

The input stage of op amps are nominal PMOS differential amplifiers (see the following dia- gram), therefore the common mode input volt- age can extend to VSS-0.6V. On the other hand the common mode input voltage has to be main- tained below (VDD-1)V to keep the input device (M2 and M3) active. This implies that when us- ing HT9274 as a voltage follower, the input as well as output active range will ...

PSB45030PV12

Vendor:siePackage Cooled:sieD/C:dc95

Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

PSB45030PV12

Vendor:siePackage Cooled:sieD/C:dc95

Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

PSB45030P-V12 PSB45030P-V12 PSB45030PV12

PSB45030PV1SIE PSB45030PV1SIE PSB45030PV1SIE

PSB45030PV1V2

Vendor:siePackage Cooled:sieD/C:dc94

Status output from this IC to indicate that the outputs have been disabled. The outputs may be disabled due to shorted out- puts, over temperature conditions, power up reset, or output enable control pin. This output is an open drain output. Multiple status outputs may be wire ORed together. This output is low when the outputs are disabled due to a fault condition.

PSB45030-T

Vendor:SIEMENSPackage Cooled:西门子D/C:05+

NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2Transie...

PSB45030TB1025 PSB45030TB1025 PSB45030TB1025

PSB45030TO1.2G

Vendor:SIEMENSPackage Cooled:1999D/C:SMD

• Low VCE (on) Non Punch Through IGBT Technology • Low Diode VF • 10µs Short Circuit Capability • Square RBSOA • HEXFRED Antiparallel Diode with Ultrasoft Diode Reverse Recovery Characteristics • Positive VCE (on) Temperature Coefficient • Ceramic DBC Substrate • Low Stray Inductance Design

PSB45030TSMD PSB45030TSMD PSB45030TSMD

PSB45030-TV1.2

Note 3: Absolute maximum ratings are DC values beyond which the device may be damaged or have its useful life impaired. The datasheet specifica- tions should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading vari- ables. Fairchild does not recommend operation outside datasheet specifi- cations.

PSB45030TV1.2 PSB45030TV1.2 PSB45030TV12

PSB45030TV12

Output Buffer Amplifiers The voltage outputs are from precision unity-gain follow- ers that can slew up to 1V/µs. The outputs can swing from VREFL to VREFH. With a 0V to 5V output transition the amplifier outputs typically settle to 1LSB in 50µs.

PSB45030TV12G

Vendor:siePackage Cooled:sieD/C:dc96

(Continued) • Direct power saving function : Power supply current in power saving mode Typ. 0.1 µA (VCC = Vp = 3.0 V, Ta = +25 C) , Max. 10 µA (VCC = Vp = 3.0 V) • Fractional function : modulo 13 fixed (implemented in RF-PLL) • Dual modulus prescaler : 2000 MHz prescaler (16/17 fixed) /600 MHz prescaler (8/9 or 16/17) • Serial input programmable reference divider ...

PSB45030TV12G

Vendor:siePackage Cooled:sieD/C:dc96

(Continued) • Direct power saving function : Power supply current in power saving mode Typ. 0.1 µA (VCC = Vp = 3.0 V, Ta = +25 C) , Max. 10 µA (VCC = Vp = 3.0 V) • Fractional function : modulo 13 fixed (implemented in RF-PLL) • Dual modulus prescaler : 2000 MHz prescaler (16/17 fixed) /600 MHz prescaler (8/9 or 16/17) • Serial input programmable reference divider ...

PSB45030V PSB45030V PSB45030V

PSB45030-V1.2

Vendor:SIEMENSPackage Cooled:DIP-28D/C:93

• 10-bit Analog-to-Digital Converter module (A/D) with: - Fast sampling rate - Conversion available during SLEEP - DNL = 1 LSb, INL = 1 LSb - Up to 16 channels available • Analog Comparator Module: - 2 Comparators - Programmable input and output multiplexing • Comparator Voltage Reference Module • Programmable Low Voltage Detection (LVD) module - Supports interrupt o...

PSB45030V1.2 PSB45030V1.2 PSB45030V12

PSB45030-V1.2 PSB45030-V1.2 PSB45030V12

PSB45030-V12 PSB45030-V12 PSB45030V12

PSB45030-VI.2 PSB45030-VI.2 PSB45030VI2

PSB4505 B1013 PSB4505 B1013 PSB4505B1013

PSB4505 PSB4505 PSB4505

PSB4505B1013 PSB4505B1013 PSB4505B1013

PSB4505B101-3 PSB4505B101-3 PSB4505B1013

PSB4506A B101-3 PSB4506A B101-3 PSB4506AB1013

PSB4506A PSB4506A PSB4506A

PSB4506A-1

Single-Chip Parallel Multiple Instruction / Multiple Data (MIMD) DSP More Than Two Billion RISC-Equivalent Operations per Second Master Processor (MP) C 32-Bit Reduced Instruction Set Computing (RISC) Processor C IEEE-754 Floating-Point Capability C 4K-Byte Instruction Cache C 4K-Byte Data Cache Four Parallel Processors (PP) C 32-Bit Advanced DSPs C 64-Bit Opcode Provides Many Parallel Operations per...

PSB4506AB101-3 PSB4506AB101-3 PSB4506AB1013

PSB4506AB104-3 PSB4506AB104-3 PSB4506AB1043

PSB4506ASIEM PSB4506ASIEM PSB4506ASIEM

PSB4506AT V1.2 PSB4506AT V1.2 PSB4506ATV12

PSB4506ATV1.2 PSB4506ATV1.2 PSB4506ATV12

PSB4506ATV12

Vendor:siePackage Cooled:sieD/C:dc96

Typical represent average readings at 25C, VDD = 5 V. Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. 3INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a volt...

PSB4506ATV12

Vendor:siePackage Cooled:sieD/C:dc96

Typical represent average readings at 25C, VDD = 5 V. Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. 3INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a volt...

PSB4506A-TV12

PSB4506ATV12 PSB4506ATV12 PSB4506ATV12

PSB4506A-TV2.1

The ACE8001 product family has an 8-bit core processor, 64 bytes of RAM, 64 bytes of data EEPROM and 1K bytes of code EEPROM. Its on-chip peripherals include a programmable 8-bit timer with PWM output, watch-dog/idle timer, and programma- ble undervoltage detection circuitry. The on-chip clock and reset functions reduce the number of required external components. The ACE8001 product family is available...

PSB4506A-V1.2 PSB4506A-V1.2 PSB4506AV12

PSB4506AV12

Vendor:InfineonPackage Cooled:DIP28D/C:94+

FEATURES • Two 10-bit Nonvolatile DACs − INL 1LSB − DNL: 1LSB • Programmable Configuration • Programmable Power-on Reset Options − Recall Full Scale Value − Recall Zero Scale Value − Recall Mid-Scale Value − Recall NV Register Value • Tandem or Independent Operation of DACs • Power-down mode (short VOUT to gnd)

PSB4506P

Vendor:SIEMENSPackage Cooled:N/AD/C:01+

Stresses above the ratings listed below can cause permanent damage to the ICS660. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods c...

PSB4506P

Vendor:SIEMENSPackage Cooled:N/AD/C:01+

Stresses above the ratings listed below can cause permanent damage to the ICS660. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods c...

PSB4506TV12

Vendor:siePackage Cooled:sieD/C:dc91

256K x 4 advanced high-speed CMOS static RAM JEDEC revolutionary pinout (center power/GND) for reduced noise. Equal access and cycle times Commercial and Industrial: 12/15/20ns One Chip Select plus one Output Enable pin Bidirectional inputs and outputs directly TTL-compatible Low power consumption via chip deselect Available in a 32-pin 400 mil Plastic SOJ.

PSB4506V12

Vendor:siePackage Cooled:sieD/C:dc92

Because it is a synchronous device, address, data inputs, and read/ write control inputs are captured on the rising edge of the input clock. Burst order control (LBO) must be tied to a power rail for proper operation. Asynchronous inputs include the Sleep mode enable (ZZ) and Output Enable. Output Enable can be used to override the synchronous control of the output drivers and turn the RAM's output dri...

PSB4590

Vendor:SIEMENSPackage Cooled:DIP28D/C:06+

System Characteristics The following spec table entries are guaranteed by design providing the component values in the typical application circuit are used. These parameters are not guaranteed by production testing. Min and Max limits apply over the full operating ambient temperature range (−30˚C TA 85˚C) and over the VIN range = 2.7V to 5.5V unless otherwise specified, Typical values are...

PSB4590

Vendor:SIEMENSPackage Cooled:DIP28D/C:06+

System Characteristics The following spec table entries are guaranteed by design providing the component values in the typical application circuit are used. These parameters are not guaranteed by production testing. Min and Max limits apply over the full operating ambient temperature range (−30˚C TA 85˚C) and over the VIN range = 2.7V to 5.5V unless otherwise specified, Typical values are...

PSB4590PV1.4

Maximum rating PSB4590PV1.4he maximum ratings are the limit values which must not be exceeded during operation of device. None of these rating value must not be exceeded. If the maximum rating value is exceeded, the characteristics of devices may never be restored properly. In extreme cases, the device may be permanently damages. Lifetime of light emitters If an optical module is used for a long period of...

PSB4590PV1.4

Maximum rating PSB4590PV1.4he maximum ratings are the limit values which must not be exceeded during operation of device. None of these rating value must not be exceeded. If the maximum rating value is exceeded, the characteristics of devices may never be restored properly. In extreme cases, the device may be permanently damages. Lifetime of light emitters If an optical module is used for a long period of...

PSB4595

Vendor:SIEMENSPackage Cooled:N/AD/C:99+

• Indicates the presence or absence of synchronizing-signal input and the polarities of the signals • Pulse-output circuit is for open-collector output • Clamp-pulse output and Clamp-pulse trigger is generated at the front edge for separate sync and composite sync input, and at the rear edge for sync on video input. • 20-pin shrink-DIP

PSB4595R-V2.1

PSB4596R

Vendor:INFINEOND/C:01+

PSB4596R

Vendor:INFINEONPackage Cooled:TSSOP-28PD/C:01+

PSB4596SV2.1G

PSB4600F

Vendor:SIEMENSPackage Cooled:QFPD/C:04+

The MSM518221's function is simple, and similar to a digital delay device whose delay-bit-length is easily set by reset timing. The delay length, and the number of read delay clocks between write and read, is determined by externally controlled write and read reset timings.

PSB4610F

Vendor:INFINEONPackage Cooled:TQFPD/C:06+

This IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section. Care should be taken to avoid output switching conditions where the VS node flies inductively below ground by more than ...

PSB4610F

Vendor:INFINEONPackage Cooled:N/AD/C:06+

This IC contains a zener clamp structure between the chip VCC and COM which has a nominal breakdown voltage of 15.6V. Please note that this supply pin should not be driven by a DC, low impedance power source greater than the VCLAMP specified in the Electrical Characteristics section. Care should be taken to avoid output switching conditions where the VS node flies inductively below ground by more than ...

PSB4610FV2.2

Vendor:InfineonD/C:07+

As shown in the Block Diagram, the circuit is comprised of four functional blocks: a variable-frequency oscillator which generates the basic periodic waveforms; four current switches actuated by binary keying inputs; and buffer amplifiers for both the triangle and squarewave outputs. The internal switches transfer the oscillator current to any of four external timing resistors to produce four dis...

PSB4610F-V2.2

Vendor:INFINEONPackage Cooled:DIP/SMDD/C:05+06+

system under rapidly changing current load conditions, designers generally use several output capacitors connected in parallel. Such an arrangement serves to minimize the effects of the parasitic resistance (ESR) and inductance (ESL) that are present in all capacitors. Cost-effective solutions that sufficiently limit ESR and ESL effects generally result in total capacitance values in the range of hundre...

PSB4610H

Vendor:infineon

The TMS320C62x DSPs include an on-chip memory, with the C6203 device offering the most memory at 7 Mbits. For the C6202/02B device, program memory consists of two blocks, with a 128K-byte block configured as memory-mapped program space, and the other 128K-byte block user-configurable as cache or memory-mapped program space. Data memory consists of two 64K-byte blocks of RAM. Similarly, the C6203 device p...

PSB4651HV1.2

The frequency of oscillation of a quartz crystal is determined by its cut and by the load capacitors connected to it. The MK3725 incorporates on-chip variable load capacitors that pull (change) the frequency of the crystal. The crystal specified for use with the MK3725 is designed to have zero frequency error when the total of on-chip + stray capacitance is 14 pF.

PSB4651HV1.32

Vendor:INFINEON

The control inputs IH1,2 consist of TTL/CMOS compatible Schmitt-Triggers with hysteresis. Buffer amplifiers are driven by these stages and convert the logic signal into the necessary form for driving the power output stages. The inputs are protected by ESD clamp-diodes.

PSB4651HV12

Vendor:siePackage Cooled:sieD/C:dc95

Complete USB Hub Power Solution Meets USB Specifications 1.1 and 2.0 Independent Thermal and Short-Circuit Protection 3.3-V Regulator for USB Hub Controller Overcurrent Logic Outputs 4.5-V to 5.5-V Operating Range CMOS- and TTL-Compatible Enable Inputs 185 µA Bus-Power Supply Current Available in 24-Pin SSOP Package C40C to 85C Ambient Temperature Range

PSB4651HV12

Vendor:siePackage Cooled:sieD/C:dc95

Complete USB Hub Power Solution Meets USB Specifications 1.1 and 2.0 Independent Thermal and Short-Circuit Protection 3.3-V Regulator for USB Hub Controller Overcurrent Logic Outputs 4.5-V to 5.5-V Operating Range CMOS- and TTL-Compatible Enable Inputs 185 µA Bus-Power Supply Current Available in 24-Pin SSOP Package C40C to 85C Ambient Temperature Range

PSB4851T V2.1

PSB4851TV11

PSB4851TV2.1

The second is the programmable 16- or 32-bit-wide SDRAM interface that allows direct connection of up to two banks of SDRAM, totaling 512 Mb. To assure the lowest possible power consumption, the EP7311 supports self-refresh SDRAMs, which are placed in a low-power state by the device when it enters the low- power Standby State.

PSB4851TV21

The MHF converters are switching regulators which use a quasi- square wave, single ended forward converter design with a nominal switching frequency of 600 kHz. Isolation between input and output circuits is provided with a transformer in the forward power loop and a temperature insensitive optical link in the feedback control loop. Output regulation is accomplished with constant frequency pulse width m...

PSB4860H

Vendor:infineon

• Short C when two or more lines are short-circuited together. • Open C Lack of continuity between pins at both ends of the cable. • Crossed pair C When a pair is connected to different pins at each end (i.e. Pair 1 is connected

PSB4860H

Vendor:infineon

• Short C when two or more lines are short-circuited together. • Open C Lack of continuity between pins at both ends of the cable. • Crossed pair C When a pair is connected to different pins at each end (i.e. Pair 1 is connected

PSB4860HV21ES

PSB50505EV1.3

Vendor:SIEMENSD/C:08+09+

Caution: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied.

PSB50505EV1.3

Vendor:SIEMENSPackage Cooled:BGAD/C:08+09+

Caution: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied.

PSB50505-V1.3

PSB50510EV1.3

Vendor:100

PSB50530FV1.2

Vendor:InfineonPackage Cooled:TQFP64D/C:2005

The CM3016-48 is a CMOS linear voltage regulator with low quiescent current, very low drop out voltage and better than 1% initial output voltage accuracy. The quiescent cur- rent is typically 150µA at light loads and only 165µA at 500mA. This is 5% more efficient than equivalent Bi-CMOS devices that can waste up to 25mA at 500mA load. The CM3016-48 can maintain load regulation for peak curr...

PSB55/04

Vendor:1

PSB65202

Package Cooled:sie

Input Specifications Voltage range Filter Isolation Specifications Rated voltage Leakage current Resistance Capacitance Output Specifications Voltage accuracy Ripple and noise (at 20 MHz BW) Short circuit protection Line voltage regulation Load voltage regulation Temperature coefficient General Specifications Efficiency Switching frequency Environmental Specifications Operating temperature (ambie...

PSB6520-2

CIN: 0.1 µF or higher. Set this value according to the length of the line between the regulator and INPUT pin. Be sure to connect CIN to prevent parasitic oscillation. Use of a film capacitor or other capacitor with excellent voltage and temperature characteristics is recommended. If using a laminated ceramic capacitor, it is necessary to ensure that CIN is 0.1 µF or higher for the voltage a...

PSB6520-3

The FSA2467 is a Quad Single Pole Double Throw (SPDT) analog switch. The FSA2467 operates from a single 1.65V to 4.3V supply. The FSA2467 features an ultra-low On Resistance of 0.4W at a +2.7V supply and 25C. This device is fabricated with sub-micron CMOS technology to achieve fast switching speeds and is designed for break-before-make operation.

PSB6620

Vendor:SIEMENSPackage Cooled:DIP8D/C:06+

/DACK /DMA Acknowledge (Input, active Low). /DACK, in conjunction with /IOR and /IOW, is used to enable reading or writing the SCSI I/O Data Registers when in the DMA Mode. When the DRQ has acknowledged that the byte has been successfully transferred to or from the DMA controller, this signal is asserted. /DACK and /CS must never be active simultaneously.

PSB6620-2

Vendor:InfineonPackage Cooled:DIP-8D/C:97+

The entry of sections for each group is truly random and without limitation. However, there is a limit in the total number of entries for eight groups, which is 992 in the API8208A It is acceptable to allocate all entries into only one group or distribute out to other groups. It depends on how many groups of messages are required.

PSB6970_EP

PSB7110F

Vendor:SIEMENSPackage Cooled:QFC-100D/C:97+

The RAMified Timekeeper has 14 registers, which are 8 bits wide that contain all of the timekeeping, alarm, and watchdog and control information. The clock, calendar, alarm, and watchdog registers are memory locations, which contain external (user-accessible) copies of the timekeeping data. The external copies are independent of internal functions except that they are updated periodically by the simultaneous...

PSB7110F1.0

Vendor:SIEMENSPackage Cooled:QFPD/C:06+

Pulled-high, this pin is a Schmitt trigger input structure. Active low. Applying a nega- tive going pulse to HFI can toggle the HFO once and hence control the hand-free function. The pull-high resistance of HFI is about 200kW typ. An external RC net- work is recommended for input debouncing.

PSB7110FDV10

Vendor:siePackage Cooled:sieD/C:dc97

The sensor provides a self-test feature allowing the verification of the mechanical and electrical integrity of the accelerometer at any time before or after installation. A fourth plate is used in the g-cell as a self-test plate. When a logic high input to the self-test pin is applied, a calibrated potential is applied across the self-test plate and the moveable plate. The resulting electrostatic force (...

PSB7110FDV10

Vendor:siePackage Cooled:sieD/C:dc97

The sensor provides a self-test feature allowing the verification of the mechanical and electrical integrity of the accelerometer at any time before or after installation. A fourth plate is used in the g-cell as a self-test plate. When a logic high input to the self-test pin is applied, a calibrated potential is applied across the self-test plate and the moveable plate. The resulting electrostatic force (...

PSB7110FGDV10

Vendor:infPackage Cooled:infD/C:dc00

Note 3: Shut Down (SD) to transmit enable is the time required for the transmit bias circuits to stabilize. Applying a transmit pulse before this time has elapsed will reduce the transmit pulse width. Note 4: Transmit VCC Transient Immunity measures the transmitter circuitry immunity from large VCC and ground return inductive transients arising from the action of large transmitter di/dt currents o...

PSB7110FV10

Vendor:siePackage Cooled:sieD/C:dc97

SECTOR LOCKDOWN: Each sector has a programming lockdown feature. This feature pre- vents programming of data in the designated sectors once the feature has been enabled. These sectors can contain secure code that is used to bring up the system. Enabling the lock- down feature will allow the boot code to stay in the device while data in the rest of the device is updated. This feature does not have to be ac...

PSB7115FISAR34V2.1

Vendor:InfineonD/C:07+

PSB7115FV2.1

Max. UnitsConditions CCCVVGS = 0V, ID = -250µA CCC V/C Reference to 25C, ID = -1mA 21VGS = -10V, ID = -8.0A ‚ mΩ 32VGS = -4.5V, ID = -6.8A ‚ -2.5VVDS = VGS, ID = -250µA CCCSVDS = -10V, ID = -8.0A -15VDS = -24V, VGS = 0V µA -25VDS = -24V, VGS = 0V, TJ = 70C -100VGS = -20V nA 100VGS = 20V 78ID = -8.0A CCCnCVDS = -15V CCCVGS = -10V 20VDD = -15V, VGS = -1...

PSB7115F-V2.1

Vendor:INFINEONPackage Cooled:DIP/SMDD/C:05+06+

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltag...

PSB7115FV21

PSB7115V2.1

DC to GND DC to BAT BAT, CHG, POK, USB to GND Operating Temperature Range Junction Temperature Range Storage Temperature Range Lead Temperature (soldering, 10s) Continuous Power Dissipation (TA = +70C) 5-Pin Thin SOT23 Derates above +70C 5-Pin Thin SOT23

PSB7230FV12

PSB7230FV2.1

Hynix HYMD116725B(L)8J-J series is designed for high speed of up to 166MHz and offers fully synchronous opera- tions referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipelin...

PSB7230FV3.1

The inrush current from the connection of a heavy ca- pacitive load may cause the fault flag to fall for a short duration while the switch is in a constant-current mode, for charging the capacitance. In needed, a simple 1ms RC low-pass filter in series with the fault flag circuit will prevent erroneous overcurrent reporting (see Fig- ure 4).