Index "R"Vendor:AMPHENOLD/C:156
Vendor:DELTAD/C:54
Program Strobe Enable: The read strobe to external program memory. When executing code from the external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. PSEN is not activated during fetches from internal program memory.
Vendor:STRATOSD/C:03+
The GS9068 inputs are self-biased, allowing for simple AC coupling to the device. For serial digital video, a minimum capacitor value of 4.7µF should be used to allow coupling of pathological test signals. A tantalum capacitor is recommended.
Vendor:STRATOSPackage Cooled:04+D/C:22
Negative Power Supply, specified for opera- tion from 0 V to C2.7 V. Terminal B of RDAC#2. Terminal A of RDAC#2. Wiper, RDAC#2, addr = 12 Digital Ground. Active Low Input. Terminal A open-circuit and Terminal B shorted to Wiper. Shut- down controls both RDACs #1 and #2. Chip Select Input, Active Low. When CS returns high, data in the serial input register is decoded, based on the address bit, and lo...
Vendor:STRATOSPackage Cooled:04+D/C:22
Negative Power Supply, specified for opera- tion from 0 V to C2.7 V. Terminal B of RDAC#2. Terminal A of RDAC#2. Wiper, RDAC#2, addr = 12 Digital Ground. Active Low Input. Terminal A open-circuit and Terminal B shorted to Wiper. Shut- down controls both RDACs #1 and #2. Chip Select Input, Active Low. When CS returns high, data in the serial input register is decoded, based on the address bit, and lo...
Vendor:AMPHENOLPackage Cooled:N/AD/C:176
Power Dissipation and Thermal Characteristics D Suffix, Plastic Package, SOIC−14 Case 751A Maximum Power Dissipation @ TA = 25C Thermal Resistance, Junction−to−Air D1 Suffix, Plastic Package, SOIC−8 Case 751 Maximum Power Dissipation @ TA = 25C Thermal Resistance, Junction−to−Air N Suffix, Plastic Package, Case 626 Maximum Power Dissipation @ TA = 25C Thermal R...
Vendor:300000D/C:07+
Auto & self refresh capability (8192 Cycles/64ms) LVTTL compatible inputs and outputs Single 3.3V 0.3V power supply MRS cycle with address key programs Latency (Access from column address) Burst length (1, 2, 4, 8 & Full page) Data scramble (Sequential & Interleave) • All inputs are sampled at the positive going edge of the system clock • Serial presence detect with E...
Vendor:1600
Vendor:1600
Vendor:RENESASPackage Cooled:TO-220FMD/C:05+
This three terminal positive regulator is supplied in a hermetically sealed metal surface mount package. All protective features are designed into the circuit, including thermal shutdown, current limiting and safe-area control. With heat sinking, they can deliver over 1.0 amp of output current. This unit features output voltages that can be trimmed using external resistors, from 1.2 volts to 37 volts.
Vendor:RENESASPackage Cooled:TO-3PD/C:05+
Typical represents the average reading at 25C and VDD = 5 V. Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic, except R-DNL of AD5252 1 kΩ version at VDD = 2.7 V, IW...
Vendor:RENESASPackage Cooled:TO-3PD/C:05+
Vendor:300Package Cooled:TO-3P
addition to the LE and OE pins the AC ACT843 has a Clear (CLR) pin and a Preset (PRE) pin These pins are ideal for parity bus interfacing in high performance systems When CLR is LOW the outputs are LOW if OE is LOW When CLR is HIGH data can be entered into the latch When PRE is LOW the outputs are HIGH if OE is LOW Preset overrides CLR
Vendor:RENESASPackage Cooled:TO-220FMD/C:05+
Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Companys quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog p...
Vendor:RENESASPackage Cooled:TO-3PD/C:05+
The NJU6673 is a 25-common x 100-segment bit map LCD driver to display graphics or characters. It contains 2,500 bits display data RAM, microprocessor interface circuits, instruction decoder, and common and segment drivers. An image data from MPU through the serial or 8-bit parallel interface are stored into the 2,500 bits internal displayed on the LCD panel through the commons and segments drivers. ...
Vendor:RENESASPackage Cooled:TO-3PD/C:05+
Note: Stresses greater than those listed under MAXIMUM RATINGS may cause perma- nent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Vendor:ROHMPackage Cooled:SOT-89D/C:05+
The 74LVC1GX04 combines the functions of the 74LVC1GU04 and 74LVC1G04 into a single package to provide a device optimized for use in crystal oscillator applications. This integration produces the benefits of a compact footprint, lower power dissipation, and stable operation over a wide range of frequency and temperature.
Vendor:ROHMPackage Cooled:SOT-89D/C:05+
The 74LVC1GX04 combines the functions of the 74LVC1GU04 and 74LVC1G04 into a single package to provide a device optimized for use in crystal oscillator applications. This integration produces the benefits of a compact footprint, lower power dissipation, and stable operation over a wide range of frequency and temperature.
Vendor:SHARPPackage Cooled:90+D/C:QFP-44P
When used alone, the CLP30-200B1 acts at the internal overvoltage reference level (+/- 200 V). Furthermore, it is possible to adjust this threshold level to a lower voltage by using up to 4 fixed external voltage reference (VZ1 to VZ4) (see fig.5).
250-kHz Sampling Rate 4-V, 5-V, 10 V, 3.33-V, 5-V, and 10-V Input Ranges 2.0 LSB Max INL 1 LSB Max DNL, 16-Bit No Missing Codes SPI Compatible Serial Output with Daisy-Chain (TAG) Feature Single 5-V Supply Pin-Compatible With ADS7809 (Low Speed) and 12-Bit ADS8508/7808 Uses Internal or External Reference 70-mW Typ Power Dissipation at 250 KSPS 20-Pin SO and 28-Pin SSOP Packages Simple DSP Interface
The complete documentation package for the MC68302 consists of the M68000PM/AD, MC68000 Family Programmers Reference Manual, MC68302UM/AD, MC68302 Integrated Multiprotocol Processor Users Manual, and the MC68302/D, MC68302 Integrated Multipro- tocol Processor Product Brief.
Burst Suspend occurs when CE is asserted, the current address has been latched (either ris- ing edge of AVD or valid CLK edge), CLK is halted, and OE is deasserted. The CLK can be halted when it is at VIH or VIL. To resume the burst access, OE is reasserted and the CLK is restarted. Subsequent CLK edges resume the burst sequence where it left off.
These devices consist of two independent, high-gain, frequency-compensated operational amplifiers designed to operate from a single supply over a wide range of voltages. Operation from split supplies also is possible if the difference between the two supplies is 3 V to 32 V (3 V to 26 V for the LM2904), and VCC is at least 1.5 V more positive than the input common-mode voltage. The low supply-current d...
These P-Channel enhancement mode power field effect transistors are produced using Fairchilds proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for low voltage applications such as automot...
- 4 external and 8 internal interrupt request sources - Each interrupt can individually be maskable - Each interrupt can individually be reset - Automatic reset of each interrupt request after read - General interrupt request to CPU can be disabled - Automatic enabling of general interrupt request flag when going into HALT mode
The maximum output is set to VMAX, the minimum output to VMIN and the average output to VAVE. 6) Integration time is 10ms. 7) VOUT = 500mV 8) DR = VSAT/VDRK When optical accumulated time is shorter, the dynamic range gets wider because dark voltage is in propagation to optical accumulated time. 9) SE = VSAT/R1 10) VOS is defined as indicated below.
The LMS1487E is a low power differential bus/line trans- ceiver designed for high speed bidirectional data communi- cation on multipoint bus transmission lines. It is designed for balanced transmission lines. It meets ANSI Standards TIA/ EIA RS422-B, TIA/EIA RS485-A and ITU recommendation and V.11 and X.27. The driver outputs and receiver inputs have 15kV ESD protection. The LMS1487E combines a TRI-S...
IOLOutput Current Low24 5. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 6. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
Vendor:CARLO GAVAZZIPackage Cooled:SOLID RELAYD/C:07+
Vendor:ROHMPackage Cooled:08+D/C:36000
When the IC is enabled (TXEN high) a phase locked loop locks the output of the VCO to a multiple of a crystal defined reference input. The output of the VCO operates at the final output frequency and is the input to a power amplifier stage. The power amplifier directly drives the antenna.
Vendor:RohmPackage Cooled:2008D/C:0410
The TPS2400 overvoltage protection controller is used with an external N-channel MOSFET to isolate sensitive electronics from destructive voltage spikes and surges. It is specifically designed to prevent large voltage transients associated with automotive environments (load dump) from damaging sensitive circuitry. When potentially damaging voltage levels are detected by the TPS2400 the supply is di...
Vendor:RohmPackage Cooled:2008D/C:0410
The TPS2400 overvoltage protection controller is used with an external N-channel MOSFET to isolate sensitive electronics from destructive voltage spikes and surges. It is specifically designed to prevent large voltage transients associated with automotive environments (load dump) from damaging sensitive circuitry. When potentially damaging voltage levels are detected by the TPS2400 the supply is di...
Vendor:SONYPackage Cooled:2001
Vendor:TOSPackage Cooled:QFP
Note: 1 H = High Signal Level L = Low Signal Level Z = High Impedance = Transition LOW-to-HIGH X = Irrelevant 2. Output level before the indicated steady-state input conditions were established, provided that CLK is HIGH before LE goes LOW. 3. Output level before the indicated steady-state input conditions were established.
Vendor:MITD/C:95
Note: 1. H=VIH, L=VIL, X=don't care(VIH or VIL) 2. UB, LB(Upper, Lower Byte enable) These active LOW inputs allow individual bytes to be written or read. When LB is LOW, data is written or read to the lower byte, I/O1 -I/O8. When UB is LOW, data is written or read to the upper byte, I/O9 -I/O16.
Vendor:0Package Cooled:07+D/C:195
Vendor:MITSUBISPackage Cooled:QFPD/C:05+
1. One output at a time for a maximum duration of one second. VOUT = 0.5V was selected to avoid test problems by tester ground degradation. Characterized but not 100% tested. 2. Measured using two 16-bit counters. 3. Typical values are at VCC = 3.3V and TA= 25C. 4. Maximum ICC varies widely with specific device configuration and operating frequency. Refer to Power Consumption section of this data shee...
Vendor:MITSUBISPackage Cooled:QFPD/C:05+
1. One output at a time for a maximum duration of one second. VOUT = 0.5V was selected to avoid test problems by tester ground degradation. Characterized but not 100% tested. 2. Measured using two 16-bit counters. 3. Typical values are at VCC = 3.3V and TA= 25C. 4. Maximum ICC varies widely with specific device configuration and operating frequency. Refer to Power Consumption section of this data shee...
The following charts show measured performance of the PA module in low-power mode (Vmode = +2.0V) at +16dBm output power and over a range of supply voltages from 3.4V nominal down to 1.2V. Power-added efficiency is more than doubled from 9.5 percent to nearly 25 percent (Vcc = 1.2V) while maintaining a typical ACPR1 of C52dBc and ACPR2 of less than C61dBc.
Vendor:ALPSPackage Cooled:switch
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Vendor:ALPSPackage Cooled:SALE--STOCK!!D/C:07/08+
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Vendor:alpsPackage Cooled:alpsD/C:dc98
Freescale Semiconductor reserves the right to make changes without further notice to any products herein. Freescale Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liab...
Vendor:ALPS
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Vendor:ALPSD/C:07/08+
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