R100022739-0001

R10002359-0001

R10002360-0008

R10002360-0009A

R10002360-0012

R10002360-0015

R10002361-0011

R10002361-0018

R10002661-1004

R10002661-1005

R10002661-1009

R10002661-1011

R10002677-0106

R10002678-0006

R10002678-1007

R10002678-1010

R10002678-600

R10002678-8008

R10002691-0002

R10002739-0003

R10002868-0001

R10002918-0033

R10002919-0001

R10002919-0009

R10002974-0001

R1000-800-10-01

Vendor:BARRYPackage Cooled:高频头D/C:01+

The M68AF127B is a 1Mbit (1,048,576 bit) CMOS SRAM, organized as 131,072 words by 8 bits. The device features fully static operation requiring no external clocks or timing strobes, with equal ad- dress access and cycle times. It requires a single 4.5 to 5.5V supply.

R10015RS02Q

(6) When designing your equipment, comply with the guaranteed values, in particular those of maximum rat- ing, the range of operating power supply voltage, and heat radiation characteristics. Otherwise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, take into the consideration of incidence of break down and fail...

R1003AC

R-100K-OHM

R100U-24-N

R1020000FN

Vendor:n/aPackage Cooled:PLCC28D/C:06+

The IDT5T2110 is a 2.5V PLL differential clock driver intended for high performance computing and data-communications applications. The IDT5T2110 has six differential outputs in six banks, including a dedicated differential feedback. The redundant input capability allows for a smooth change over to a secondary clock source when the primary clock source is absent. The feedback bank allows divide-by-func...

R1020C

The R1020C family of fixed-output, low-dropout regulators offers exceptional, cost-effective performance for both portable and nonportable applications. Available in voltages of 2.5 V, 2.6 V, 2.7 V, 2.8 V, 2.85 V, 3 V, 3.1 V, 3.2 V, 3.3 V, and 5 V, the family has an output tolerance of 1% for the A version (1.5% for the non-A version) and is capable of delivering 150-mA continuous load current. Standard r...

R102285

Vendor:TIPackage Cooled:SMD-5D/C:01+

Temperature Sensor Output The temperature channel compares the output of a posi- tive temperature coefficient (PTC) resistor driven by a switched current source. The current source is only active when the temperature channel is selected.

R102G28

Vendor:TIPackage Cooled:SMD-5D/C:01+

Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125˚C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the ...

R102G28

Vendor:TIPackage Cooled:SMD-5D/C:01+

Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125˚C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the ...

R102GA

Vendor:TIPackage Cooled:SMD-5D/C:01+

The VSP5000 device is a complete application specific standard product (ASSP) for charge-coupled device (CCD) line sensor applications such as copiers, scanners, and facsimiles. The VSP5000 device provides two independent channels of processing lines and performs analog front-end processing and analog-to-digital (A/D) conversion. Each channel has a correlated double sampler (CDS)/sample hold (SH) cir...

R102GA

Vendor:TIPackage Cooled:TO225D/C:01+

The VSP5000 device is a complete application specific standard product (ASSP) for charge-coupled device (CCD) line sensor applications such as copiers, scanners, and facsimiles. The VSP5000 device provides two independent channels of processing lines and performs analog front-end processing and analog-to-digital (A/D) conversion. Each channel has a correlated double sampler (CDS)/sample hold (SH) cir...

R102GA30

Vendor:TIPackage Cooled:SMD-5D/C:01+

Applications include transducer amplifiers, dc amplification blocks, and all the conventional operational amplifier circuits that now can be implemented more easily in single-supply-voltage systems. For example, these devices can be operated directly from the standard 5-V supply used in digital systems and easily can provide the required interface electronics without additional 5-V supplies.

R102GA30

Vendor:TIPackage Cooled:SMD-5D/C:01+

Applications include transducer amplifiers, dc amplification blocks, and all the conventional operational amplifier circuits that now can be implemented more easily in single-supply-voltage systems. For example, these devices can be operated directly from the standard 5-V supply used in digital systems and easily can provide the required interface electronics without additional 5-V supplies.

R1032-11

Vendor:REWPackage Cooled:DIPD/C:8038

R103G

Package Cooled:2005D/C:04+

SRAM Compliant with PCI Specification, Revision 2.1 PCI Interface Operates up to 66 MHz/5.0V Compatible IEEE 1149.1 Compliant, JTAG Boundary-scan Interface PD Max = 1W (66 MHz), Full Operating Conditions Nap, Doze and Sleep Modes for Power Savings Two-channel Integrated DMA Controller Message Unit C Intelligent Input/Output (Two-wire Interface) Message Controller C Two Door Bell Registers C Inbound an...

R103G25

Package Cooled:SMD-5D/C:01+

1.0 POWER-UP/DOWN CONTROL Following power-on initialization, power-up and power-down control may be accomplished by writing any of the control in- structions listed in Table 1 into COMBO II with the P bit set to 0 for power-up or 1 for power-down. Normally it is rec- ommended that all programmable functions be initially pro- grammed while the device is powered down. Power state control can then be inc...

R103G30

Vendor:TIPackage Cooled:SMD-5D/C:01+

If VBatt > 28.5 V (typically), the voltage limitation of the IC is reduced from 26 V to 20 V. The gate of the external transistor remains at the potential of the IC ground, thus pro- ducing voltage sharing between the FET and lamps in the event of overvoltage pulses (e.g., load-dump). The short-circuit protection is not in operation. At VBatt < 23 V, the overvoltage detection stage 2 is switched off.

R103HZ

R103R50

R10432EF

Vendor:rockwPackage Cooled:rockwD/C:dc79

Data are shifted in through the serial port C (SDC0, , SDC3) at the rising edge of the shift clock SCB. After16 clock pulses the data have to be transferred from shift register C to latch C. If more than 16 clock pulses occur before latching the data, only the last sixteen 4-bit data values are accepted.

R1046213

Vendor:rockwPackage Cooled:rockwD/C:dc89

Samsung Electronics' microcontroller business has been awarded full ISO-14001 certification (BVQ1 Certificate No. 9330). All semiconductor products are designed and manufactured in accordance with the highest quality standards and objectives.

R1046416

NOTES: 1. Horn modulation is selfCcompleting. When going from Alarm to No Alarm, the alarm condition will terminate only when horn is off. 2. Comparators are strobed once per cycle. 3. Low battery comparator information is latched only during LED pulse. 4. Current source required into Pin 1. 5. Alarm Condition can initiate on any clock pulse except 1 and 7.

R1046420

Vendor:rockwPackage Cooled:rockwD/C:dc91

CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active when data read from or write to the device. If either chip enable is not active, the device is deselected and is in a standby power mode. The DQ pins will be in the high impedance state when the device is deselected.

R10485-11

Vendor:CONEXANTPackage Cooled:PLCCD/C:00+

Operation above maximum ratings may cause permanent damage to the device. Operation at maximum ratings may degrade performance and affect reliability. Device can tolerate 100 Volt transient whose duration is 100 ms when RS 0.5 Ω. Derate Output Current linearly from 100% at 125C to 0 at 135C. DC resistance is the total resistance of the device and includes the sum of the input to output resistanc...

R104G25

Vendor:BB

Minimum time between read command (i.e., a write to Communication Register) and data read. Minimum time between data byte transfers during a multibyte read. Data access time after SCLK rising edge following a write to the Communications Register. Bus relinquish time after falling edge of SCLK.

R104G5

Vendor:NOPackage Cooled:5/TO223D/C:06+

R104G5

Vendor:NOD/C:06+

R104G50

D/C:04

Transceivers through Standard MII Ports Dual ARM7TDMI® RISC Processor Architecture Inter-networking ARM7TDMI (INWARM) with 16 Kbytes Program and Data Cache Controls the Ethernet MAC Units and Provides the Bridging Functions between Ethernet and Wireless Interfaces WLAN ARM7TDMI (WLANARM) with a Dedicated 32 Kbytes Program Memory Coordinates the 802.11b MAC Functionality 802.11b MAC Unit with 512-byte Tra...

R104G50

D/C:04

Transceivers through Standard MII Ports Dual ARM7TDMI® RISC Processor Architecture Inter-networking ARM7TDMI (INWARM) with 16 Kbytes Program and Data Cache Controls the Ethernet MAC Units and Provides the Bridging Functions between Ethernet and Wireless Interfaces WLAN ARM7TDMI (WLANARM) with a Dedicated 32 Kbytes Program Memory Coordinates the 802.11b MAC Functionality 802.11b MAC Unit with 512-byte Tra...

R1074

When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

R10809CC

Vendor:rockwPackage Cooled:rockwD/C:dc80

A typical interface circuit using the SPT1018 in a color raster application is shown in figure 2. The SPT1018 requires few external components and is extremely easy to use. The very high operating speeds of the SPT1018 require good circuit layout, decoupling of supplies, and proper design of trans- mission lines. The following considerations should be noted to achieve best performance.

R10937

Package Cooled:DIP

These ICs are high-precision, high-voltage stabilized power supply devices which, by employing an externally mounted power transistor are able to drive loads at large currents. The input/output voltage difference is a low 0.2V, and an internal protection circuit ensures that the devices can be used in a wide range of portable equipment. Output on/off control is also provided.

R10937P

Package Cooled:DIP

R10937P40

Vendor:rockwPackage Cooled:rockwD/C:dc86

FEATURES 16 16 High Speed Nonblocking Switch Array Serial or Parallel Programming of Switch Array Serial Data Out Allows Daisy Chaining Control of Multiple 16 16s to Create Larger Switch Arrays Output Disable Allows Connection of Multiple Devices without Loading the Output Bus Complete Solution Buffered Inputs 16 Output Amplifiers Operates on 5 V or 12 V Supplies Low Supply Current of 54 mA E...

R10937P-40

Vendor:ROCKWELLPackage Cooled:DIPD/C:06+

C Access to Entire Memory Map Two Multichannel Buffered Serial Ports (McBSPs) C Direct Interface to T1/E1, MVIP, SCSA Framers C ST-Bus-Switching Compatible C Up to 256 Channels Each C AC97-Compatible C Serial-Peripheral-Interface (SPI) Compatible (Motorola™) Two 32-Bit General-Purpose Timers Flexible Phase-Locked-Loop (PLL) Clock Generator IEEE-1149.1 (JTAG†) Boundary-Scan-Compatible 35...

R10937P-50

Vendor:ROCKWELLPackage Cooled:DIPD/C:06+

Enables the associated SDRAM command decoder when low and disables decoder when high. When decoder is dis- abled, new commands are ignored but previous operations continue. These input signals also disable all outputs (except CKE and ODT) of the register(s) on the DIMM when both inputs are high.

R10937P-50

Vendor:ROCKWELLPackage Cooled:DIPD/C:06+

Enables the associated SDRAM command decoder when low and disables decoder when high. When decoder is dis- abled, new commands are ignored but previous operations continue. These input signals also disable all outputs (except CKE and ODT) of the register(s) on the DIMM when both inputs are high.

R10938J50

Vendor:rockwPackage Cooled:rockwD/C:dc90

The 14 data bits are accessed by a 16-bit bus in a single read operation. Data format is straight binary for unipolar mode and twos complement binary for bipolar mode. The input has a full- scale range of 10 V with a full power bandwidth of 1 MHz and a full linear bandwidth of 500 kHz. High input impedance (10 MΩ) allows direct connection to unbuffered sources without signal degradation.

R10938J50

Vendor:rockwPackage Cooled:rockwD/C:dc90

The 14 data bits are accessed by a 16-bit bus in a single read operation. Data format is straight binary for unipolar mode and twos complement binary for bipolar mode. The input has a full- scale range of 10 V with a full power bandwidth of 1 MHz and a full linear bandwidth of 500 kHz. High input impedance (10 MΩ) allows direct connection to unbuffered sources without signal degradation.

R10938P-50

Vendor:ROCKWELLPackage Cooled:DIPD/C:06+

The page read operation of the device is controlled by CE and OE inputs. The page size is four words. The first word access of the page read is the same as the asynchronous read. The first word is read at an asynchronous speed of 70 ns. Once the first word is read, toggling A0 and A1 will result in subsequent reads within the page being output at a speed of 20 ns. The Page Read Cycle Waveform is shown on ...

R10938P-50

Vendor:ROCKWELLPackage Cooled:DIPD/C:06+

The page read operation of the device is controlled by CE and OE inputs. The page size is four words. The first word access of the page read is the same as the asynchronous read. The first word is read at an asynchronous speed of 70 ns. Once the first word is read, toggling A0 and A1 will result in subsequent reads within the page being output at a speed of 20 ns. The Page Read Cycle Waveform is shown on ...

R10939J50

Vendor:rockwPackage Cooled:rockwD/C:dc90

Read cycles are initiated with ADSP(regardless of WEx and ADSC) using the new external address clocked into the on-chip address register whenever ADSP is sampled low, the chip selects are sampled active, and the output buffer is enabled with OE. In read oper- ation the data of cell array accessed by the current address, registered in the Data-out registers by the positive edge of CLK, are car- ried to the Dat...

R10939P-50

Vendor:ROCKWELLPackage Cooled:DIPD/C:06+

LA is the lead-to-ambient thermal resistance (C/W) and PD is the power dissipation. The value for LA will vary and depends on the device mounting method. LA is generally 30 to 40C/W for the various clips and tie points in common use and for printed circuit board wiring. The temperature of the lead can also be measured using a thermocouple placed on the lead as close as possible to the tie point. The...

R10-E1105-1

R10-E1-L2-V700

R10-E1-W4-V700

R10-E1Y2-115V

R10-E2181-1

R10-E2891-1

R10-E-697-2

R10-E697-2

R10-E9-Z4-V25K48VDC

R10LE1-X6-V430

R1100512FN

Vendor:TIPackage Cooled:PLCC-28D/C:04+

The functional block of the MX98905 consists of the integration of the entire bus interface for PC-AT® (Industry Standard Architecture, ISA) bus-based sys- tems, receiver, transmitter, collision, heartbeat, loopback, jabber, and link integrity blocks. When combined with equalization resistors, the transceiver transmits or receives filters, and pulse transformers provide physical interface from th...

R1100D121C-TR-F

Vendor:N/APackage Cooled:N/AD/C:08+09+

R1100D221C-TR-F

Vendor:N/APackage Cooled:N/AD/C:08+09+

R1104215

Vendor:rockwPackage Cooled:rockwD/C:dc89

ICCSupply current3.66.5mA † Full range is 0C to 70C. ‡ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive. Pulse techniques must be used that will maintain the junction temperatures as close to the ambient temperature as possible. NOTE 2: Supply-voltage rejection ratio is measured for both supply magnitudes increasing ...

R1105FS

Vendor:TOSHIBAD/C:08+

© 2000 by ZiLOG, Inc. All rights reserved. Information in this publication concerning the devices, applications, or technology described is intended to suggest possible uses and may be superseded. ZiLOG, INC. DOES NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZiLOG ALSO DOES NOT ASSUME LIABILITY FOR INTELLECTUA...

R1110004FN

Vendor:TI

The 54830 Series Infiniium scopes use advanced MegaZoom technology so you get all the ben- efits of fast, automatic, affordable deep memory. Due to its unique ASIC architecture, this powerful memory management system called MegaZoom can quickly display up to 128 million points of continuous signal history without the usual bottlenecks and frustrating delays.

R111005

Vendor:TAGPackage Cooled:CAN3D/C:08+

R1110B281B

Vendor:RICOH

Higher speed signalling timing. XHST = 1 normal synchronous to asynchronous conversion (Bell 212; CCITT V.22). XHST = 0 asynchronous to synchronous conversion with higher speed synchronous timing (TXC, RXC). TXC and RXC timing must be 1-2% higher than the normal bit rate in order to allow some overspeed in the asynchronous data. On the receiver side the RX buffer is deleted and the synchronous data RDI i...

R1110N251A

Vendor:RICOHPackage Cooled:SOT-153D/C:08+

I/O7. Once the end of a write cycle has been detected a new access for a read or write can begin. Atmels R1110N251A has additional features to ensure high quality and manufacturability. A software data protection mechanism guards against inadvertent writes. The device also includes an extra 64 bytes of EEPROM for device identification or tracking.

R1110N251A

Vendor:RICOHPackage Cooled:SOT-153D/C:08+

I/O7. Once the end of a write cycle has been detected a new access for a read or write can begin. Atmels R1110N251A has additional features to ensure high quality and manufacturability. A software data protection mechanism guards against inadvertent writes. The device also includes an extra 64 bytes of EEPROM for device identification or tracking.

R1110N251A-TR

Vendor:RICOHPackage Cooled:SOT-23D/C:07+

The NLAS4501 is an analog switch manufactured in sub−micron silicon−gate CMOS technology. It achieves very low RON while maintaining extremely low power dissipation. The device is a bilateral switch suitable for switching either analog or digital signals, which may vary from zero to full supply voltage. The NLAS4501 is pin−for−pin compatible with the MAX4501. The NLAS4501 can b...

R1110N251A-TR / AF

R1110N251B-TR

Vendor:RICOHPackage Cooled:3000D/C:0

The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances.

R1110N281B-TR

Vendor:RICOHPackage Cooled:N/AD/C:98

The IRK.L240 Series of MAGN-A-paks uses fast re- covery power diodes in four basic configurations. The semiconductors are electrically isolated from the metal base, allowing common heatsinks and compact assemblies to be built. Application includes power supplies, battery chargers, welders, motor controls and general industrial current rectification. These modules are intended for those applications where fa...

R1110N301B

Vendor:RICOHPackage Cooled:SOT-153D/C:05+

ITH (Pin 3): Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Nominal voltage range for this pin is from 0.2V to 1.4V with 0.6V corresponding to the zero-sense voltage (zero current).

R1110N301B

Vendor:RICOHPackage Cooled:SOT-23-5D/C:05+

ITH (Pin 3): Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. Nominal voltage range for this pin is from 0.2V to 1.4V with 0.6V corresponding to the zero-sense voltage (zero current).

R1110N331B

Package Cooled:SOT-153

3.3V tolerant input for CPU frequency selection. Refer to input electrical characteristics for Vil_FS and Vih_FS values. TEST_MODE is a real time input to select between Hi-Z and REF/N divider mode while in test mode. Refer to Test Clarification Table. True clock of differential SRC clock pair. Complement clock of differential SRC clock pair. True clock of differential SRC clock pair. Complement cl...

R1110N331B-TR

Vendor:RICONPackage Cooled:SOT23-5D/C:01+

common mode range is that of the CA3080 differential amplifier. In addition, the gain characteristic follows the standard differential amplifier gm temperature coefficient of -0.3%/oC. Although the system of Figure 11 does not provide the precise gain control obtained with the standard operational amplifier approach, it does provide a good simple compromise suitable for many dif...

R1110N331B-TR

Vendor:RICONPackage Cooled:SOT23-5D/C:01+

common mode range is that of the CA3080 differential amplifier. In addition, the gain characteristic follows the standard differential amplifier gm temperature coefficient of -0.3%/oC. Although the system of Figure 11 does not provide the precise gain control obtained with the standard operational amplifier approach, it does provide a good simple compromise suitable for many dif...

R1110N351B

Vendor:RICOH

PCI bus interface for up to 4 IDE devices 33 MHz 32-bit PCI bus data path with full parity error reporting 16 7 MByte sec maximum IDE transfer rate Support for 2 IDE channels ( 2 IDE devices per chan- nel) Primary or secondary IDE addressing (1F0x 170x) in PC compatible mode Re-mappable base registers for full PCI compliance Concurrent channel operation (PIO DMA modes) 4 Double Word write FIFO per c...

R1110N351B-TR

Vendor:RICOHD/C:08+

The reference level is sampled during SHP active period, and the voltage level is held on the sampling capacitor C(1) at the trailing edge of SHP. The data level is sampled during SHD active period, and the voltage level is held on the sampling capacitor C(2) at the trailing edge of SHD. Then, the switched-capacitor amplifier performs the subtraction of these two levels.