S2008LS2

Vendor:LF(TEC)D/C:07+

The adjustable regulator (CS5204−1) has an output voltage range of 1.25 V to 13 V. An external resistor divider sets the output voltage as shown in Figure 10. The regulator maintains a fixed 1.25 V (typical) reference between the output pin and the adjust pin. A resistor divider network R1 and R2 causes a fixed current to flow to ground. This current creates a voltage across R2 that adds to the...

S2008V

Vendor:LF(TEC)Package Cooled:TO-251D/C:07+

organized as 525,288 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields high-performance and low power consumption devices.

S2008VS2

Vendor:LF(TEC)Package Cooled:TO-251D/C:07+

LINEARITY Linearity refers to how well a transducers output follows the equation: Vout = Voff + sensitivity x P over the operating pressure range. There are two basic methods for calculating nonlinearity: (1) end point straight line fit (see Figure 5) or (2) a least squares best line fit. While a least squares fit gives the best case linearity error (lower numerical value), the calculations required...

S2008VS3

Vendor:LF(TEC)Package Cooled:TO-251D/C:07+

Internal digital control, serial bus and external digital input signal relationships STANDBY mode RF only mode Signal descriptions Data path signals through pins A to D Data signal path through input pins RFSUMP and RFSUMN HF filtering Focus signals Radial signals DPD signals (DVD-ROM mode) with no drop-out concealment DPD signals (DVD-ROM mode) with drop-out concealment Three-beam push-pull (...

S-200K-OHM

S200MND16AS

Vendor:JAPAN INTERNATIONAL

The new 8-Mbit and 16-Mbit Smart 3 Advanced Boot Block flash memory provides a convenient upgrade from and/or compatibility to previous 4- Mbit and 8-Mbit Boot Block products. The Smart 3 product functions are similar to lower density products in both command sets and operation, providing similar pinouts to ease density upgrades.

S200MND8S

Vendor:ORIGINPackage Cooled:04+D/C:14

The A8282SLB output is set to 12, 13, 18, or 20-V by the VSEL terminals. Additionally, it is possible to increase the selected voltage by 1-V to compensate for the voltage drop in the coaxial cable (LLC terminal high). It is supplied in a 24-lead SOIC power-tab package. The power tabs are at ground potential and need no electrical isolation. The A8282SLB is an improved version of the A8283SLB, without a...

S200MQ12

Vendor:ORIGINPackage Cooled:ORIGIN

Notes: Œ Repetitive rating; pulse width limited by maximum junction temperature (see figure 9)  Starting TJ = 25C, L = 10mH, RG = 25Ω, IAS = 4.0A Ž ISD 4.0A, di/dt 74A/µs, VDD V(BR)DSS, TJ 150C  Pulse width 300µs; duty cycle 2% … Surface mounted on FR-4 board, t 10sec.

S200MQ12

Vendor:ORIGINPackage Cooled:NEW

Notes: Œ Repetitive rating; pulse width limited by maximum junction temperature (see figure 9)  Starting TJ = 25C, L = 10mH, RG = 25Ω, IAS = 4.0A Ž ISD 4.0A, di/dt 74A/µs, VDD V(BR)DSS, TJ 150C  Pulse width 300µs; duty cycle 2% … Surface mounted on FR-4 board, t 10sec.

S-2010A

Package Cooled:NO

Notes:  Repetitive rating; pulse width limited by max. junction temperature. ‚ Limited by TJmax, starting TJ = 25C, L = 0.39mH RG = 25Ω, IAS = 44A, VGS =10V. Part not recommended for use above this value. ƒ ISD 44A, di/dt 660A/µs, VDD V(BR)DSS, TJ 175C. „ Pulse width 400µs; duty cycle 2%.

S2010AP

Vendor:copal electrPackage Cooled:copal electrD/C:dc03

The ISD1000A ChipCorder Series devices are designed to Record and Play back audio and voice information in a single chip with a minimum of circuit complexity. This compact, easy-to-use, nonvolatile, low-power solution has been made possible by ISD's multilevel storage technology a breakthrough in storage technology in EEPROM. ISDs multilevel storage technology results in stor- age density that is eight tim...

S2010D

Vendor:TECCORPackage Cooled:TO-252D/C:05+

No external component required. LED sink current 20 mA and 15mA Individual current sink circuit for all LEDs outputs to prevent short / open circuit on LEDs. PTC LED current for luminosity compensation. 3 channels (SOT-26), 4 channels (MSOP-8) available. 90% efficiency Supply voltage range 2.7V ~ 6V 0.1uA standby current 2KV HBM ESD protection Advanced Bi-CMOS process

S2010DS2

Vendor:LF(TEC)Package Cooled:TO-252D/C:07+

I2C is a trademark of Philips Corp. Purchase of I2C components of Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips.

S2010DS3

Vendor:LF(TEC)Package Cooled:TO-252D/C:07+

1. Typical characteristics are at TA = 25oC.2. Fmax = 1/tRC . 3. These are absolute values with respect to device ground and all overshoots due to system or tester notice are included. 4. Icc_Max. is 45mA(@55ns) / 36mA(@70ns) during 0~70oC operation.5. IccsB1 is 10uA at Vcc=3.0V and TA=70oC.

S2010F1

Vendor:LF(TEC)Package Cooled:TO-202D/C:07+

Every manufacturing lot is tested in a low dose rate (total dose) environment per MIL-STD-750, test method 1019 condition A. International Rectifier has imposed a standard gate condition of 12 volts per note 6 and a VDS bias condition equal to 80% of the device rated voltage per note 7. Pre- and post- irra- diation limits of the devices irradiated to 1 x 105 Rads (Si) are identical and are presented ...

S2010FS21

Vendor:LF(TEC)Package Cooled:TO-202D/C:07+

or 18-bit output bus. The Bus Size Select pin (BSS) determines the desired output bus width. In a building block configuration, multiple devices can be used to multiplex larger numbers of input streams onto output buses greater than 18 bits. The principle application is in ATM networking based systems, but can be used in any data or telecommunications application requiring the merging of indepen- dent data st...

S2010FS31

Vendor:LF(TEC)Package Cooled:TO-202D/C:06+

This 18-bit universal bus transceiver is built using advanced dual metal CMOS technology. The ALVCH16901 is a dual 9-bit to dual 9-bit parity transceiver with registers. The device can operate as a feed-through transceiver or it can generate/check parity from the two 8-bit data buses in either direction. The ALVCH16901 features independent clock (CLKAB or CLKBA), latch-enable (LEAB or LEBA), and dual ...

S2010FS31

Vendor:LF(TEC)Package Cooled:TO-202D/C:06+

This 18-bit universal bus transceiver is built using advanced dual metal CMOS technology. The ALVCH16901 is a dual 9-bit to dual 9-bit parity transceiver with registers. The device can operate as a feed-through transceiver or it can generate/check parity from the two 8-bit data buses in either direction. The ALVCH16901 features independent clock (CLKAB or CLKBA), latch-enable (LEAB or LEBA), and dual ...

S2010R

Vendor:LF(TEC)Package Cooled:TO-220D/C:07+

The IRU1015 adjustable Low Dropout (LDO) regulator is a three-terminal device which can easily be programmed with the addition of two external resistors to any volt- ages within the range of 1.25 to 5.5 V.This regulator un- like the first generation of the three-terminal regulators such as LM117 that required 3V differential between the input and the regulated output, only needs 1.3V differen- tial to mainta...

S2010V

Vendor:LF(TEC)Package Cooled:TO-251D/C:07+

Note 1. 100KEP circuits are designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse airflow greater than 500lfpm is maintained. Input and output varies 1:1 with VCC.

S2010VS2

Vendor:LF(TEC)Package Cooled:TO-251D/C:07+

The serial number is divided into three parts (see Figure 1). The 8Cbit family code tells the Access System (and consequently the developer) what type of iButton is being used. The next 48 bits are lasered sequentially with no two numbers the same. The last 8 bits contain a Cyclic Redundancy Check (CRC) value that has been calculated across the family code and the 48Cbit serial number. The CRC ensure...

S2010VS3

Vendor:LF(TEC)Package Cooled:TO-251D/C:07+

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input ...

S2010VS3

Vendor:LF(TEC)Package Cooled:TO-251D/C:07+

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input ...

S-2011A

C 512K-Bit Internal Program/Cache (16K 32-Bit Instructions) C 512K-Bit Dual-Access Internal Data (64K Bytes) 32-Bit External Memory Interface (EMIF) C Glueless Interface to Synchronous Memories: SDRAM and SBSRAM C Glueless Interface to Asynchronous Memories: SRAM and EPROM Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel 16-Bit Host-Port Interface (HPI) C Acc...

S-2011A

C 512K-Bit Internal Program/Cache (16K 32-Bit Instructions) C 512K-Bit Dual-Access Internal Data (64K Bytes) 32-Bit External Memory Interface (EMIF) C Glueless Interface to Synchronous Memories: SDRAM and SBSRAM C Glueless Interface to Asynchronous Memories: SRAM and EPROM Four-Channel Bootloading Direct-Memory-Access (DMA) Controller With an Auxiliary Channel 16-Bit Host-Port Interface (HPI) C Acc...

S2011S

Vendor:IRPackage Cooled:SOP-8D/C:04+

Recommended Operating Conditions • Supply voltageVDD∗3.0 to 4.0 V • Operating temperature ToprC20 to +75 C ∗ The VDD (min.) for the S2011SR varies according to the playback speed and built-in VCO selection. The VDD (min.) for the S2011SR under various conditions are as shown on the following page.

S2012D

Vendor:LF(TEC)Package Cooled:TO-251D/C:07+

This method of determining odd / even field information provides for superior noise immunity. Noise during the pre- equalizing pulses does not affect the output since the field decision is made at the beginning of the vertical interval. This noise immunity is displayed in Figure 4 in which an extra pre- equalizing pulse has been added to the video input with no negative effect on the odd/even field information.

S2012NH

Vendor:6000D/C:TO-220

NOTES 1Temperature range is as follows: B Version: C40C to +85C. 2Typical values are at 25C, unless otherwise stated. 3Guaranteed by design, not subject to production test. 4The digital switch contributes no propagation delay other than the RC delay of the typical R ON of the switch and the load capacitance when driven by an ideal voltage source. Since the time constant is much smaller than the rise/fal...

S2012R

Vendor:LF(TEC)Package Cooled:TO-220D/C:07+

The MAX2531 multiband LNA/Mixer IC is optimized for CDMA, GSM, and TDMA applications in cellular band. The MAX2531 IC features a GPS LNA/mixer signal path for E911 and Traveler Assistance applications. The cellular signal can be routed to either IF port. For example, one IF port can be connected to an IF filter with 30kHz band-width, while the other port can drive an IF filter with a wider bandwidth. The G...

S2012V

Vendor:LF(TEC)Package Cooled:TO-251D/C:07+

The chopper stabilization technique uses a 170 kHz high frequency clock. The Hall plate chopping occurs on each clock edge resulting in a 340 kHz chop frequency. The high frequency operation allows for a greater sampling, which produces higher accuracy and faster signal processing capability. Using this chopper stabilization approach, the chip is de- sensitized to the effects of temperature and stress. This t...

S2012V

Vendor:LF(TEC)Package Cooled:TO-251D/C:07+

The chopper stabilization technique uses a 170 kHz high frequency clock. The Hall plate chopping occurs on each clock edge resulting in a 340 kHz chop frequency. The high frequency operation allows for a greater sampling, which produces higher accuracy and faster signal processing capability. Using this chopper stabilization approach, the chip is de- sensitized to the effects of temperature and stress. This t...

S2014BF-PMI

Vendor:Infineon

System operation has been enhanced by the addition of common asynchronous-Preset and Reset product terms and a power-up Reset feature. The PALCE29MA16 also incorporates Preload and Obser- vability functions which permit full logic verification of the design.

S2014C

Vendor:Infineon

The 5B39 is a single-channel signal conditioning module that converts a high-level analog input voltage into a floating, isolated proportional output current of 4 to 20 mA or 0 to 20 mA across loads from 0Ω to 750Ω. The module provides high accuracy of +0.05%, low nonlinearity of +0.02%, and the protection of 1500V rms isolation between output-to-input and output-to power supply. The input ...

S2014C

Vendor:Infineon

The 5B39 is a single-channel signal conditioning module that converts a high-level analog input voltage into a floating, isolated proportional output current of 4 to 20 mA or 0 to 20 mA across loads from 0Ω to 750Ω. The module provides high accuracy of +0.05%, low nonlinearity of +0.02%, and the protection of 1500V rms isolation between output-to-input and output-to power supply. The input ...

S2014C15

Vendor:Infineon

S2015L

Vendor:LF(TEC)Package Cooled:TO-220D/C:07+

Notes: (i) For operation below 0 C the external capacitors must bave stable characteristics. use either a low ESR tantalum, Os-Con, or ceramic capacitor. (ii) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated maximum.

S2016A

Vendor:AMCCPackage Cooled:RQFP-120D/C:00

The oscillator frequency (fosc) can be set between 20 kHz and 500 kHz by connecting a resistor between RT and GND. Acceptable resistor values range from 15 kΩ to 250 kΩ. The oscillator frequency can be determined by using the graph shown in Figure 5.

S2016N

Vendor:LF(TEC)Package Cooled:TO-263D/C:07+

This miniature surface mount MOSFET features ultra low RDS(on) and true logic level performance. It is capable of withstanding high energy in the avalanche and commutation modes and the drainCtoCsource diode has a very low reverse recovery time. MMFT5P03HD devices are designed for use in low voltage, high speed switching applications where power efficiency is important. Typical applications are dcCdc ...

S201D01

Vendor:SHARPPackage Cooled:06+D/C:800

The SiP41109/41110 enters shutdown mode when the signal driving PWM enters the tri-state window for more than 240 ns. The shutdown state is removed when the PWM signal moves outside the tri-state window. If the PWM is left open, the pin is held to 2.5 V by an internal voltage divider, thus forcing the tri-state condition.

S201D02

Vendor:SHARPPackage Cooled:06+D/C:800

For the adjustable output controller, the VREF pin allows great flexibility for the designer. Taking a simple resistor divider tied to an external voltage source and connecting the divider to the VREF pin allows the controller to regulate an output voltage that is some fraction of the external voltage source. And, because any changes in the external voltage source are sensed by the voltage divider, the re...

S201DH1

Vendor:SHARPPackage Cooled:DIP-10D/C:800

GENERAL DESCRIPTION The NJU7200 series is a super low operating current C-MOS 3-terminal positive voltage regulator which contains internal accurate voltage reference, error amplifier, control transistor and output voltage setting resistor. The regulation voltage is fixed by internal circuits and the following line-up of different output voltage versions are available. The NJU7200 series is suitable fo...

S201DHI

Vendor:SHARPPackage Cooled:DIP

S201DHIY

Vendor:SHARPPackage Cooled:10D/C:03+

Advanced HEXFET® Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.

S201DHIY

Vendor:SHARPPackage Cooled:10D/C:03+

Advanced HEXFET® Power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.

S201E

Vendor:LF(TEC)D/C:07+

The SN65LV1224A has an input threshold sensitivity of 50 mV. This allows for greater differential noise margin in the SN65LV1224A. However, in cases where the receiver input is not being actively driven, the increased sensitivity of the SN65LV1224A can pickup noise as a signal and cause unintentional locking. This may occur when the input cable is disconnected. SN65LV1224A has an on-chip fail-safe circuit ...

S201S05M

Vendor:SHARPPackage Cooled:06+D/C:5000

Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock Outputs Fully Compatible With LVECL/LVPECL/HSTL Single Supply Voltage Required, 3.3-V or 2.5-V Supply Selectable Clock Input Through CLK_SEL Low-Output Skew (Typ 15 ps) for Clock-Distribution Applications VBB Reference Voltage Output for Single-Ended Clocking Available in a 32-Pin LQFP Package Frequency Range From ...

S201S05V

• Compatible with Popular Fiber Optic Module Specifications such as Xenpak, SFF, SFP, and GBIC • Package 14 Pin TSSOP 15 Lead 2.7 x 3.5mm CSP (Chip-Scale Package) • Two Programmable Current Generators 1.6 mA max. 8-bit (256 Step) Resolution • Integrated 6 bit A/D Converter • Temperature Compensation Internal or External Sensor C40C to +100C Range 2.2C / step re...

S201S06

The situation is somewhat more complicated in the design of the RF impedance matching network, which includes the package inductance and capacitance (which can be tuned out), the series resistance, the junction capacitance and the video resistance. Of these five elements of the diodes equivalent circuit, the four parasitics are constants and the video resistance is a function of the current flowing th...

S202031MS02Q

Vendor:ITTD/C:07/08+

selectable modes of power reduction idle mode and power-down mode are available. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. Since the design is static, the clock can be stopped without loss of user data...

S2020L

Vendor:LF(TEC)Package Cooled:TO-220D/C:07+

S2022

Vendor:三洋Package Cooled:TSSOP-8D/C:04+

Device bus operations are initiated through the internal command register, which consists of sets of latches that store the commands, along with the address and data information, if any, needed to execute the specific command. The command register itself does not occupy any addressable memory location. The contents of the command register serve as inputs to an internal state ma- chine whose outputs...

S2024B-6

S2025

Vendor:AMCCPackage Cooled:QFP-196PD/C:01+

C Replaces TTL, MSI, and other PLD logic C Integrates complete sub-systems into a single package C Avoids the NRE, time delay, and risk of conventional masked gate arrays • High-performance CMOS static memory technology C Guaranteed toggle rates of 70 to 325 MHz, logic delays from 9 to 2.2 ns C System clock speeds over 80 MHz C Low quiescent and active power consumption • Flexibl...

S2025C-15

Package Cooled:TQFP-196P

General Description The HPMD-7905 is a miniaturized duplexer designed for US PCS handset, designed using Agilent Technologies Film Bulk Acoustic Resonator (FBAR) Technology. The HPMD-7905 features a very small size: it is less than 2 mm thick and has a footprint of only 5.6 x 11.9 mm2.

S2025L6

S2025N

Vendor:LF(TEC)Package Cooled:TO-263D/C:07+

True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed access C Commercial: 10/12/15ns (max.) C Industrial: 12ns (max.) Dual chip enables allow for depth expansion without external logic IDT70V631 easily expands data bus width to 36 bits or more using the Master/Slave select when cascading more than one device M/S = VIH for BUSY output flag on Master, M/S...

S2025R

Vendor:LF(TEC)Package Cooled:TO-220D/C:07+

The S2025R is a direct PWM drive predriver IC designed for three-phase power brushless motors. A motor driver circuit with the desired output power (voltage and current) can be implemented by adding discrete transistors in the output circuits. Furthermore, the S2025R provides a full complement of protection circuits allowing it to easily implement high-reliability drive circuits. This device is optimal for...

S202DS2

Package Cooled:TO220-4

high-side IXBD4411. The IXBD4411 gate-drive will turn-off the power device whenever an overcurrent or under voltage condition arises. The overcurrent sensing is active only while the gate driver output is "high" (on). The overcurrent fault condition is latched and is reset on the next INH gate input positive transition. The FLT (pin 8) of the IXBD4411 is not used and should be grounded.

S202J

Package Cooled:SOP16M

Device Description The following information is provided: part number, semiconductor materials used, sequence of zones, technology used, device type and, if necessary con- struction. Also, information on the typical Applications and spe- cial Features is given Absolute Maximum Ratings The absolute maximum ratings indicate the maximum permissible operational and environmental condi- tions. Exceeding...

S202S01

Vendor:SHARPPackage Cooled:ZIP-4D/C:5000

Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 1.8mH, IAS = 19.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25C 3. ISD 19.0A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature

S202S01

Vendor:SHARPPackage Cooled:06+D/C:5000

Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 1.8mH, IAS = 19.0A, VDD = 50V, RG = 25 Ω, Starting TJ = 25C 3. ISD 19.0A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature

S202S01F

• TTL-Compatible 5-Bit Digital Output Voltage Selection - Wide Range - 0.925V DC to 1.3VDC in 25mV Steps, and from 1.3VDC to 2.0VDC in 50mV Steps - Programmable On-the-Fly VID Code Change with Customer Programmable Slew Rate and 100µs Settling Time

S202S02

Vendor:SHARPPackage Cooled:04+D/C:5000

Features q Few external components q Frequency and amplitude-stable unbalanced oscillator for the VHF I-frequency range q Frequency and amplitude-stable balanced oscillators for the VHF II- and UHF-frequency range q Optimum decoupling of input frequency from oscillator q Double balanced mixer with wide dynamic range and high- impedance inputs for the VHF I-frequency range q Double balanced mixer w...

S202S02

Vendor:SHARPPackage Cooled:04+D/C:5000

Features q Few external components q Frequency and amplitude-stable unbalanced oscillator for the VHF I-frequency range q Frequency and amplitude-stable balanced oscillators for the VHF II- and UHF-frequency range q Optimum decoupling of input frequency from oscillator q Double balanced mixer with wide dynamic range and high- impedance inputs for the VHF I-frequency range q Double balanced mixer w...

S202S11

Vendor:SHARPPackage Cooled:06+D/C:5000

Master/Slave Synchronization. When it is open, a signal synchronous with the turn-off of the inter- nal power is present at the pin. When connected to an external signal at a frequency higher than the internal one, then the device is synchronized by the external signal. Connecting together the SYNC pin of two devices, the one with the higher frequency works as master and the other one, works as slave.

S202S12

Vendor:SHARPPackage Cooled:(LX)high-frequencyD/C:02+

1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.

S202S15V

Vendor:SHARPPackage Cooled:04+D/C:5000

The chip enable-controlled access is initiated by CE going active while OE remains asserted, PE remains deasserted, and the addresses remain stable for the entire cycle. After the specified tELQV is satisfied, the eight-bit word addressed by A(14:0) appears at the data outputs DQ(7:0).

S202S15V

Vendor:SHARPPackage Cooled:00+D/C:5000

The chip enable-controlled access is initiated by CE going active while OE remains asserted, PE remains deasserted, and the addresses remain stable for the entire cycle. After the specified tELQV is satisfied, the eight-bit word addressed by A(14:0) appears at the data outputs DQ(7:0).

S202SE1

Vendor:SHARPPackage Cooled:N/AD/C:5000

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ‡ All voltages ...

S202SE1

Vendor:SHARPPackage Cooled:N/AD/C:5000

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. ‡ All voltages ...

S202SE2

Vendor:SHARPPackage Cooled:SIP-4D/C:5000

Note 2: When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > +VS) the current at that pin should be limited to 5 mA. The 20 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5 mA to four.

S202T01

Vendor:SHARPPackage Cooled:00+D/C:5000

This data sheet has been carefully CORPORATION • 5980 NORTH SHANNON ROADassumed for possible inaccuracies • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739APEX MICROTECHNOLOGY checked and is believed to be reliable, however, no responsibility•isTUCSON, ARIZONA 85741 or omissions. All specifications are subject to change without notice.

S202T02

Package Cooled:SIP4

Low input current with normal VCC or VCC e 0V (30 mA typ) High noise immunity (1 1V typ) Temperature-insensitive input thresholds track bus logic levels TTL compatible output Matched optimized noise immunity for 1 and 0 levels High speed (19 ns typ)

S202TA1

Vendor:SHARPPackage Cooled:00+D/C:02+

The IRU1015 keeps a constant 1.25V between the out- put pin and the adjust pin. By placing a resistor R1 across these two pins a constant current flows through R1, add- ing to the Iadj current and into the R2 resistor producing a voltage equal to the (1.25/R1)*R2 + Iadj*R2 which will be added to the 1.25V to set the output voltage. This is summarized in the above equation. Since the minimum load current requ...

S-2030

Note 8: CPD is defined as the value of the internal equivalent capacitance, which is calculated from the operating current consumption without load. Average operating current can be obtained from the equation: ICC (opr.) CPD * VCC * fIN I CC/4 (per gate)

S-2030

Note 8: CPD is defined as the value of the internal equivalent capacitance, which is calculated from the operating current consumption without load. Average operating current can be obtained from the equation: ICC (opr.) CPD * VCC * fIN I CC/4 (per gate)

S-2031

The XR16L27521 (2752) is a low voltage dual universal asynchronous receiver and transmitter (UART) with 5 Volt tolerant inputs. The device operates from 2.25 to 5.5 Volt supply range and is pin-to-pin compatible to Exars ST16C2552 and XR16C2852. The 2752 register set is compatible to the ST16C2552 and the XR16C2852 enhanced features. It supports the Exars enhanced features of 64 bytes of TX and RX ...

S2033A-10

Vendor:AMCCPackage Cooled:CFP68D/C:9351

S2033A-10

Vendor:AMCCPackage Cooled:QFPD/C:9351

S2035A

Vendor:AMCCPackage Cooled:N/AD/C:1

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. This device is rated at 1500 V HBM and 1000 V CDM.

S2035J

Vendor:LF(TEC)Package Cooled:TO-218XD/C:07+

The module should be placed as close as possible to the transmitter or receiver with which it is to be paired. A ground plane should be placed under the module, usually on the backside of the PCB. RF traces to and from the amp should be kept short and of the proper width to assure service as a 50Ω transmission line. The modules RF ports are AC-coupled and require no matching in a 50Ω system.

S2035K

Vendor:TECCORD/C:07+

Bidirectional I/O lines. Software instructions determine the CMOS output or Schmitt trigger input with a pull-high resistor (determined by pull-high options). The external interrupt and timer input are pin-shared with the PC0 and PC1, respectively. The external inter- rupt input is activated on a high to low transition.

S2035W

Vendor:LF(TEC)Package Cooled:TO-218XD/C:07+

SNR = 90 dB in 150 kHz bandwidth (to Nyquist @ 61.44 MSPS) Worst harmonic = 83 dBc (to Nyquist @ 61.44 MSPS) Integrated dual-channel ADC: Sample rates up to 65 MSPS IF sampling frequencies to 200 MHz Internal ADC voltage reference Integrated ADC sample-and-hold inputs Flexible analog input range (1 V to 2 V p-p) Differential analog inputs ADC clock duty cycle stabilizer 85 dB channel isolatio...

S2035W

Vendor:LF(TEC)Package Cooled:TO-218XD/C:07+

SNR = 90 dB in 150 kHz bandwidth (to Nyquist @ 61.44 MSPS) Worst harmonic = 83 dBc (to Nyquist @ 61.44 MSPS) Integrated dual-channel ADC: Sample rates up to 65 MSPS IF sampling frequencies to 200 MHz Internal ADC voltage reference Integrated ADC sample-and-hold inputs Flexible analog input range (1 V to 2 V p-p) Differential analog inputs ADC clock duty cycle stabilizer 85 dB channel isolatio...

S2036-6.4800

S203D4S

Vendor:SHARPPackage Cooled:DIP-10D/C:800

MCHS = # macrocells used in high speed mode MCLP = #macrocells used in low power mode PTHS = average p-terms used per high speed macrocell PTLP = average p-terms used over low power macrocell fMAX = max clocking frequency in the device MCTOG = % macrocells toggling on each clock (12% is frequently a good estimate

S2040N

Vendor:LF(TEC)Package Cooled:TO-263D/C:07+

Preserve correct memory cell data by maintaining power and executing a ?R?A/S cycle (READ, WRITE) or ?R?A/S refresh cycle (?R?A/S ONLY, CBR, or HIDDEN) so that all 1,024 combinations of RAS addresses are executed at least every??/ 16ms, regardless of sequence. The CBR REFRESH cycle will invoke the refresh counter for automatic ?R?A/S addressing.

S2040N

Vendor:LF(TEC)Package Cooled:TO-263D/C:07+

Preserve correct memory cell data by maintaining power and executing a ?R?A/S cycle (READ, WRITE) or ?R?A/S refresh cycle (?R?A/S ONLY, CBR, or HIDDEN) so that all 1,024 combinations of RAS addresses are executed at least every??/ 16ms, regardless of sequence. The CBR REFRESH cycle will invoke the refresh counter for automatic ?R?A/S addressing.

S2043B

S2044

S2044B

Vendor:AMCCPackage Cooled:QFPD/C:03+

S2045

260C for 10 Seconds Package designed for optimal automated board assembly Small package size for high density applications Available in 8 mm Tape and Reel Use the Device Number to order the 7 inch/3,000 unit reel. Replace the T1 with T3 in the Device Number to order the 13 inch/10,000 unit reel.

S2045B10

Vendor:availPackage Cooled:AMCCD/C:01+

The WCMA2016U4X is a high-performance CMOS static RAMs organized as 128K words by 16 bits. These devices feature advanced circuit design to provide ultra-low active cur- rent. This device is ideal for portable applications such as cel- lular telephones. The devices also have an automatic pow- er-down feature that significantly reduces power consumption by 80% when addresses are not toggling. The device can al...

S2045B-20

S2047B

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed.

S2050B

Vendor:AMCC

1.3.4 Interrupt Controller The S2050BSXL interrupt controller consists of two cascaded programmable interrupt controllers that are compatible with the Intel 8259A Programmable Interrupt Controller. They pro- vide a total of 15 (out of 16) programmable interrupts. Three interrupts are reserved for a real time clock-tick interrupt, a real time clock interrupt request, and a cascade interrupt channel. The...

S2051

Vendor:HARRISPackage Cooled:Sop8D/C:08+

In Europe, Caller ID requirements are defined by ETSI. The CPE documents are ETS 300 778-1 for on-hook, ETS 300 778-2 for off-hook. The end office requirements are ETS 300 659-1 (on-hook) and ETS 300 659-2 (off-hook). ETSI has defined services such as CLIP and CLIP with Call Waiting which are similar to those of Bellcore. Some European countries produce their own national specifications. For example, in the...

S2052B-001

S2052C

1.1 Scope. This specification covers the performance requirements for NPN silicon switching transistors. Four levels of product assurance are provided for each encapsulated device type as specified in MIL-PRF-19500 and two levels of product assurance are provided for each unencapsulated device type as specified in MIL-PRF-19500.

S2053C

Vendor:AMCCPackage Cooled:QFP

The UCC384-x family of negative linear-series pass regulators is tailored for low-dropout applications where low-quiescent power is important. Fabricated with a BCDMOS technology ideally suited for low input-to-output differential applications, the UCC384-x passes 0.5 A while requiring only 0.2 V of input-voltage headroom. Dropout voltage decreases linearly with output current, so that dropout at 50 mA is...