STK412-230

Vendor:1200

functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

STK412-230

Vendor:1200

functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

STK412-240

Vendor:1200

If the A5, A1, A0 address line inputs are LOW then the IDT72V8985 Internal Control Register is addressed (see Table 2). If A5 input line is high, then the remaining address input lines are used to select the 32 possible channels per input or output stream. As explained in the Control Register description, the address input lines and the Stream Address bits (STA) of the Control register give the user the c...

STK412-240M

Vendor:SANYOPackage Cooled:HYBD/C:03+

Added section 4.15.3 - In-System-Programming (ISP) of FLASH ROM Devices. Added section 4.15.4 - UART Interface. Added section 4.15.5 - DDC2Bi Interface. In sections 4.3.2 - ADC Characteristics and 4.4.1 - DVI Receiver Characteristics clarified that input formats with resolutions higher than that supported by the LCD panel are supported as recovery modes only. • Pins 143 ~ 146: changed xxx_SD...

STK412-290

Vendor:450

Note 9: If the product is in shutdown mode and VDD exceeds 3.6V (to a max of 4V VDD), then most of the excess current will flow through the ESD protection circuits. If the source impedance limits the current to a max of 10mA, then the part will be protected. If the part is enabled when VDD is above 4V, circuit performance will be curtailed or the part may be permanently damaged.

STK412-290

Vendor:450Package Cooled:HYB

Note 9: If the product is in shutdown mode and VDD exceeds 3.6V (to a max of 4V VDD), then most of the excess current will flow through the ESD protection circuits. If the source impedance limits the current to a max of 10mA, then the part will be protected. If the part is enabled when VDD is above 4V, circuit performance will be curtailed or the part may be permanently damaged.

STK4122MK2

Vendor:SANYOPackage Cooled:SIP18D/C:DIP

DESCRIPTION The M27C801 is an 8 Mbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for applica- tions where fast turn-around and pattern experi- mentation are important requirements and is organized as 1,048,576 by 8 bits. The FDIP32W (window ceramic frit-seal package) has transparent lid which allows the user to ex- pose the chip to ...

STK412-400

Vendor:SANYOPackage Cooled:HYBD/C:04+

Control of the wiper (RW) position setting is accomplished via the two inputs UC and DC. The UC and DC control inputs, when active, determine the direction on the resistor array that the wiper position will move. The UC (up control) control input is used to move the wiper position towards the RH terminal. The DC (down control) control input is used to move wiper position towards the RL terminal.

STK412-410

Vendor:SANYO

The DS1642 is in the read mode whenever WE (write enable) is high, and CE (chip enable) is low. The device architecture allows rippleCthrough access to any of the address locations in the NV SRAM. Valid data will be available at the DQ pins within tAA after the last address input is stable, providing that the CE and OE access times and states are satisfied. If CE or OE access times are not met, valid data wi...

STK412-420

Vendor:N/AD/C:08+09+

This is a dual-function pin. In the CY Standard mode, the FF function is selected. FF indicates whether or not the FIFO memory is full. In the FWFT mode, the IR function is selected. IR indicates whether or not there is space available for writing to the FIFO memory. FF/IR is synchronized to the LOW-to-HIGH transition of CLKA.

STK412-430

D/C:08+/09+

Leading-edge triggering (A) and trailing edge triggering (B) inputs are provided for triggering from either edge of the input pulse. An unused A input should be tied to GND and an unused B should be tied to VCC. On power up the IC is reset. Unused resets and sections must be terminated. In normal operation the circuit retriggers on the application of each new trigger pulse. To operate in the non-trigge...

STK412-430

Vendor:SANYOD/C:08+/09+

Leading-edge triggering (A) and trailing edge triggering (B) inputs are provided for triggering from either edge of the input pulse. An unused A input should be tied to GND and an unused B should be tied to VCC. On power up the IC is reset. Unused resets and sections must be terminated. In normal operation the circuit retriggers on the application of each new trigger pulse. To operate in the non-trigge...

STK412-440

Vendor:SANYOPackage Cooled:HYBD/C:03+

Address Inputs Byte Enable Data In / Out Data In / Out (word-wide mode), Low-Order Address (byte-wide mode) Chip Enable Output Enable No Internal Connection Reset / Deep Power Down 5-V Power Supply 12-V Power Supply for Program / Erase Ground Write Enable

STK412-440

Vendor:SANYOPackage Cooled:HYBD/C:03+

Address Inputs Byte Enable Data In / Out Data In / Out (word-wide mode), Low-Order Address (byte-wide mode) Chip Enable Output Enable No Internal Connection Reset / Deep Power Down 5-V Power Supply 12-V Power Supply for Program / Erase Ground Write Enable

STK412-490

Vendor:SANYOPackage Cooled:MODULED/C:04+

STK4130

Vendor:SANYOPackage Cooled:06+D/C:800

The 74HC/HCT393 are 4-bit binary ripple counters with separate clocks (1CP and 2 CP) and master reset (1MR and 2MR) inputs to each counter. The operation of each half of the 393 is the same as the 93 except no external clock connections are required. The counters are triggered by a HIGH-to-LOW transition of the clock inputs. The counter outputs are internally connected to provide clock inputs to succ...

STK4130

Vendor:SANYOPackage Cooled:06+D/C:800

The 74HC/HCT393 are 4-bit binary ripple counters with separate clocks (1CP and 2 CP) and master reset (1MR and 2MR) inputs to each counter. The operation of each half of the 393 is the same as the 93 except no external clock connections are required. The counters are triggered by a HIGH-to-LOW transition of the clock inputs. The counter outputs are internally connected to provide clock inputs to succ...

STK413-000

Vendor:SANYOPackage Cooled:N/AD/C:9+

DATA Pin The DATA pin is the serial data in (SDI) function for setting the threshold of the voltage comparator. The DATA pin contains an internal Schmitt trigger as part of its input to improve noise immunity. This pin has an inter- nal pullCdown device to provide a low level when the pin is left unconnected. CLK Pin The CLK pin is used to provide a clock used for loading and shifting data into t...

STK413-000

Vendor:SANYOPackage Cooled:N/AD/C:9+

DATA Pin The DATA pin is the serial data in (SDI) function for setting the threshold of the voltage comparator. The DATA pin contains an internal Schmitt trigger as part of its input to improve noise immunity. This pin has an inter- nal pullCdown device to provide a low level when the pin is left unconnected. CLK Pin The CLK pin is used to provide a clock used for loading and shifting data into t...

STK413-010

Vendor:SANYO

The information provided herein is believed to be reliable at press time. Stanford Microdevices assumes no responsibility for inaccuracies or omissions. Stanford Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the users own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circu...

STK413-010A

Vendor:Sanyo

The clock driver serial protocol accepts byte write, byte read, block write, and block read operations from the controller. For block write/read operation, the bytes must be accessed in sequential order from lowest to highest byte (most significant bit first) with the ability to stop after any complete byte has been transferred. For byte write and byte read operations, the system controller can access individ...

STK413-010A T

STK413-020

Vendor:SANYOPackage Cooled:N/AD/C:9+

Supporting system speeds greater than 100 MHz and using a typical operating current of 15 to 170 mA, AT6000 Series devices are ideal for high-speed, compute-intensive designs. These FPGAs are designed to implement Cache Logic®, which provides the user with the ability to implement adaptive hardware and perform hardware acceleration.

STK413-020A

Vendor:SANYOPackage Cooled:MODULED/C:N/A

• Low-power, high-speed CMOS EPROM/EEPROM technology • Fully static design • Wide operating voltage range 2.5V to 5.5V • Commercial, Industrial and Extended temperature ranges • Low power consumption < 2 mA @ 5V, 4 MHz 15 µA typical @ 3V, 32 kHz < 1 µA typical standby current

STK4130MK2

Vendor:SANYO

STK4131

Conditions Measured from input terminals to output terminals, shortest distance through air. Measured from input terminals to output terminals, shortest distance path along body. Insulation thickness between emitter and detector; also known as distance through insulation. DIN IEC 112/VDE 0303 Part 1

STK4131 II

STK4131-2

Vendor:SANYOPackage Cooled:SIP18

NOTES: 1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics. 2. Per TTL driven input (VIN = 3V, control inputs only). A and B pins do not contribute to Icc. 3. This current applies to the control inputs only and represents the current required to switch internal capacitance at the specified frequency. The A and B inputs generate no significant AC...

STK4131V

Vendor:SANYOPackage Cooled:N/AD/C:9+

The STK4131V provides the added functionality of being able to simultaneously read from one memory bank while erasing, or programming to one other memory bank. Once the internally controlled Erase or Program cycle in a memory bank has commenced, a different memory bank can be accessed for read. Also, once WE# and CE# are high during the SDP load sequence, a different bank may be accessed to read. STK4131V w...

STK4132

64Mbit of Flash Memory Page Program (up to 256 Bytes) in 1.4ms (typical) Sector Erase (512Kbit) Bulk Erase (64Mbit) 2.7 to 3.6V Single Supply Voltage SPI Bus Compatible Serial Interface 50MHz Clock Rate (maximum) Electronic Signatures C JEDEC Standard Two-Byte Signature (2017h) C RES Instruction, One-Byte, Signature (16h), for backward compatibility More than 100000 Erase/Program Cycles pe...

STK4132 II TW

STK413-220

Vendor:STMPackage Cooled:DIP-42D/C:05+

Parameter Total Gate Charge (turn-on) Gate - Emitter Charge (turn-on) Gate - Collector Charge (turn-on) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Switching Loss Turn-Off Switching Loss Total Switching Loss Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Switching Loss Internal Emitter Inductance Input Capacitance Output Capacitance Reverse T...

STK4132II

Vendor:CHPackage Cooled:HYB-18D/C:9+

DECODER AND RECEIVE FILTER PCM data is shifted into the Decoders Receive PCM Regis- ter via the DR0 or DR1 pin during the selected time-slot on the 8 falling edges of BCLK. The Decoder consists of an ex- panding DAC with either A or µ255 law decoding character- istic, which is selected by the same control instruction used to select the Encode law during initialization. Following the Decoder is a...

STK4132II

Vendor:CHPackage Cooled:N/AD/C:9+

DECODER AND RECEIVE FILTER PCM data is shifted into the Decoders Receive PCM Regis- ter via the DR0 or DR1 pin during the selected time-slot on the 8 falling edges of BCLK. The Decoder consists of an ex- panding DAC with either A or µ255 law decoding character- istic, which is selected by the same control instruction used to select the Encode law during initialization. Following the Decoder is a...

STK4132T

Vendor:SKD/C:2

STK4133II

Vendor:SANYOPackage Cooled:HYBD/C:98+

The product identification mode identifies the device and manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external programmer to identify the correct programming algorithm for the Atmel product. In addition, users may wish to use the software product identification mode to identify the part (i.e., using the device code), and have t...

STK4133II

Vendor:SANYOPackage Cooled:n/aD/C:98+

The product identification mode identifies the device and manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external programmer to identify the correct programming algorithm for the Atmel product. In addition, users may wish to use the software product identification mode to identify the part (i.e., using the device code), and have t...

STK413-400

Vendor:SANYOPackage Cooled:HYBD/C:04+

4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with appendix E, table V of MIL-PRF-19500 and table I herein. Electrical measurements (end-points) and delta requirements shall be in accordance with the applicable steps of table II herein.

STK413-400

Vendor:SANYOPackage Cooled:HYBD/C:04+

4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with appendix E, table V of MIL-PRF-19500 and table I herein. Electrical measurements (end-points) and delta requirements shall be in accordance with the applicable steps of table II herein.

STK413-430

Vendor:1200

NOTES: (1) With a balanced differential signal, the positive input is 180 out-of-phase with the negative input, therefore, the actual voltage swing about the common- mode voltage on each pin is 1.55V to achieve a total input range of 3.1V or 6.2Vp-p. (2) The A/D converter oversamples the receive signal and outputs data words at twice the symbol rate; the A/D converter conversion rate is called the Output Wo...

STK413-430

Vendor:1200Package Cooled:HYB

NOTES: (1) With a balanced differential signal, the positive input is 180 out-of-phase with the negative input, therefore, the actual voltage swing about the common- mode voltage on each pin is 1.55V to achieve a total input range of 3.1V or 6.2Vp-p. (2) The A/D converter oversamples the receive signal and outputs data words at twice the symbol rate; the A/D converter conversion rate is called the Output Wo...

STK413-490

Vendor:SANYOPackage Cooled:HYB-22D/C:03+

Note 1: The MAX5075 is 100% tested at TA = TJ = +125C. All limits over temperature are guaranteed by design. Note 2: Use the following formula to calculate the MAX5075 oscillator frequency: fOSC = 1012/(32 x RRT). Note 3: The accuracy of the oscillators frequency is lower at frequencies greater than 1MHz.

STK4137MK2

Vendor:SONYPackage Cooled:06+D/C:800

For a 1.25V input, and a 22µH inductor, the resulting peak current is approximately 500mA. At time t2, the in- ductor begins to discharge with a minimum off time of 1.7µs. Under lightly loaded conditions, the amount of en- ergy delivered in this single pulse would satisfy the volt- age control loop, and the converter would not command any more energy pulses until the output again drops be- ...

STK4137MK2

Vendor:SONYPackage Cooled:3D/C:800

For a 1.25V input, and a 22µH inductor, the resulting peak current is approximately 500mA. At time t2, the in- ductor begins to discharge with a minimum off time of 1.7µs. Under lightly loaded conditions, the amount of en- ergy delivered in this single pulse would satisfy the volt- age control loop, and the converter would not command any more energy pulses until the output again drops be- ...

STK4140

Vendor:SANYOPackage Cooled:06+D/C:800

VBIAS (VCC, VBS1,2,3) = 15V unless otherwise specified. The VIN, VTH and IIN parameters are referenced to VSS and are applicable to all six channels (HS1,2,3 and LS1,2,3). The VO and IO parameters are referenced to COM and VS1,2,3 and are applicable to the respective output leads: HO1,2,3 and LO1,2,3.

STK4141II

Vendor:SANYOPackage Cooled:09+

The Hyundai HYM72V32756T8 Series are 32Mx72bits Synchronous DRAM Modules. The modules are composed of nine 32Mx8bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2K bit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. One 0.22uF and one 0.0022uF decoupling capacitors per each SDRAM are mounted on the PCB.

STK4141MK2

Vendor:SANYOPackage Cooled:SIP18

associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola andare registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/

STK4141V

Vendor:SANYO

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBS...

STK4141V

Vendor:600Package Cooled:HYB-18

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBS...

STK4142 II

STK4142II

Vendor:SANYOPackage Cooled:SIP-18

ODIS 14 OUTPUT DISABLE - asserting this Schmitt trigger input forces the complementary outputs to be immediately disabled (OUT1 and OUT2 are forced low). The complementary outputs will remain low as long as long as this input is asser- ted, and for the duration of the PWM cycle in which OUTPUT DISABLE goes from low to high; i.e., the complementary outputs are not re-enabled un...

STK4142MK2

Vendor:STKPackage Cooled:SIP18D/C:1998

Resistor Terminal A1 Wiper Terminal W1 Resistor Terminal B1 Positive power supply, specified for opera- tion from 2.2 V to 5.5 V. Active low, asynchronous connection of Wiper W to Terminal B, and open circuit of Terminal A. RDAC register contents unchanged. SHDN should tie to VDD if not used. Serial Clock Input Serial Data Input/Output Programmable address bit for multiple package decoding. Bits AD0...

STK4145

Vendor:SANYOPackage Cooled:20D/C:800

Each device includes a voltage regulator, quadratic Hall voltage generator, temperature stability circuit, signal amplifier, Schmitt trigger, and open-collector output on a single silicon chip. The on-board regula- tor permits operation with supply voltages of 4.5 to 24 V. The switch output can sink up to 25 mA. With suitable output pull up, they can be used directly with bipolar or MOS logic circuits.

STK4145

Vendor:SANYOPackage Cooled:06+D/C:module

Each device includes a voltage regulator, quadratic Hall voltage generator, temperature stability circuit, signal amplifier, Schmitt trigger, and open-collector output on a single silicon chip. The on-board regula- tor permits operation with supply voltages of 4.5 to 24 V. The switch output can sink up to 25 mA. With suitable output pull up, they can be used directly with bipolar or MOS logic circuits.

STK4145MK2

Vendor:SANYOPackage Cooled:HYB

When using the internal demodulator, the oscillator frequency (or external clock) must be 160kHz. The CLKOUT signal can be programmed to be either a 38.4kHz signal created by fractionally dividing the oscillator clock, or a 40kHz signal creating by dividing the oscillator clock by 4.

STK4145MK5

Vendor:SANYOPackage Cooled:SIPD/C:2001

The Hynix HYM76V8635HGT8 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 64Mbytes memory. The Hyundai HYM76V8635HGT8 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

STK4148

Vendor:SANYOPackage Cooled:SIP18

STK4150

Vendor:SANYOPackage Cooled:DIPD/C:800

Stanford Microdevices STK4150 is a high performance Gallium Arsenide Hetrojunction Bipolar Transistor MMIC Amplifier. A Darlington configuration is utilized for broadband perfor- mance up to 3 GHz. The heterojunction increases break- down voltage and minimizes leakage current between junctions. Cancellation of emitter junction non-linearities results in higher suppression of intermodulation products. ...

STK4150MK2

Vendor:850

1. Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under rec- ommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

STK4151 II T

Vendor:SANYO

STK4151II

Vendor:SANYO

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. † Currents are...

STK4151II

Vendor:SANYO

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. † Currents are...

STK4151MK2

Vendor:N/APackage Cooled:SIP18D/C:1996

The LMV101/102/105/110 fixed-gain amplifier family inte- grates a rail-to-rail op amp, two internal gain-setting resistors and a V+/2 bias circuit into one ultra tiny package, SC70-5 or SOT23-5. Fixed inverting gains of −1, −2, −5, and −10 are available.

STK4151MK2

Vendor:N/APackage Cooled:SIPD/C:1996

The LMV101/102/105/110 fixed-gain amplifier family inte- grates a rail-to-rail op amp, two internal gain-setting resistors and a V+/2 bias circuit into one ultra tiny package, SC70-5 or SOT23-5. Fixed inverting gains of −1, −2, −5, and −10 are available.

STK4151V

Vendor:SANYO

The bq2400x series ICs are advanced Li-Ion linear charge management devices for highly integrated and space-limited applications. They combine high- accuracy current and voltage regulation; FET pass- transistor and reverse-blocking Schottky; battery conditioning, temperature, or input-power monitoring; charge termination; charge-status indication; and charge timer in a small package.

STK4152-2

STK4152II

Vendor:300

The XRT59L91 is an optimized single-chip analog 3.3V E1 line interface unit (LIU) fabricated using low power CMOS technology. The LIU IC consists of both a Transmitter and a Receiver function. The Transmitter accepts a TTL or CMOS level signal from the Terminal Equipment; and outputs this data to the line via bipolar pulses that are compliant to the ITU-T G.703 pulse template for E1. The Receiver acc...

STK4154MK2

Vendor:SKPackage Cooled:SIPD/C:4

The Fairchild Switch FST34170 is a 17-bit to 34-bit high- speed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propaga- tion delay or generating additional ground bounce noise.

STK4154MK2

Vendor:SKD/C:4

The Fairchild Switch FST34170 is a 17-bit to 34-bit high- speed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propaga- tion delay or generating additional ground bounce noise.

STK4154MK5

Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to conditions beyond the operational limits for extended periods of time may affect device reliability.

STK4157MK2

DESCRIPTION HCF4020B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. HCF4020B is a ripple carry binary counter. All counter stages are master-slave flip-flops. The state of a counter advances one count on the

STK4157MK2

DESCRIPTION HCF4020B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. HCF4020B is a ripple carry binary counter. All counter stages are master-slave flip-flops. The state of a counter advances one count on the

STK416

Vendor:SANYOPackage Cooled:SIP

STK4161II

Vendor:SANYOPackage Cooled:N/AD/C:9+

The SLIC employs a feedback circuit to supply a constant feed current to the line. This is done by sensing the sum of the voltages across the feed resistors, R1 and R2, and comparing it to the input reference voltage, Vref, that determines the constant current feed current.

STK4162

The AH25Z-2Z die type has been found to have all pins able to withstand a transient pulse of 600V, per Mil-Std-883 Method 3015 (reference attached ESD Test Circuit). Latch-Up testing has shown that this device withstands a current of 250mA and/or 20V.

STK4162II

Vendor:300

The HYM72V64C756T8 H-Series are high speed 3.3-Volt synchronous dynamic RAM Modules composed of eighteen 32Mx8 bit Synchronous DRAMs in 54-pin TSOPII, two 48-pin SOP Register Buffers, one 24-pin SOP PLL and 8-pin TSSOP 2K bit EEPROM on a 168-pin glass-epoxy printed circuit board. One 0.22µF and one 0.0022µF decoupling capacitors per each SDRAM are mounted on the module.

STK4162II

Vendor:300

The HYM72V64C756T8 H-Series are high speed 3.3-Volt synchronous dynamic RAM Modules composed of eighteen 32Mx8 bit Synchronous DRAMs in 54-pin TSOPII, two 48-pin SOP Register Buffers, one 24-pin SOP PLL and 8-pin TSSOP 2K bit EEPROM on a 168-pin glass-epoxy printed circuit board. One 0.22µF and one 0.0022µF decoupling capacitors per each SDRAM are mounted on the module.

STK4164

Vendor:SANYOPackage Cooled:模块D/C:2

The output pull-up structure can be globally configured to be either a TTL-like totem-pole (n-channel pull-up transis- tor, pulling to a voltage one threshold below Vcc, just like XC4000) or to be CMOS (p-channel pull-up transistor pulling to Vcc). Also, the configurable pull-up resistor in XC4000E is a p-channel transistor that pulls to Vcc, whereas in XC4000 it is an n-channel transistor that pulls ...

STK4164

Vendor:SANYOD/C:2

The output pull-up structure can be globally configured to be either a TTL-like totem-pole (n-channel pull-up transis- tor, pulling to a voltage one threshold below Vcc, just like XC4000) or to be CMOS (p-channel pull-up transistor pulling to Vcc). Also, the configurable pull-up resistor in XC4000E is a p-channel transistor that pulls to Vcc, whereas in XC4000 it is an n-channel transistor that pulls ...

STK4164II

Vendor:SANYOPackage Cooled:HYBD/C:00+

3. Load regulation and output voltage are measured at a constant junction temperature by low duty cycle pulse testing. Changes in output voltage due to thermal gradients or temperature changes must be taken into account separately. 4. Specifications apply for an external Kelvin sense connection at a point on the output pin 1/4 from the bottom of the package. 5. Dropout voltage is a measurement of the mini...

STK4165

Vendor:SANYOPackage Cooled:20D/C:800

External clock option: The receiver can accept an external clock on the DSR# input. The transmitter can accept a 1x clock on the RI# input and/or assert its own (Nx) clock on the DTR# output. In 1x mode, asynchronous data may be transmitted and received at speeds up to 60 Mbps (see section 14.6).

STK417-090

D/C:08+/09+

Problems relating to playback of sound on audio sys- tems. With naturally-generated sound, high-frequency har- monic components generally occur first, followed by the fundamental frequency components. This also applies to the attack section of the sound that characterizes many musical instruments. It is the amplitude component that gives form to the frequency component and envelope at the rising poi...

STK4170MK2

Vendor:1200

The bq2083−V1P2 supports the Smart Battery Data (SBData) commands and charge-control functions. It communicates data using the System Management Bus (SMBus) 2-wire protocol. The data available include the batterys remaining capacity, temperature, voltage, current, and remaining run-time predictions. The bq2083−V1P2 provides LED drivers and a push-button input to depict remaining battery c...

STK4171 V TW

STK417-100

Vendor:SANYOD/C:08+/09+

Glueless interface to an external 10BASE-T transceiver for 10/100/1000BASE-T applications Digital Signal Processor (DSP) based system, including digital adaptive equalizers, echo and crosstalk cancellers, encoders and decoders Link quality monitor Advanced power management Automatic detection and correction of pair swaps, pair skew, and pair polarity Automatic MDI crossover Auto-negotiation with next page...

STK417-120

Vendor:STKPackage Cooled:SIP

This N-Channel IGBT is a MOS gated, logic level device which is intended to be used as an ignition coil driver in automotive ignition circuits. Unique features include an active voltage clamp between the collector and the gate which provides Self Clamped Inductive Switching (SCIS) capability in ignition circuits. Internal diodes pro- vide ESD protection for the logic level gate. Both a series resistor and a s...

STK417-120A

Vendor:1600Package Cooled:HYB

Temperature Error Using Remote Diode of 0.13 micron Pentium 4 with typical non-ideality of 1.0021 and series R= 3.64Ω. For other processors email hardware.monitor.team@nsc.com to obtain the latest data. (TD is the Remote Diode Junction Temperature)

STK417-120A

Vendor:1600

Temperature Error Using Remote Diode of 0.13 micron Pentium 4 with typical non-ideality of 1.0021 and series R= 3.64Ω. For other processors email hardware.monitor.team@nsc.com to obtain the latest data. (TD is the Remote Diode Junction Temperature)

STK417-130

D/C:08+/09+

The Programmable Interconnect Matrix (PIM) connects the two logic blocks on the CY7C371 to the inputs and to each other. All inputs (including feedbacks) travel through the PIM. There is no speed penalty incurred by signals traversing the PIM.

STK417-130

D/C:08+/09+

The Programmable Interconnect Matrix (PIM) connects the two logic blocks on the CY7C371 to the inputs and to each other. All inputs (including feedbacks) travel through the PIM. There is no speed penalty incurred by signals traversing the PIM.

STK4171II

Vendor:SANYOPackage Cooled:N/AD/C:9+

The information herein is given to describe certain components and shall not be considered as warranted char- acteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer.

STK4171II

Vendor:SANYOPackage Cooled:N/AD/C:9+

The information herein is given to describe certain components and shall not be considered as warranted char- acteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer.

STK4171MK2

These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Winbond customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Winbond for any damages resulting from such improper use or sales.

STK4171V

Vendor:SANYOPackage Cooled:N/AD/C:9+

The new generation CoolSET™-F3 provides Active Burst Mode to reach the lowest Standby Power Requirements <100mW at no load. As the controller is always active during Active Burst Mode, there is an immediate response on load jumps without any black out in the SMPS. In Active Burst Mode the ripple of the output voltage can be reduced <1%. Furthermore, to increase the robustness and safety of...

STK4171X

Vendor:SANYOPackage Cooled:N/AD/C:9+

Carry Lookahead Each Function Block provides a carry lookahead genera- tor capable of anticipating the carry across all nine Mac- rocells. The carry lookahead generator reduces the ripple-carry delay of wide arithmetic functions such as add, subtract, and magnitude compare to that of the first nine bits, plus the carry lookahead delay of the higher- order Function Blocks.

STK4172

As VCE is further increased, beyond the thermally limited region, the safe output current decreases more rapidly. This so-called second breakdown region is a characteristic of bipolar output transistors. It is caused by the tendency of bipolar transistors to produce hot spotspoints on the transistor where current flow concentrates at high VCE. Exceeding the safe output current in the second breakdown re...

STK4172

As VCE is further increased, beyond the thermally limited region, the safe output current decreases more rapidly. This so-called second breakdown region is a characteristic of bipolar output transistors. It is caused by the tendency of bipolar transistors to produce hot spotspoints on the transistor where current flow concentrates at high VCE. Exceeding the safe output current in the second breakdown re...

STK4172II

Vendor:1600

BlueCore4-ROM Plug-n-Go has been designed to reduce the number of external components required which ensures production costs are minimised. The 0.8mm pitch BlueCore4-ROM Plug-n-Go can be used on either two or four layer PCB construction.

STK4172MK2

Vendor:SANYOPackage Cooled:SIP18

CAUTIONS REGARDING NOISE: Be aware that when voltage is applied suddenly between the optocoupler's input and outout or between collector-emitters at startup, the output side may enter the on state, even if the voltage is within the absolute maximum ratings.

STK4174

Vendor:SANYOPackage Cooled:06+D/C:800