UPC2909T-E1

Vendor:NECPackage Cooled:TO-252D/C:99+

Leads are Readily Solderable Lead and Mounting Surface Temperature for Soldering Purposes: 260C Max. for 10 Seconds Shipped in 12 mm Tape and Reel, 5000 units per reel Polarity: Polarity Band Indicates Cathode Lead ESD Protection: Human Body Model > 4000 V (Class 3) ESD Protection: Machine Model > 400 V (Class C) Marking: U4F, U4G

UPC2910T

Vendor:NECD/C:08+

UPC2910T

Vendor:NECPackage Cooled:SOT-252D/C:08+

UPC2910T-E1

Vendor:NECPackage Cooled:TO252D/C:04+

4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable fail...

UPC2912-E1

Vendor:NECPackage Cooled:SOT-252D/C:05+

The variable product-term distribution on this device removes rigid limitation to a maximum of eight product terms per output. This technique allocates from 8 to 16 logical product terms to each output for an average of 12 product terms per output. The variable allocation of product terms allows for far more complex functions to be implemented in this device than in previously available devices.

UPC2912HF

Vendor:NECPackage Cooled:TO-220FD/C:00+

An on-chip RF oscillator is provided to reduce laser mode hopping noise during read mode. Swing can be set independently for the two selectable outputs with two different resistors. Oscillation is enabled by a high signal at the ENOSC pin. Complete output current and oscillator switch-off is achieved by a low signal at the ENABLE input.

UPC2912T-E1

Vendor:NECPackage Cooled:SOT-252D/C:05+

Read cycles are initiated with ADSP(or ADSC) using the new external address clocked into the on-chip address register when both GW and BW are high or when BW is low and WEa, WEb, WEc, and WEd are high. When ADSP is sampled low, the chip selects are sampled active, and the output buffer is enabled with OE. the data of cell array accessed by the current address are projected to the output pins.

UPC2918

Vendor:NECPackage Cooled:TO-252D/C:2001

UPC2918T-E1-AZ

Vendor:NECPackage Cooled:SOT252D/C:2004

The UPC2918T-E1-AZ contains a silicone dielectric gel which covers the silicon piezoresistive sensing element. The gel is a nontoxic, nonallergenic elastomer system which meets all USP XX Biological Testing Class V requirements. The properties of the gel allow it to transmit pressure uni- formly to the diaphragm surface, while isolating the internal electrical connections from the corrosive effects of ...

UPC2925

Vendor:NECPackage Cooled:TO-252

Output Stages Operate Antiphase Reducing Input and Output Capacitance Requirements and Power Supply Induced Noise Dual Input Supply Capability for Load Sharing 5-Bit Mobile VID Code: VOUT = 0.6V to 1.75V 1% Output Voltage Accuracy True Remote Sensing Differential Amplifier Power Good Output Voltage Monitor Supports Active Voltage Positioning Current Mode Control Ensures Current Sharing OPTI-LOOPTM Compen...

UPC2925

Vendor:NECPackage Cooled:TO-252

Output Stages Operate Antiphase Reducing Input and Output Capacitance Requirements and Power Supply Induced Noise Dual Input Supply Capability for Load Sharing 5-Bit Mobile VID Code: VOUT = 0.6V to 1.75V 1% Output Voltage Accuracy True Remote Sensing Differential Amplifier Power Good Output Voltage Monitor Supports Active Voltage Positioning Current Mode Control Ensures Current Sharing OPTI-LOOPTM Compen...

UPC2925-E1

This notice outlines changes made to the first and second printings of the Advance Information MC145474/75 data sheet. Changes incorporated into this revision reflect enhancements made to the MC145474/75 ISDN S/T Transceiver as well as additional information gathered to keep up with recent standards and to ensure Motorolas commitment to Total Customer Satisfaction.

UPC2925T

Vendor:NECPackage Cooled:N/AD/C:01+

4 DIFFERENTIAL OUTPUT CHANNELS 2 SETS OF 4 DIFFERENTIAL INPUTS 90MHz BANDWIDTH UP TO 3.5VPP OUTPUT GAIN OF 190V/V (No External Load) LOW 0.65nV/Hz INPUT NOISE VOLTAGE 50mA QUIESCENT CURRENT (5V Supply) LOW CROSSTALK, TQFP-48 PACKAGING TTL/CMOS CHANNEL SELECT LINE

UPC2925T

Vendor:NECPackage Cooled:TO252D/C:01+

4 DIFFERENTIAL OUTPUT CHANNELS 2 SETS OF 4 DIFFERENTIAL INPUTS 90MHz BANDWIDTH UP TO 3.5VPP OUTPUT GAIN OF 190V/V (No External Load) LOW 0.65nV/Hz INPUT NOISE VOLTAGE 50mA QUIESCENT CURRENT (5V Supply) LOW CROSSTALK, TQFP-48 PACKAGING TTL/CMOS CHANNEL SELECT LINE

UPC2925T-E2-AZ

Vendor:NECPackage Cooled:TO252D/C:2005

2.9V to 14V input voltage range 400kHz oscillator frequency PWM current mode control 2Ω output drivers 100% maximum duty cycle 0.5µA micro-power shutdown Programmable UVLO Front edge blanking Cycle-by-cycle current limiting Frequency foldback short circuit protection 8-lead SOIC package

UPC2926T-1-E1

UPC2926X

Vendor:NEC Package Cooled:TO-252 D/C:09+

With a 1.0 V internal reference. Measured at fIN = 2.4 MHz, full-scale sine wave, with approximately 5 pF loading on each output bit. 3Input capacitance refers to the effective capacitance between one differential input pin and AGND. Refer to Figure 5 for the equivalent analog input structure. 4Measured at AC Specifications conditions without output drivers. 5Measured with a dc input, CLK pin inactive (i...

UPC2933A

Vendor:NECPackage Cooled:SOT-252D/C:08+

TVS devices are not typically used for dc power dissipation and are instead operated < VWM (rated standoff voltage) except for transients that briefly drive the device into avalanche breakdown (VBR to VC region) of the TVS element. Also see Figures 3 and 4 for further protection details in rated peak pulse power for unidirectional and bidirectional configurations respectively.

UPC2933AT-E1

Vendor:NECPackage Cooled:SOT252D/C:2002+

The beginning of a block of 16 serial data at port A or B is determined by RA and RB, respectively. The end of the serial input data block at port C is controlled by WT. Since RA, RB and WT can be independently chosen (except for small forbidden time windows when memory transfers are executed), the serial data streams can be shifted against each other without influencing the RE cycles.

UPC2933AT-EI

Vendor:1000

UPC2933AT-EI

Vendor:1000

UPC2933BT-E2

current requirement makes the usage of MAS9162 easier and low in cost. Also the minimum output capacitance requirement is very low. This combined with very short start-up time makes it possible to switch the regulator off and on even in timing critical and/or noise sensitive applications. An internal thermal protection circuit prevents the device from overheating. Also the maximum output current is ...

UPC2933HF

Vendor:NECPackage Cooled:TO-220D/C:06+

The PGA is digitally controlled with 10-bit resolution on a dB scale, resulting in a gain range of 6dB to 36dB with 0.047dB per LSB of the gain code. The PGA can be programmed to switch gain every pixel, in a user defined pattern of up to 4 different gains. Our propri- etary control logic allows a camera system to set the

UPC2933HF

Vendor:NECPackage Cooled:TO-220D/C:06+

The PGA is digitally controlled with 10-bit resolution on a dB scale, resulting in a gain range of 6dB to 36dB with 0.047dB per LSB of the gain code. The PGA can be programmed to switch gain every pixel, in a user defined pattern of up to 4 different gains. Our propri- etary control logic allows a camera system to set the

UPC2933TE1

Vendor:necPackage Cooled:necD/C:dc99

The power dissipation of the SCC59 is a function of the pad size. This can vary from the minimum pad size for sol- dering to the pad size given for maximum power dissipa- tion. Power dissipation for a surface mount device is deter- mined by TJ(max), the maximum rated junction temperature of the die, RqJA, the thermal resistance from the device junction to ambient; and the operating temperature, TA. Us- ...

UPC2933T-E2

Vendor:NECPackage Cooled:N/AD/C:2001

The MSK 610 employs a circuit topology known as "feed forward". This inverting configuration allows the user to real- ize the excellent D.C. input characteristics of a differential am- plifier without losing system bandwidth. The incoming signal is split at the input into its A.C. and D.C. component. The D.C. component is allowed to run through the differential amplifier where any common mode...

UPC2933T-T2

Vendor:NECPackage Cooled:99+D/C:99+

UPC294A

Vendor:NECPackage Cooled:CAN

− Provides low speed control functions − 30 Mhz execution speed at 4 cycles per instruction average − 12K Bytes of internal SRAM for general purpose scratchpad − 768 Bytes of internal SRAM for general purpose scratchpad or program execution while re-flashing external ROM

UPC294A

Vendor:NEC

− Provides low speed control functions − 30 Mhz execution speed at 4 cycles per instruction average − 12K Bytes of internal SRAM for general purpose scratchpad − 768 Bytes of internal SRAM for general purpose scratchpad or program execution while re-flashing external ROM

UPC2951

Vendor:NECPackage Cooled:SOP-8PD/C:1998

The bq29312A is a 2-, 3-, or 4-cell lithium-ion battery pack protection analog front end (AFE) IC that incorporates a 3.3-V, 25-mA low-dropout regulator (LDO). The bq29312A also integrates an I2C compat- ible interface to extract battery parameters such as cell voltages and control output status. Other par- ameters such as current protection thresholds and delays can be programmed into the bq29312A t...

UPC29C2

Vendor:NECPackage Cooled:07+D/C:2007

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity, which produces very low undershoot and overshoot characteristics.

UPC29C2

Vendor:NECPackage Cooled:07+D/C:2007

The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications. This family ensures a very low static and dynamic power consumption across the entire VCC range of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity, which produces very low undershoot and overshoot characteristics.

UPC29L03T

Vendor:NECPackage Cooled:SOT-89D/C:08+

Notes: 2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required. 3. Inputs have pull-up/pull-down resistors that effect input current. 4. The VCMR is the difference from the most positive side of the differential input signal. Normal operation is obtained when the High input is within the VCMR range and the input lies wit...

UPC29L03T

Vendor:NECPackage Cooled:SOT-89D/C:08+

Notes: 2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required. 3. Inputs have pull-up/pull-down resistors that effect input current. 4. The VCMR is the difference from the most positive side of the differential input signal. Normal operation is obtained when the High input is within the VCMR range and the input lies wit...

UPC29L03T-E1 / 9Q

UPC29L03T-E1/9Q

Vendor:NECD/C:08+

† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage ...

UPC29L04

Vendor:NECPackage Cooled:TO-92D/C:03+

Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to this device. These are stress ratings only. Functional operation of this device at these or any other conditions above those indicated in the operational sections of these specification is not implied or intended. Exposure to the absolute maximum rating conditions for extended periods may affect device reliab...

UPC29L04T

Vendor:NECPackage Cooled:SOT-89D/C:08+

ones and six zeros switching at the input clock rate. The transmission of SYNC patterns enables the deserializer to lock to the serializer signal within a deterministic time frame. This transmission of SYNC patterns is selected via the SYNC1 and SYNC2 inputs on the serializer. Upon receiving valid SYNC1 or SYNC2 pulse (wider than 6 clock cycles), 1026 cycles of SYNC pattern are sent.

UPC29L04T

Vendor:NECPackage Cooled:SOT-89D/C:08+

ones and six zeros switching at the input clock rate. The transmission of SYNC patterns enables the deserializer to lock to the serializer signal within a deterministic time frame. This transmission of SYNC patterns is selected via the SYNC1 and SYNC2 inputs on the serializer. Upon receiving valid SYNC1 or SYNC2 pulse (wider than 6 clock cycles), 1026 cycles of SYNC pattern are sent.

UPC29L04T/9S

Vendor:NECPackage Cooled:SOT-89D/C:08+

3-phase rectifier bridge 3-phase short circuit rated, ultrafast IGBT inverter Low inductance (current sense) shunts in positive and negative DC rail NTC temperature sensor Pin-to-base plate isolation 2500V rms Easy-to-mount two-screw package Case temperature range -25C to 125C operational

UPC29L04T-E1

Vendor:NECPackage Cooled:SOT89D/C:03+

The serial 8-bit row address SAR and the 8-bit column address/mode code SAC are serially shifted into the TV-SAM (LSB first) at rising edge of the address clock SCAD. After 8 SCAD cycles, the falling edge of RE internally latches SAR and SAC. The column address itself needs only 6 bits. The last 2 bits of SAC are defined as mode bits and determine the read/write and refresh operation of the memory arra...

UPC29L04T-E1

Vendor:NECPackage Cooled:SOT-89D/C:03+

The serial 8-bit row address SAR and the 8-bit column address/mode code SAC are serially shifted into the TV-SAM (LSB first) at rising edge of the address clock SCAD. After 8 SCAD cycles, the falling edge of RE internally latches SAR and SAC. The column address itself needs only 6 bits. The last 2 bits of SAC are defined as mode bits and determine the read/write and refresh operation of the memory arra...

UPC29L05T / 9T

UPC29L05T/9T

Vendor:NECPackage Cooled:SOT-89D/C:08+

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.04 /Jan.99Hyundai Semiconductor

UPC29L33

Vendor:NECPackage Cooled:TO-92D/C:04+

The TLV320AIC26 is a high-performance audio codec with 16/20/24/32-bit 97-dBA stereo playback, mono record functionality at up to 48 ksps. A microphone input includes built-in preamp and hardware automatic gain control, with single-ended or fully-differential input capability.

UPC29L33/9R

Vendor:NECPackage Cooled:SOT-89D/C:08+

Reset (Schmitt trigger input) - This input (active LOW) puts the UPC29L33/9RB in its reset state. To guarantee proper operation, the device must be reset after power-up. The time constant for a power-up reset circuit (see Figures 9-13) must be a minimum of five times the rise time of the power supply. In normal operation, the RST pin must be held low for a minimum of 60 nsec to reset the device.

UPC29L33T-E1 /BC

UPC29M03HF

Vendor:NECPackage Cooled:N/A

The high-bandwidth digital content protection system (HDCP) is an industry standard for protecting DVI outputs from being copied. HDCP was developed by Intel Corporation and is licensed by the Digital Content Protection, LLC. The TFP513 is compliant to the HDCP Revision 1.0 specification.

UPC29M03T-E1

Vendor:NECPackage Cooled:TO252D/C:2001

Hynix HYMD232M646A(L)F8-J/M/K/H/L series is designed for high speed of up to 166MHz and offers fully synchro- nous operations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internall...

UPC29M05AT

Vendor:NECPackage Cooled:SOT-252D/C:08+

Eight GLBs, 16 I/O cells, two dedicated inputs (one dedicated input in Megablock B and E) and one ORP are connected together to make a Megablock (see figure 1). The outputs of the eight GLBs are connected to a set of 16 universal I/O cells by the ORP. The ispLSI 1048 device contains six of these Megablocks.

UPC29M05AT

Vendor:NECPackage Cooled:SOT-252D/C:08+

Eight GLBs, 16 I/O cells, two dedicated inputs (one dedicated input in Megablock B and E) and one ORP are connected together to make a Megablock (see figure 1). The outputs of the eight GLBs are connected to a set of 16 universal I/O cells by the ORP. The ispLSI 1048 device contains six of these Megablocks.

UPC29M05AT-E1

Vendor:NECPackage Cooled:SOT-252D/C:08+

The equivalent circuit for all digital inputs low is seen in Figure 1. With all digital inputs low, the entire reference current, Iref, is switched to OUT2. The current source 1/256 represents the constant current flowing through the termination resistor of the R-2R ladder, while the current source IIkg represents leakage currents to the substrate. The capacitances appearing at OUT1 and OUT2 are dependent...

UPC29M05AT-E1

Vendor:NECPackage Cooled:SOT-252D/C:08+

The equivalent circuit for all digital inputs low is seen in Figure 1. With all digital inputs low, the entire reference current, Iref, is switched to OUT2. The current source 1/256 represents the constant current flowing through the termination resistor of the R-2R ladder, while the current source IIkg represents leakage currents to the substrate. The capacitances appearing at OUT1 and OUT2 are dependent...

UPC29M05AT-E2

Vendor:NECPackage Cooled:SOT252D/C:0349+

The PAL/NTSC pin determines the default values for the DVE control registers. The default register values have been chosen so that standard PAL or NTSC video will appear at the DAC outputs immediately when a valid input digital video data stream is present and Vmute is Low at reset. The Vmute pin controls the "out of reset" operation of the Analog output signals. When "1" at reset, the ...

UPC29M05AT-E2

Vendor:NECPackage Cooled:SOT252D/C:0349+

The PAL/NTSC pin determines the default values for the DVE control registers. The default register values have been chosen so that standard PAL or NTSC video will appear at the DAC outputs immediately when a valid input digital video data stream is present and Vmute is Low at reset. The Vmute pin controls the "out of reset" operation of the Analog output signals. When "1" at reset, the ...

UPC29M05HB

Vendor:NECPackage Cooled:TO-251D/C:01+

The HT814D0 has a built-in RC oscillator which requires only one external resistor for normal applications. The oscillator frequency is typically 96kHz for an external resistor of 530kW. The required oscillator frequency may vary with different sampling rates in the process of voice programming. As a result, the values of the oscillator resistor may be different for different items.

UPC29M05HF

Vendor:NECPackage Cooled:TO220F

Function External I/O for Timer/Counter 2 EX Timer/Counter 2 Capture/Reload Trigger Serial Port 1 Input Serial Port 1 Output External Interrupt 2 (Positive Edge Detect) External Interrupt 3 (Negative Edge Detect) External Interrupt 4 (Positive Edge Detect) External Interrupt 5 (Negative Edge Detect)

UPC29M05T-T1

Vendor:NECPackage Cooled:TO252D/C:01+

The TPS752xxQ or the TPS754xxQ are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS752xxQ and the TPS754xxQ families are available in 20 pin TSSOP (PWP) packages.

UPC29M05T-T1

Vendor:TO252Package Cooled:754D/C:NEC

The TPS752xxQ or the TPS754xxQ are offered in 1.5-V, 1.8-V, 2.5-V, and 3.3-V fixed-voltage versions and in an adjustable version (programmable over the range of 1.5 V to 5 V). Output voltage tolerance is specified as a maximum of 2% over line, load, and temperature ranges. The TPS752xxQ and the TPS754xxQ families are available in 20 pin TSSOP (PWP) packages.

UPC29M08T

Vendor:NECPackage Cooled:SOT-252D/C:05+

Port 1, I/O. Port 1 functions as both an 8-bit, bidirectional I/O port and an alternate functional interface for Timer 2 I/O, new External Interrupts, and new Serial Port 1. The reset condition of Port 1 is with all bits at logic 1. In this state, a weak pullup holds the port high. This condition also serves as an input mode, since any external circuit that writes to the port will overcome the weak pullu...

UPC29M09HF

The CS4271s wide dynamic range, negligible distor- tion, and low noise make it ideal for applications such as A/V receivers, DVD-R, CD-R, digital mixing consoles, effects processors, set-top box systems, and automo- tive audio systems.

UPC29M09T-E2

Vendor:TO252Package Cooled:TO252D/C:NEC

A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or a high- impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

UPC29M10HF

Vendor:NECPackage Cooled:TO220F

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

UPC29M10T

Vendor:NECPackage Cooled:SOT-252D/C:08+

The high CMR capability of the HCPL-7510 isolation amplifier provides the precision and stability needed to accurately monitor motor current in high noise motor control environ- ments, providing for smoother control (less torque ripple) in various types of motor control applications.

UPC29M10T-E1

Vendor:NECPackage Cooled:TO253D/C:97

The UPC29M10T-E1 supports dual channel, Ultra320 (Fast-160) SCSI functionality and is pin compatible with QLogics ISP12160A dual SCSI processor. The product is a single-chip, highly integrated bus master, dual-channel SCSI I/O processor for SCSI initiator and target

UPC29M12HF B

UPC29M12HF C

UPC29M33AT

Vendor:NECPackage Cooled:SOT-252D/C:05+

• HIGH PERFORMANCE E2CMOS® TECHNOLOGY fmax = 165 MHz Maximum Operating Frequency tpd = 6.0 ns Propagation Delay TTL/3.3V/2.5V Compatible Input Thresholds and Output Levels Electrically Erasable and Reprogrammable Non-Volatile Programmable Speed/Power Logic Path Optimization

UPC29M33AT-E1

Vendor:N/APackage Cooled:02D/C:04+

The Xilinx FZP CPLDs utilize the patented XPLA (eXtended Programmable Logic Array) architecture. The XPLA architecture combines the best features of both PLA and PAL type structures to deliver high-speed and flexible logic allocation that results in superior ability to make design changes with fixed pinouts. The XPLA structure in each logic block provides a fast 7.5 ns PAL path with five dedicated pr...

UPC29M33AT-E2

Vendor:NECPackage Cooled:O532D/C:2000

A 75 Ω termination resistor with short traces should be attached between Y and ground for optimum performance. In normal operating modes other than SCART, this pin outputs the luma video signal. In SCART mode, this pin outputs the red signal.

UPC29M33HF

Vendor:NECPackage Cooled:TO-220FD/C:01+

ADC data outputs are internally connected directly to the receivers digital downconverter (DDC) input matrix, simplify- ing layout and reducing interconnection parasitics. Overrange bits are provided for each ADC channel to alert the user to ADC clipping. Level indicator bits are also provided for each DDC input port that can be used for external digital VGA control.

UPC29M33T-E1

Vendor:50000Package Cooled:TO-252

System oriented features for mobile, graphics and large memory systems include power management, byte masking, and x18 organization. The two data bits in the x18 organiza- tion are general and can be used for additional storage and bandwidth or for error correction.

UPC29M33T-E1/29M33

UPC29M33T-T1

Vendor:NECD/C:0044+

NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2...

UPC29S10GR-E2

Vendor:NECPackage Cooled:1200

The ISP2200 FPM supports the following: s Support for one Fibre Channel port s 200 Mbytes/sec sustained, full-duplex data transfer rate s 10-bit interface to external transceivers s Gigabit serial interface s Integrated frame buffer that supports up to 2112-byte frame payload

UPC29S78GR-E2

Vendor:NSECD/C:00

A common method of measuring temperature is to exploit the negative temperature coefficient of a diode, or the base-emitter voltage of a transistor, operated at constant current. Unfortu- nately, this technique requires calibration to null out the effect of the absolute value of VBE, which varies from device to device.

UPC3001

Vendor:NECPackage Cooled:SIPD/C:05+

READ clock input with pull-high resistor. Data in the RAM of the HT1625 are clocked out on the falling edge of the RD signal. The clocked out data will ap- pear on the data line. The host controller can use the next rising edge to latch the clocked out data.

UPC301AC

Vendor:NECPackage Cooled:200D/C:99

The 20ETF.. FP soft recovery QUIETIR rectifier series has been optimized for combined short reverse recovery time and low forward voltage drop. The glass passivation ensures stable reliable operation in the most severe temperature and power cycling conditions.

UPC301C

Vendor:NECPackage Cooled:06+D/C:524

2.4V to 5.5V Single-Supply Operation Adjustable Gain or Fixed-Gain Options High PSRR (86dB at 1kHz) High CMRR (70dB at 1kHz) Low Input-Referred Noise Integrated Microphone Bias 750µA Supply Current 0.3µA Shutdown Current 4kV ESD Protection (AUX_IN) Rail-to-Rail® Outputs THD+N: 0.04% at 1kHz Available in Space-Saving Packages 8-Pin Thin QFN (MAX4060/MAX4061) 8-Pin µMAX (MAX4060/M...

UPC305C

Vendor:NECPackage Cooled:DIPD/C:00+

NOTES: 1. Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input ne...

UPC305G

Package Cooled:SOP

The tuning range of the AGC is subdivided into 256 regulator steps. The settling time for the full tuning range requires 320 periods (192 + (2 64) periods) during a preamble phase. To accelerate the settling time, fast gain control mode can be activated via the serial interface. In this mode, the tuning range is subdivided into 128 steps and the set- tling time is two times faster.

UPC305G2

Vendor:NECPackage Cooled:SOP-8PD/C:1998

Internal cold-junction compensation largely corrects errors arising from parasitic thermocouples formed by thermocouple connection to the input screw terminals, providing an accuracy of +0.5oC over the +5oC to +45oC ambient temperature range. The module generates a predictable upscale signal to indicate an open thermocouple; for a downscale response, connect a 47 MΩ, 0.25 Watt resistor across scre...

UPC305G2

Vendor:NECPackage Cooled:SOP-8PD/C:1998

Internal cold-junction compensation largely corrects errors arising from parasitic thermocouples formed by thermocouple connection to the input screw terminals, providing an accuracy of +0.5oC over the +5oC to +45oC ambient temperature range. The module generates a predictable upscale signal to indicate an open thermocouple; for a downscale response, connect a 47 MΩ, 0.25 Watt resistor across scre...

UPC305G2-E1

Vendor:NECPackage Cooled:SOP8D/C:96

The 20 outputs from the GLB can drive both the Big Fast Megablock Routing Pool within the Big Fast Megablock and the Global Routing Plane between the Big Fast Megablocks. The Big Fast Megablock Routing Pool con- tains general purpose tracks which interconnect the six GLBs within the Big Fast Megablock and dedicated tracks for the signals from the Big Fast Megablock I/O cells. The Global Routing Plane...

UPC30C

Notes: The gain for the unmatched device in 50 ohm system is shown as the trace in black color. For a tuned circuit for a particular frequency, it is expected that actual gain will be higher, up to the maximum stable gain. The maximum stable gain is shown in the dashed red line. The impedance loss plots are shown from 0.05 C 5.05 GHz, with markers placed in 0.5 GHz increments.

UPC311

How to Minimize Aperture Induced Errors As we have seen in the preceding analysis the results of both aperture time and aperture jitter is an error signal which increases in amplitude as the slew rates at the input terminal of the A/D increase. One set of strategies that are used to reduce aperture errors therefore focus on minimizing this input slew rate. In fact, from an aperture error standpoint th...

UPC311C(MS)

Vendor:NECPackage Cooled:152D/C:9811+

While line regulation is specified down to 13 volts, the typical AD581 will work as specified down to 12 volts or below. The current sink capability allows even lower supply voltage capabil- ity such as operation from 12 V 5% as shown in Figure 10. The 560 Ω resistor reduces the current supplied by the AD581 to a manageable level at full 5 mA load. Note that the other bandgap references, without cu...

UPC311G2-E2(MS)

Vendor:NECPackage Cooled:SOP3.9mmD/C:1999

Address setup time with respect to W Chip select 1 setup time Chip select 2 setup time Data setup time Data hold time Write recovery time Output disable time from W low Output disable time from OE high Output enable time from W high Output enable time from OE low

UPC311G2T1

Vendor:NECPackage Cooled:1394

The ISL6118 current sense and limiting circuitry sets the current limit to a nominal 0.6A, which is well suited for the 3.3V AUX ACPI application. The ISL6118 is the ideal companion chip to the HIP1011D and HIP1011E dual PCI hot plug controllers. Together these and the ISL6118 fully control the four legacy PCI voltages (12V, +3.3V, +5V) and the 3.3V AUX, respectively, for power control of two PCI slots compl...

UPC311G2T2

UPC315D

UPC317H

Vendor:NECPackage Cooled:07+D/C:TO-220

When the transceiver is placed in power-down (sleep) or in a trans- mit mode, the output impedance of BBOUT becomes very high. This feature helps preserve the charge on the coupling capacitor to mini- mize data slicer stabilization time when the transceiver switches back to the receive mode.

UPC318C

Vendor:NECPackage Cooled:DIP-8D/C:06+

† Notice: Stresses above those listed under Maximum Rat- ings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Expo- sure to maximum rating conditions for extended periods may affect device reliability.

UPC319G

Vendor:NECPackage Cooled:CAND/C:550

The LTC®3733 family are PolyPhase® synchronous step- down switching regulator controllers that drive all N-channel external power MOSFET stages in a phase- lockable, fixed frequency architecture. The 3-phase con- troller drives its output stages with 120 phase separation at frequencies of up to 530kHz per phase to minimize the RMS current dissipated by the ESR of both the input and output filter capa...

UPC319G2

Vendor:NECPackage Cooled:CAND/C:560

8 channel CODEC with on-chip digital filters Programmable A/µ-law compressed or linear code conversion Meets ITU-T G.711 - G.714 requirements Programmable digital filter adapting to system demands: - AC impedance matching - Transhybrid balance - Frequency response correction - Gain setting Supports two programmable PCM buses and one GCI bus Flexible PCM interface with up to 128 programmable tim...

UPC319G2(MS)

UPC319G2-E1(MS)

Vendor:NEC ?Package Cooled:1998?D/C:2450

11-Channel Gamma Correction Buffer, Int VCOM 6-Channel Gamma Correction Buffer, Int VCOM 6-Channel Gamma Correction Buffer 4-Channel Gamma Correction Buffer, Int VCOM High-Supply Voltage Gamma Buffers 20-Channel Programmable Buffer, 10-Bit, VCOM

UPC319G2-E1(MS)

Vendor:NEC ?Package Cooled:NECD/C:2450

11-Channel Gamma Correction Buffer, Int VCOM 6-Channel Gamma Correction Buffer, Int VCOM 6-Channel Gamma Correction Buffer 4-Channel Gamma Correction Buffer, Int VCOM High-Supply Voltage Gamma Buffers 20-Channel Programmable Buffer, 10-Bit, VCOM

UPC319G2-E2

Vendor:NECPackage Cooled:SOPD/C:2500

The Fairchild Switch FSTU32160 is a 16-bit to 32-bit high- speed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propaga- tion delay or generating additional ground bounce noise.

UPC319G2-E2

Vendor:NECPackage Cooled:2005D/C:2500

The Fairchild Switch FSTU32160 is a 16-bit to 32-bit high- speed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propaga- tion delay or generating additional ground bounce noise.