UPD78070AGF-3BA

Vendor:NECPackage Cooled:QFPD/C:2001

Brooktree reserves the right to make changes to its products or specifications to improve performance, reliability, or manufacturability. Information furnished by Brooktree Corporation is believed to be accurate and reliable. However, no responsibility is assumed by Brooktree Corporation for its use; nor for any infringement of patents or other rights of third parties which may result from its use. ...

UPD78075BGF-013-3BA

D/C:95

The 256Mb DDR SDRAM operates from a differen- tial clock (CK and CK; the crossing of CK going HIGH and CK going LOW is referred to as the posi- tive edge of CK). Commands (address and control signals) are registered at every positive edge of CK. Input data is registered on both edges of DQS, and output data is referenced to both edges of DQS, as well as to both edges of CK.

UPD78076GC-A16-8EU

Package Cooled:99D/C:1350

International standard package JEDEC TO-247 AD IGBT and anti-parallel FRED in one package 2nd generation HDMOSTM process Low VCE(sat) - for minimum on-state conduction losses MOS Gate turn-on - drive simplicity Fast Recovery Epitaxial Diode (FRED) - soft recovery with low IRM

UPD78076GF-024-3BA

Vendor:NECPackage Cooled:QFPD/C:9712

AFEU processing begins after this shared session key is agreed upon. The plaintext message to be encrypted is logically partitioned into n sets of 8-bit blocks. In practice, the host processor groups 4 bytes at a time into 32-bit blocks and write that data to the AFEU. The AFEU internally processes each word one byte at a time. The AFEU engine processes each block in turn, byte by byte, producing n sets of ...

UPD78076GF-025-3BA

Vendor:NSECD/C:95

The VCA outputs are designed to interface directly with the virtual ground inputs of external operational amplifiers configured as current-to-voltage converters. The outputs must operate at virtual ground because of the output stages finite output impedance. The power supplies and selected compliance range determines the values of input and output resistors needed. As an example, with 15 V supplies and...

UPD78076GF-031-3BA

Vendor:NSECD/C:97

S/H's that are in their signal-acquisition modes should be left there as long as possible (so all signals can settle) and be driven into their hold modes before any system transients occur. In Figure 2, S/H1 is driven into the sample mode shortly after the transient from the shunt switch has begun to decay. S/H1 is then kept in the sample mode while the offset signal and the S/H output settle. S/H1 is ...

UPD78076GF-050-3BA

D/C:98

CHS=0,BAL=11111 Vin = 1Vrms Vo=0.5Vrms BW=400Hz to 30kHz Vin=1Vrms BW=400Hz to 30kHz Vin=1Vrms BW=400Hz to 30kHz VOL=0dB BW=400Hz to 30kHz VOL=Mute BW=400Hz to 30kHz LINEOUT, VOL=0dB BW=400Hz to 30kHz LINEOUT, VOL=Mute BW=400Hz to 30kHz

UPD78076GF0663BA

UPD78076GF-081-3BA

Vendor:61Package Cooled:2005D/C:QFP

1. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not implied.

UPD78076GF-G06-3BA-FXC

Vendor:NECPackage Cooled:QFPD/C:2002

Eighteen address bits are required to decode 1 of 262 144 storage cell locations. Nine row-address bits are set up on A0 through A8 and latched onto the chip by RAS. Then, nine column-address bits are set up on A0 through A8 and latched onto the chip by the first xCAS. All addresses must be stable on or before the falling edge of RAS and xCAS. RAS is similar to a chip enable in that it activates the sense...

UPD78076QF-G10

Vendor:NECPackage Cooled:QFPD/C:1999

The 128-bit instruction line, which can contain up to four 32-bit instructions, accommodates a variety of parallel operations for concise programming. For example, one instruction line can direct the DSP to conditionally execute a multiply, an add, and a subtract in both computation blocks while it also branches to another location in the program. Some key features of the instruction set include:

UPD78076QF-G10

Vendor:NECPackage Cooled:QFPD/C:1999

The 128-bit instruction line, which can contain up to four 32-bit instructions, accommodates a variety of parallel operations for concise programming. For example, one instruction line can direct the DSP to conditionally execute a multiply, an add, and a subtract in both computation blocks while it also branches to another location in the program. Some key features of the instruction set include:

UPD78076YGF-W03-3BA

Vendor:NECD/C:07+

Up to 18 A Output Current 12-V Input Voltage Wide-Output Voltage Adjust (1.2 V to 5.5 V)/(0.8 V to 1.8 V) Efficiencies up to 95% 195 W/in3 Power Density On/Off Inhibit Output Voltage Sense Pre-Bias Startup Under-Voltage Lockout Auto-Track™ Sequencing Margin Up/Down Controls Output Over-Current Protection (Non-Latching, Auto-Reset) Over-Temperature Protection Operating Temperature: C40C to 85C ...

UPD78076YGF-W05-3BA

Vendor:NECPackage Cooled:QFPD/C:98

This device assumes a standby mode if either CE1 is disabled (high) or CE2 is disabled (low). It will also automatically go into a standby mode whenever all input signals are quiescent (not toggling) regardless of the state of CE1 or CE2. In order to achieve low standby current in the enabled mode (CE1 low and CE2 high), all inputs must be within 0.2 volts of either V CC or V SS .

UPD78078GC-A17-8EU

Vendor:NECPackage Cooled:TQFPD/C:2000

UPD78078GC-A17-8EU

Vendor:NECPackage Cooled:TQFPD/C:2000

UPD78078GC-A29-8EU

Vendor:NECPackage Cooled:TQFP-100PD/C:2001

Asynchronous memory support is typically used to boot from a parallel non-multiplexed NOR flash device that can be 8, 16, or 32 bits wide. Booting from larger flash devices than are natively supported by the dedicated EMIF address lines is accomplished by using general-purpose I/O pins for upper address lines.

UPD78078GF

Vendor:NECPackage Cooled:2001+D/C:2001+

2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation (see 6.2).

UPD78078GF-026-3BA (LCM371B-02

Vendor:NECPackage Cooled:1000D/C:9612

UPD78078GF-057-3BA

Package Cooled:QFPD/C:95

Axial Power Schottky rectifier suited for Switch Mode Power Supplies and high frequency DC to DC converters. Packaged in DO41 these devices are intended for use in low voltage, high frequency inverters, free wheeling, polarity protection and small battery chargers.

UPD78078GF-057-3BA

Package Cooled:QFPD/C:95

Axial Power Schottky rectifier suited for Switch Mode Power Supplies and high frequency DC to DC converters. Packaged in DO41 these devices are intended for use in low voltage, high frequency inverters, free wheeling, polarity protection and small battery chargers.

UPD78078GF092

Vendor:NECD/C:003

The UPD78078GF092 is an ultra-low noise, wideband amplifier that runs on half the supply current of competitive parts. It is intended for use in systems such as ultrasound imaging where a very small signal needs to be amplified by a large amount without adding significant noise. Its low power dissipation enables it to be packaged in the tiny SOT-23 package, which further helps systems where many input ...

UPD78078GF092

Vendor:NECPackage Cooled:1020D/C:003

The UPD78078GF092 is an ultra-low noise, wideband amplifier that runs on half the supply current of competitive parts. It is intended for use in systems such as ultrasound imaging where a very small signal needs to be amplified by a large amount without adding significant noise. Its low power dissipation enables it to be packaged in the tiny SOT-23 package, which further helps systems where many input ...

UPD78078GF-114

Vendor:NECPackage Cooled:2005D/C:08+

Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad®. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint.

UPD78078GF-114-3BA

Vendor:NECPackage Cooled:QFPD/C:2000

Pulse-testing techniques are used to maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor, with equivalent series resistance of less than 0.4 Ω, across the output.

UPD78078GF-114-3BA

Vendor:NECPackage Cooled:QFPD/C:2000

Pulse-testing techniques are used to maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF capacitor, with equivalent series resistance of less than 0.4 Ω, across the output.

UPD78078GF-124

Vendor:NECPackage Cooled:2005D/C:08+

A read access is initiated when the following conditions are satisfied at clock rise: (1) CEN is asserted LOW, (2) CE1, CE2, and CE3 are ALL asserted active, (3) the Write Enable input signal WE is deasserted HIGH, and (4) ADV/LD is asserted LOW. The address presented to the address inputs is latched into the Address Register and presented to the memory core and control logic. The control logic determines th...

UPD78078GF-124-3BA

Vendor:NECPackage Cooled:QFPD/C:2001

During reference input rearrangement, such as during a switch from the primary reference (PRI) to the secondary reference (SEC), a step change in phase on the input signals will occur. A phase step at the input of the DPLL would lead to unacceptable phase changes in the output signal.

UPD78078GF-124-3BA

Vendor:NECPackage Cooled:QFPD/C:2001

During reference input rearrangement, such as during a switch from the primary reference (PRI) to the secondary reference (SEC), a step change in phase on the input signals will occur. A phase step at the input of the DPLL would lead to unacceptable phase changes in the output signal.

UPD78078GF-G01-3BA-FXC

Vendor:QFP64Package Cooled:500D/C:NEC

Notes: 1. The luminous intensity, I V, is measured at the peak of the spatial radiation pattern, which may not be aligned with the mechanical axis of the lamp package. 2. The dominant wavelength, ëd, is derived from the CIE Chromatically Diagram and represents the perceived color of the device. 3. 1/2 is the off-axis angle where the luminous intensity is 1/2 the peak intensity.

UPD78078GK-537-9ET

Vendor:NECPackage Cooled:QFPD/C:99+

The MC10/100EP31 is a D flipCflop with set and reset. The device is pin and functionally equivalent to the EL31 and LVEL31 devices. With AC performance much faster than the EL31 and LVEL31 devices, the EP31 is ideal for applications requiring the fastest AC performance available. Both set and reset inputs are asynchronous, level triggered signals. Data enters the master portion of the flipCflop when CL...

UPD7807CW

Vendor:NECPackage Cooled:DIPD/C:98

Two Channels: Measures Both Remote and Local Temperatures No Calibration Required SMBus 2-Wire Serial Interface Programmable Under/Overtemperature Alarms Supports SMBus Alert Response Accuracy: 1C (+60C to +100C, remote) 3C (+60C to + 100C, local) 320µA (typ) Average Supply Current During Conversion +3V to +5.5V Supply Range Small 8-Lead SO Package

UPD7807CW

Vendor:NECPackage Cooled:DIPD/C:98

Two Channels: Measures Both Remote and Local Temperatures No Calibration Required SMBus 2-Wire Serial Interface Programmable Under/Overtemperature Alarms Supports SMBus Alert Response Accuracy: 1C (+60C to +100C, remote) 3C (+60C to + 100C, local) 320µA (typ) Average Supply Current During Conversion +3V to +5.5V Supply Range Small 8-Lead SO Package

UPD7807G

Vendor:NEBPackage Cooled:DIPD/C:8837+

This three terminal negative regulator is supplied in a hermetically sealed metal package whose outline is similar to the industry standard TO-220 plastic package. All protective features are designed into the circuit, including thermal shutdown, current limiting, and safe-area control. With heat sinking, these devices can deliver up to 1.5 amps of output current. The unit also features output voltages tha...

UPD7807G

Vendor:NEBD/C:8837+

This three terminal negative regulator is supplied in a hermetically sealed metal package whose outline is similar to the industry standard TO-220 plastic package. All protective features are designed into the circuit, including thermal shutdown, current limiting, and safe-area control. With heat sinking, these devices can deliver up to 1.5 amps of output current. The unit also features output voltages tha...

UPD78081-1A66550

Package Cooled:N/A

High voltage, high current and high pulse operations, deflection circuits in TV sets (S-correction and fly-back tuning). Protection circuits in SMPSs. Snubber and electronic ballast circuits. Input and output filtering in SPS designs, storage, timing and integrating circuits.

UPD78081-1A66550

High voltage, high current and high pulse operations, deflection circuits in TV sets (S-correction and fly-back tuning). Protection circuits in SMPSs. Snubber and electronic ballast circuits. Input and output filtering in SPS designs, storage, timing and integrating circuits.

UPD-78081-1DA73065

Vendor:N/APackage Cooled:DIP8D/C:03+

PLL-LPF (Pin 3): Phase Locked-Loop Filter Pin. This is the output of the phase detector and also the input to the voltage controlled oscillator (VCO). Connect an RC filter here. Typically, R = 3k and C = 1500pF. The voltage range at the PLL-LPF pin is approximately 0V to 1.5V with 1.5V corresponding to the maximum switching frequency. For applications not requiring synchronization, use a pull-up resistor at ...

UPD78081AB

Vendor:NECPackage Cooled:QFP44D/C:06+

UPD78081CU-015

Vendor:NECPackage Cooled:DIPD/C:1998

An internal shunt regulator allows the device to be powered via a resistor from a widely varying supply. The device power management section keeps the device in start-up current mode whilst VDD is ramping up. When the supply voltage reaches the start-up threshold, the device turns on and draws the specified supply current. If VDD drops below the under-voltage lockout threshold, the device returns to...

UPD78081GAO6

Vendor:NECPackage Cooled:QFP

Table 1 provides an overview of the SMJ320C6203 DSP. The table shows significant features of the device, including the capacity of on-chip RAM, the peripherals, the execution time, and the package type with pin count. This data sheet focuses on the functionality of the SMJ320C6203 device. For more details on the C6000 DSP part numbering, see Figure 4.

UPD78081GB(A)-E05-3BS

UPD78081GB(A)-E18-3BS-MTX

Vendor:QFP44Package Cooled:QFP/44D/C:NEC

In order to support multiple tags within the field at the same time, a random delay time between ID transmissions can be enabled. This feature is implemented by having the chip randomly disable its activity (transmission of ID and recep- tion of commands) during selected frames. Commands are only honored during the listening window of those frames in which data was actually transmitted by the chip.

UPD78081GB(A)-E21-3BS-MTX

Vendor:QFP44Package Cooled:QFP/64D/C:NEC

The CD4514B and CD4515B are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed with N- and P-channel en- hancement mode transistors These circuits are primarily used in decoding applications where low power dissipation and or high noise immunity is required The CD4514B (output active high option) presents a logical 1 at the selected output whereas ...

UPD78081GB(A)-E21-3BS-MTX

Vendor:QFP44Package Cooled:QFP/64D/C:NEC

The CD4514B and CD4515B are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed with N- and P-channel en- hancement mode transistors These circuits are primarily used in decoding applications where low power dissipation and or high noise immunity is required The CD4514B (output active high option) presents a logical 1 at the selected output whereas ...

UPD78081GB(A)-E26-3BS-MTX

Vendor:QFP44Package Cooled:QFP/44D/C:NEC

But, 5 V VCC provides the highest read performance. VPP at 2.7 V, 3.3 V and 5 V eliminates the need for a separate 12 V converter, while VPP = 12 V maximizes block erase and word write performance. In addition to flexible erase and program voltages, the dedicated VPP pin gives complete data protection when VPP VPPLK.

UPD78081GB(A2)-952-3B4

Vendor:NECPackage Cooled:QFPD/C:2004

• Compact Solid-State Bidirectional Switch • Normally-Off Single-Pole Relay Function (1 Form A) • 60 V Output Withstand Voltage in Both Polarities at 25C • 0.75/1.5 Amp Current Ratings (See Schematic for Connections A & B) • Low Input Current; CMOS Compatibility • Very Low On-resistance: 0.4 Ω Typical at 25C • ac/dc Signal and Power ...

UPD78081GB-B03-3BS-MTX

Vendor:NECD/C:0419+

The HYM71V16M755HC(L)T6 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 128Mbytes memory. The HYM71V16M755HC(L)T6 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipe- lined to achieve very high bandwidth.

UPD78081GB-C19-3BS-MTX

Vendor:NECPackage Cooled:QFPD/C:0516+

Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications.

UPD78081GB-C25-3BS-MTX

Vendor:NECD/C:04+

Note 5: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).

UPD78081GB-C29-3BS-MTX

Vendor:NECD/C:03+

Other features include pulse-by-pulse current limiting, and a low 5-µA quiescent current during shutdown. The UCC39422 incorporates programmable power-on reset circuitry and an uncommitted comparator for low voltage detection. The available packages are 20-pin TSSOP or 20-pin N for the UCC39422, and 16-pin TSSOP or 16-pin N for the UCC39421.

UPD78081GB-C44-3BS-MTX

Vendor:NECD/C:03/04+

The dual-enable configuration gives the quadruple bus transceivers the capability to store data by simultaneous enabling of OEBA and OEAB. Each output reinforces its input in this transceiver configuration. Thus, when both control inputs are enabled and all other data sources to the two sets of bus lines are at high impedance, both sets of bus lines (eight in all) remain at their states. The 4-bit ...

UPD780824BGCA3078BT

UPD780826BGC-015-8BT

Vendor:NECPackage Cooled:03+D/C:03+

Power for the circuit is from a 12V supply, that is reduced to 5V by the 78L05 regulator. This gives a stable supply voltage for the ELM331, as well as convenient voltage for use with a standard relay coil. The type of relay is not important, as long as consideration is given to its coil requirements, and the capabilities of the ELM331. In this example, a relay with a 400Ω coil resistance was ...

UPD780826GC-057-8BT-E2

Vendor:NECPackage Cooled:QFPD/C:03+

All outputs must be AC coupled into their loads for the -1 version. The -2 version must be DC coupled. All inputs (-1 and -2 versions) are AC coupled. The Y or C outputs can drive 2VP-P into a 150Ω load, while the CV output can drive 2VP-P into 75Ω. Thus the CV output is capable of driving two independent 150Ω loads to 2VP-P.

UPD780826GC-057-8BT-E2

Vendor:NECPackage Cooled:N/AD/C:03+

All outputs must be AC coupled into their loads for the -1 version. The -2 version must be DC coupled. All inputs (-1 and -2 versions) are AC coupled. The Y or C outputs can drive 2VP-P into a 150Ω load, while the CV output can drive 2VP-P into 75Ω. Thus the CV output is capable of driving two independent 150Ω loads to 2VP-P.

UPD780828B(A)

Vendor:NECPackage Cooled:QFP80D/C:06+

Stability The AP1187 requires the use of an output capacitor as part of the frequency compensation in order to make the regulator stable. Typical designs for the microprocessorapplicationsusestandard electrolytic capacitors with typical ESR in the range of 50 to 100mΩ and an output capacitance of 100uF to 1000uF. Fortunately as the capacitance increases, the ESR decreases resulting in a fixed RC time...

UPD78082CU-047

Vendor:NECPackage Cooled:9942D/C:DIP-42

Chip Select (Pin 23) Chip Select Input. A high on this input produces a low level on all outputs, regardless of what appears at the address or Latch Enable inputs. A low level on the Chip Select input allows the selected output to produce a high level.

UPD78082CU060

UPD78082CU-060

Vendor:NECPackage Cooled:DIP-42

The synthesised frequency of the voltage controlled oscillator (VCO) will depend on the division ratios of the M and A counters, the ratio of the external two-modulus prescaler (P/P11)and the comparison frequency . The division ratio N = MP1A, where M is the ratio of the M counter in the range 8 to 1023 and A is the ratio of the A counter in the range 0 to 127.

UPD78082CU-067(AH8

Vendor:NECPackage Cooled:DIP-42D/C:0124+

The HT6221/HT6222 remain in the halt mode during the standby state (at this time, the oscillator stops, and the standby current<1mA). The HT6221 consists of 32 ac- tive keys, and the HT6222 has 64 active keys. The key- board forms of the HT6221/ HT6222 are shown below.

UPD78082CU-067(AH885SPS-067)

Vendor:NECPackage Cooled:DIP-42D/C:0124+

UPD78082GB(A)-E

Vendor:NECPackage Cooled:713D/C:03+

Short-Circuit Output Current is a parameter that has appeared on digital data sheets since the inception of integrated circuit logic devices, but the meaning and implications of that specification have totally changed. Originally, IOS was an attempt to reassure the user that if a stray oscilloscope probe accidentally shorted an output to ground the device would not be damaged. In this manner, an extrem...

UPD78082GB-3BS-MTX

Vendor:NECD/C:99+

The four D-type flip-flops operate synchronously from a com- mon clock. The outputs are in the three-state mode when either of the two output disable pins are at the logic 1 level. The input ENABLES allow the flip-flops to remain in their present states without having to disrupt the clock If either of the 2 input ENABLES are taken to a logic 1 level, the Q outputs are fed back t...

UPD78082GB-3BS-MTX

Vendor:NECD/C:99+

The four D-type flip-flops operate synchronously from a com- mon clock. The outputs are in the three-state mode when either of the two output disable pins are at the logic 1 level. The input ENABLES allow the flip-flops to remain in their present states without having to disrupt the clock If either of the 2 input ENABLES are taken to a logic 1 level, the Q outputs are fed back t...

UPD78082GB-521-3B4

Vendor:NECPackage Cooled:QFPD/C:0206+

CSF+, CSF C (Pin 11, 12): MF Current Sense Differential Input. Connect CSF+ through a series resistor to the drain of MF and CSFC through a series resistor to the source of MF. The UPD78082GB-521-3B4 monitors the CSF inputs 250ns after MF goes high. If the inductor current reverses and flows into MF causing CSF+ to rise above CSFC by more than 10.5mV, the UPD78082GB-521-3B4 pulls MF low. See the Current Sense...

UPD78082GB-531-3B4

Vendor:NECPackage Cooled:QFPD/C:99

All typical values are at VCC = 3.3 V, TA = 25C. This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. For I/O ports, the parameter IOZ includes the input leakage current.

UPD78082GB-A20-3BS-MTX

Vendor:NECPackage Cooled:470D/C:00+

Reproduction of information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations and notices. Representation or reproduction of this information with alteration voids all warranties provided for an associated TI product or service, is an unfair and deceptive business practice, and TI is not respon...

UPD78082GB-A39-3BS-MIX

Vendor:NECPackage Cooled:QFPD/C:2002+

UPD78082GB-A39-3BS-MIX

Vendor:NECPackage Cooled:QFPD/C:2002+

UPD78082GB-A39-3BS-MTX

Vendor:NECPackage Cooled:QFPD/C:08+

The EL2245 and EL2445 also feature an extremely wide output voltage swing of 13.6V with VS = 15V and RL = 1kΩ. At 5V, output voltage swing is a wide 3.8V with RL = 500Ω and 3.2V with RL = 150Ω. Furthermore, for single-supply operation at +5V, output voltage swing is an excellent 0.3V to 3.8V with RL = 500Ω.

UPD78082GBA963BSMTX

UPD78082GB-A96-3BS-MTX

Vendor:NECPackage Cooled:2000D/C:950

DESCRIPTION The UPD78082GB-A96-3BS-MTX is designed for effective measurement of active energy in a power line system using the Rogowski and/or Shunt principle. This device can be implemented as a single chip 1-phase energy meter or as a peripheral measurement in a microprocessor based 1-phase or 3-phase energy meter. The UPD78082GB-A96-3BS-MTX consists, essentially, of two parts: the analog part a...

UPD78082GBB973BSA

UPD78082GBB973BSMTX

TRANSMITTER The transmitter accepts logic level clock (TCLK), positive data (TPOS) and negative data (TNEG) signals and generates current pulses on the LOUT+ and LOUT- pins. When properly connected to a center-tapped 1:2 transformer, an AMI pulse is generated which can drive a 75Ω coaxial cable.

UPD78082GB-F06-3BS-MTX

Vendor:NECPackage Cooled:QFPD/C:0

Register oriented 8/16 bit CORE with RUN, WFI, SLOW, HALT and STOP modes 0 - 24 MHz Operation (internal Clock), 4.5 - 5.5 Volt voltage range PLL Clock Generator (3-5 MHz crystal) -40oC to 105oC or -40oC to 85oC temperature range Minimum instruction time: 83 ns (24 MHz internal clock) Internal Memory: Single Voltage FLASH up to 128 Kbytes, RAM 1.5 to 4 Kbytes, EEPROM 512 to 1K bytes 224 general...

UPD78082GB-F06-3BS-MTX

Vendor:NECPackage Cooled:QFPD/C:0

Register oriented 8/16 bit CORE with RUN, WFI, SLOW, HALT and STOP modes 0 - 24 MHz Operation (internal Clock), 4.5 - 5.5 Volt voltage range PLL Clock Generator (3-5 MHz crystal) -40oC to 105oC or -40oC to 85oC temperature range Minimum instruction time: 83 ns (24 MHz internal clock) Internal Memory: Single Voltage FLASH up to 128 Kbytes, RAM 1.5 to 4 Kbytes, EEPROM 512 to 1K bytes 224 general...

UPD78082UC-060

Vendor:NECPackage Cooled:DIP

DYNAMIC PERFORMANCE Maximum Output Update Rate (fCLOCK) Output Settling Time (tST ) (to 0.1%)1 Output Propagation Delay (tPD) Glitch Impulse Output Rise Time (10% to 90%)1 Output Fall Time (10% to 90%)1 Output Noise (I OUTFS = 20 mA) Output Noise (I OUTFS = 2 mA)

UPD780831YG

Vendor:1000D/C:NEC

UPD780831YGC-055-8BT-E3

Vendor:NECD/C:99+

The ATF1502ASV is a high-performance, high-density complex programmable logic device (CPLD) that utilizes Atmels proven electrically-erasable technology. With 32 logic macrocells and up to 36 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs. The ATF1502ASVs enhanced routing switch matrices increase usable gate count and the odds of successful pin-locked design modificatio...

UPD780831YGC-055-8BT-E3

Vendor:NECD/C:99+

The ATF1502ASV is a high-performance, high-density complex programmable logic device (CPLD) that utilizes Atmels proven electrically-erasable technology. With 32 logic macrocells and up to 36 inputs, it easily integrates logic from several TTL, SSI, MSI, LSI and classic PLDs. The ATF1502ASVs enhanced routing switch matrices increase usable gate count and the odds of successful pin-locked design modificatio...

UPD780938AGF-145-3BA

UPD780957GC-315-8EU

Vendor:NECD/C:02+

The UCC281 series is specified for operation over the in- dustrial range of −40C to +85C, and the UCC381 se- ries is specified from 0C to +70C. These devices are available in the 8 pin DP surface mount power package. For other packaging options consult the factory.

UPD780957GC-315-8EU

Vendor:NECD/C:02+

The UCC281 series is specified for operation over the in- dustrial range of −40C to +85C, and the UCC381 se- ries is specified from 0C to +70C. These devices are available in the 8 pin DP surface mount power package. For other packaging options consult the factory.

UPD780957GC-325

Vendor:NECD/C:0237+

Each filter is a throughpath for the desired frequency (RF or IF) and isolates the other frequency (IF or RF) and its harmonics. These two filters must be connected to pin 1 and pin 6 directly. Parasitic capacitances at the ports 1 and 6 must be as small as possible. L4 and C4 are optimized by indicating lowest IOP at used LO-frequency; same procedure for L3. The ports 1, 3 and 6 must be DC open.

UPD780957GC-325

Vendor:NECD/C:0237+

Each filter is a throughpath for the desired frequency (RF or IF) and isolates the other frequency (IF or RF) and its harmonics. These two filters must be connected to pin 1 and pin 6 directly. Parasitic capacitances at the ports 1 and 6 must be as small as possible. L4 and C4 are optimized by indicating lowest IOP at used LO-frequency; same procedure for L3. The ports 1, 3 and 6 must be DC open.

UPD78095BGC-021-3B9

Package Cooled:QFPD/C:5574

These three inputs establish a code defining one of eight possible divide values for the total reference divider, as defined by the table below. PullCup resistors ensure that inputs left open remain at a logic 1 and require only a SPST switch to alter data to the zero state.

UPD78095BGC-048-3B9

Package Cooled:QFPD/C:1686

The LM117 adjustable 3-terminal positive voltage regulator is capable of supplying in excess of 1.5A over a 1.2V to 37V output range. It is exceptionally easy to use and requires only two external resistors to set the output voltage. Further, both line and load regulation are better than standard fixed regulators.

UPD78095BGC-048-3B9

Package Cooled:99D/C:99

The LM117 adjustable 3-terminal positive voltage regulator is capable of supplying in excess of 1.5A over a 1.2V to 37V output range. It is exceptionally easy to use and requires only two external resistors to set the output voltage. Further, both line and load regulation are better than standard fixed regulators.

UPD78095GC(A)-325-8EU

Vendor:NEGPackage Cooled:QFPD/C:0237+

The Hardware Integrity function uses transmission line theory to measure the arrival time and electrical characteristics of the wave reflected back from an incident test wave launched on the media. With these measurements, opens, shorts, and degraded cable quality can be located along the wire, and lead the network manager to the location of the problem.

UPD78095GC-071-3B9

Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999. The Companys quality system processes and procedures are QS-9000 compliant for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs and microperipheral products. In addition, Microchips quality system fo...

UPD78095GC-081-3B9

Vendor:NECPackage Cooled:379D/C:00+

Reading from the device is accomplished by taking Chip En- able (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O9 to I/O16. See the truth table at the back of this data sheet for...

UPD78095GC081-3B9

The DAC7811 offers excellent 4-quadrant multipli- cation characteristics, with large signal multiplying bandwidth of 10 MHz. The applied external reference input voltage (VREF) determines the full-scale output current. An integrated feedback resistor (RFB) pro- vides temperature tracking and full-scale voltage output when combined with an external cur- rent-to-voltage precision amplifier.

UPD78096GC-AO2-8BS

Vendor:NECPackage Cooled:QFPD/C:04+

UPD780973BGF(A)-065-3B9

Vendor:NECPackage Cooled:QFP/80D/C:02+

Appendix B: Manual/Compatibility Mode Demodulator Write and Read Registers for Manual/Compatibility Mode DSP Write and Read Registers for Manual/Compatibility Mode Manual/Compatibility Mode: Description of Demodulator Write Registers Automatic Switching between NICAM and Analog Sound Function in Automatic Sound Select Mode Function in Manual Mode A2 Threshold Carrier-Mute Threshold Register AD_CV R...

UPD780973BGF(A)-065-3B9

Vendor:NECPackage Cooled:QFP/80D/C:02+

Appendix B: Manual/Compatibility Mode Demodulator Write and Read Registers for Manual/Compatibility Mode DSP Write and Read Registers for Manual/Compatibility Mode Manual/Compatibility Mode: Description of Demodulator Write Registers Automatic Switching between NICAM and Analog Sound Function in Automatic Sound Select Mode Function in Manual Mode A2 Threshold Carrier-Mute Threshold Register AD_CV R...

UPD780973BGF(A)-066-3B9

Vendor:NECPackage Cooled:QFP/80D/C:02+

When #CE and #RESET pins are at VDD, the ICC CMOS standby mode is enabled. When the #RESET pin is at VSS, deep power-down mode is enabled which minimizes power consumption and provides write protection during reset. A reset time (tPHQV) is required from #RESET switching high until outputs are valid. Likewise, the device has a wake time (tPHEL) from #RESET-high until writes to the CUI are recognized. With #R...

UPD780973BGF(A)-067-3B9

Vendor:NECPackage Cooled:QFP/100D/C:02+

Note : 1. Load and line regulation are specified at constant junction temperature. Change in VD due to heating effects must be taken into account separately. Pulse testing with low duty is used. (PMAX = 20W) 2. CADJ, when used, is connected between the adjustment pin and ground.

UPD780973BGF(A)-067-3B9

Vendor:NECPackage Cooled:QFP/100D/C:02+

Note : 1. Load and line regulation are specified at constant junction temperature. Change in VD due to heating effects must be taken into account separately. Pulse testing with low duty is used. (PMAX = 20W) 2. CADJ, when used, is connected between the adjustment pin and ground.

UPD780982GC-A07-8BS

Vendor:NECPackage Cooled:QFPD/C:06+

The Winbond® ISD1700A ChipCorder® Series is a high quality, fully integrated, single-chip multi- message voice record and playback device ideally suited to a variety of electronic systems. The message duration is user selectable in ranges from 26 seconds to 120 seconds, depending on the specific device. The sampling frequency of each device can also be adjusted from 4 kHz to 12 kHz with an external...